Simulation Results: clkmgr

 
09/05/2026 02:32:54 DVSim: v1.34.0 sha: f3ee88d json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 86.49 %
  • code
  • 88.08 %
  • assert
  • 94.42 %
  • func
  • 76.96 %
  • line
  • 92.36 %
  • branch
  • 95.43 %
  • cond
  • 90.11 %
  • toggle
  • 100.00 %
  • FSM
  • 62.50 %
Validation stages
V1
63.81%
V2
60.85%
V2S
31.49%
V3
3.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 50 50 100.00
clkmgr_smoke 5.230s 303.672us 50 50 100.00
csr_hw_reset 5 5 100.00
clkmgr_csr_hw_reset 2.210s 90.114us 5 5 100.00
csr_rw 7 20 35.00
clkmgr_csr_rw 1.830s 126.633us 7 20 35.00
csr_bit_bash 0 5 0.00
clkmgr_csr_bit_bash 8.110s 461.459us 0 5 0.00
csr_aliasing 2 5 40.00
clkmgr_csr_aliasing 1.760s 57.686us 2 5 40.00
csr_mem_rw_with_rand_reset 3 20 15.00
clkmgr_csr_mem_rw_with_rand_reset 3.700s 204.200us 3 20 15.00
regwen_csr_and_corresponding_lockable_csr 9 25 36.00
clkmgr_csr_rw 1.830s 126.633us 7 20 35.00
clkmgr_csr_aliasing 1.760s 57.686us 2 5 40.00
Testpoint Test Max Runtime Sim Time Pass Total %
peri_enables 50 50 100.00
clkmgr_peri 1.690s 48.785us 50 50 100.00
trans_enables 50 50 100.00
clkmgr_trans 3.480s 294.991us 50 50 100.00
clk_status 50 50 100.00
clkmgr_clk_status 1.930s 167.291us 50 50 100.00
jitter 50 50 100.00
clkmgr_smoke 5.230s 303.672us 50 50 100.00
frequency 0 50 0.00
clkmgr_frequency 1.840s 57.591us 0 50 0.00
frequency_timeout 0 50 0.00
clkmgr_frequency_timeout 1.030s 9.384us 0 50 0.00
frequency_overflow 0 50 0.00
clkmgr_frequency 1.840s 57.591us 0 50 0.00
stress_all 2 50 4.00
clkmgr_stress_all 7.810s 459.032us 2 50 4.00
alert_test 50 50 100.00
clkmgr_alert_test 2.610s 173.567us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
clkmgr_tl_errors 7.870s 621.681us 20 20 100.00
tl_d_illegal_access 20 20 100.00
clkmgr_tl_errors 7.870s 621.681us 20 20 100.00
tl_d_outstanding_access 14 50 28.00
clkmgr_csr_hw_reset 2.210s 90.114us 5 5 100.00
clkmgr_csr_rw 1.830s 126.633us 7 20 35.00
clkmgr_csr_aliasing 1.760s 57.686us 2 5 40.00
clkmgr_same_csr_outstanding 2.530s 112.792us 0 20 0.00
tl_d_partial_access 14 50 28.00
clkmgr_csr_hw_reset 2.210s 90.114us 5 5 100.00
clkmgr_csr_rw 1.830s 126.633us 7 20 35.00
clkmgr_csr_aliasing 1.760s 57.686us 2 5 40.00
clkmgr_same_csr_outstanding 2.530s 112.792us 0 20 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 1 25 4.00
clkmgr_sec_cm 117.120s 10016.188us 1 5 20.00
clkmgr_tl_intg_err 2.050s 82.562us 0 20 0.00
shadow_reg_update_error 16 20 80.00
clkmgr_shadow_reg_errors 2299.930s 200000.000us 16 20 80.00
shadow_reg_read_clear_staged_value 16 20 80.00
clkmgr_shadow_reg_errors 2299.930s 200000.000us 16 20 80.00
shadow_reg_storage_error 16 20 80.00
clkmgr_shadow_reg_errors 2299.930s 200000.000us 16 20 80.00
shadowed_reset_glitch 16 20 80.00
clkmgr_shadow_reg_errors 2299.930s 200000.000us 16 20 80.00
shadow_reg_update_error_with_csr_rw 0 20 0.00
clkmgr_shadow_reg_errors_with_csr_rw 1.300s 25.003us 0 20 0.00
sec_cm_bus_integrity 0 20 0.00
clkmgr_tl_intg_err 2.050s 82.562us 0 20 0.00
sec_cm_meas_clk_bkgn_chk 0 50 0.00
clkmgr_frequency 1.840s 57.591us 0 50 0.00
sec_cm_timeout_clk_bkgn_chk 0 50 0.00
clkmgr_frequency_timeout 1.030s 9.384us 0 50 0.00
sec_cm_meas_config_shadow 16 20 80.00
clkmgr_shadow_reg_errors 2299.930s 200000.000us 16 20 80.00
sec_cm_idle_intersig_mubi 50 50 100.00
clkmgr_idle_intersig_mubi 3.340s 148.642us 50 50 100.00
sec_cm_jitter_config_mubi 7 20 35.00
clkmgr_csr_rw 1.830s 126.633us 7 20 35.00
sec_cm_idle_ctr_redun 1 5 20.00
clkmgr_sec_cm 117.120s 10016.188us 1 5 20.00
sec_cm_meas_config_regwen 7 20 35.00
clkmgr_csr_rw 1.830s 126.633us 7 20 35.00
sec_cm_clk_ctrl_config_regwen 7 20 35.00
clkmgr_csr_rw 1.830s 126.633us 7 20 35.00
prim_count_check 1 5 20.00
clkmgr_sec_cm 117.120s 10016.188us 1 5 20.00
Testpoint Test Max Runtime Sim Time Pass Total %
regwen 2 50 4.00
clkmgr_regwen 1.140s 17.946us 2 50 4.00
stress_all_with_rand_reset 1 50 2.00
clkmgr_stress_all_with_rand_reset 99.810s 7254.458us 1 50 2.00

Error Messages

   Test seed line log context
UVM_ERROR (clkmgr_base_vseq.sv:320) virtual_sequencer [clkmgr_frequency_timeout_vseq] Mismatch for timeout recoverable error, expected *b*, got *b* 102 test runs
clkmgr_frequency_timeout 108627306197138319738052413410518569197709032022044941231825571722885877233519 78
UVM_INFO @ 3533021 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 45031158783278600843505807479870260342629408380965834653568790876457526241380 209
UVM_INFO @ 203936947 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 69845229938108142053480848049195162750011328307443676864860179633101963036698 78
UVM_INFO @ 29324624 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 62367269488755145371743598410848889191880860725083142419375103982591854417159 78
UVM_INFO @ 3060685 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 63771444769816024497775090796353195796910466364947328556826825849485192500348 119
UVM_INFO @ 171538482 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 7048772230804816714246461176461224930231314414895898049694598693395229595788 78
UVM_INFO @ 3226858 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 21381172726523515204097122339504298919780810486397674333446582583685963082227 107
UVM_INFO @ 40356140 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 42976070657121803078434675093835826538016152534244252821311115457199552806251 78
UVM_INFO @ 3856120 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 69326748383223416190427978091481546128121276607185527908054470482944790227047 77
UVM_INFO @ 3963460 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 64575448722628230140016191968155948107375189139959205701615306016242343211682 79
UVM_INFO @ 9896009 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 8376284934394030881693330294492264788139824061976847351866020669745997546458 78
UVM_INFO @ 5332543 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 69632554712050000457362266564938662674785039189739259493343460427636962651132 78
UVM_INFO @ 3810342 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 5532391479122017789439458482818918759661191528596833444362066962760360731224 77
UVM_INFO @ 2600467 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 93310154165721253763926016914130879184579265174165982780692566892214932996067 78
UVM_INFO @ 3466346 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 55593831778535266112276283411492225010614438796099169225447426966119498023932 79
UVM_INFO @ 3054071 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 22905577872805879000371348083512108638336498298883639981700059441955801623249 78
UVM_INFO @ 98952127 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 106328242528371098148438676585258587344817636608044794150246813919047696032868 78
UVM_INFO @ 3228975 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 97799427357946277777114806987611383869263344895894626365421574981293226329463 78
UVM_INFO @ 459032178 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 45482639539537293426959092705355041173848510581387672673237264627446152530462 78
UVM_INFO @ 4840885 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 30009720406167798874542148631246073715626397511502291014373951058506640943355 92
UVM_INFO @ 28540636 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 51383649816998076003570827843357487851037155429701210314607283659181779680667 121
UVM_INFO @ 174105362 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 54161993870888882768799725151150076319354870264216477468935958767340236416295 78
UVM_INFO @ 6390565 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 65097035349603177876802634413070875175109672964609008100847845873699560725036 78
UVM_INFO @ 18282126 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 84098600083067642298361113085455711779455678217267539378900386284142135914759 77
UVM_INFO @ 3123483 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 81409763135604738917639068746666714221378921773251978617875918942596401496415 77
UVM_INFO @ 4884821 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 90455605899943576534067041976395778513997246653062857570025199723251741710518 78
UVM_INFO @ 9383920 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 33645586793050534773979355421636442990001941894237078288147969551909106824360 79
UVM_INFO @ 25270988 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 24566700111249108487165025063868535966570760345925035847008169343842992827480 105
UVM_INFO @ 98085452 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 53511666203236308610224579975799365674448390082089618253246847312027720641279 77
UVM_INFO @ 3247947 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 14053442214983475832989885229986854430227828533553686604913344300519135041993 79
UVM_INFO @ 87125524 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 2632624357257651524550040736374667890569847653610636995036324014546755636995 94
UVM_INFO @ 28453596 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 97346582821469763472219594525666386730636757289672841818649222232275392127958 78
UVM_INFO @ 2933102 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 30772211467711672226496805799823220900613418908423563172248971371582545076703 78
UVM_INFO @ 4196836 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 30202885263425988146306346960733457521186754669766555416123459607642606241300 155
UVM_INFO @ 39243168 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 92671511601309837652378641798253933541262395808763853574404359638016117080521 78
UVM_INFO @ 3226932 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 82534619774261224622980383717849385528459697236694080415106079223163475870712 79
UVM_INFO @ 20761181 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 73179054058054758873002878124810802862614082062066237119050342458491819362162 77
UVM_INFO @ 6597882 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 14856752364899785733471582042505401904691751836055169782940778824227829925184 77
UVM_INFO @ 2577471 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 24555716316841982934373668337473363941396425935515345349297754481104117965960 77
UVM_INFO @ 3069835 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 28716030116373740699001451073543476159631177537782269223951173730573502494758 86
UVM_INFO @ 70043279 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 115775725726590029129906642389749642022709693482679347970952858843705519587186 77
UVM_INFO @ 4091801 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 40429609740323402271867746023240575533686388657894742969183805605383911168030 78
UVM_INFO @ 6014977 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 63643990206693050999719865558895955957510976722718227262334182885540849782382 79
UVM_INFO @ 10147317 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 88205224882388262582801249993067435690677687880521197946811985924591063794786 77
UVM_INFO @ 5019952 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 101965594621759018564617110030428184934396640086475789581138083789776874115275 79
UVM_INFO @ 6243985 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 78622545869273156626863038286212850822915847663176364752192041698169119304493 78
UVM_INFO @ 2702620 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 27742828474755933003458931532712240181570803525734511743419898747306609733364 79
UVM_INFO @ 37853974 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 15298222948716104684054836850047219170580845259299053544418300639040932541027 106
UVM_INFO @ 32637893 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 26283531927403161065488570061467008500622765551291192342947274334871963909366 78
UVM_INFO @ 3095182 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 60287605508752290647703329259406683381656487183588797808873331163363212915289 77
UVM_INFO @ 3665854 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 17376129584336449895987157898260132039849167879749562011350493655351397659349 77
UVM_INFO @ 4767847 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 91843357243293254212031351894212232483324096390700391899302999496343999328596 78
UVM_INFO @ 4997943 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 19066550143870010506258337966389613046360475028985771484543880103530520977445 153
UVM_INFO @ 253039186 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 17008526650782852006773284797336514528191119344687861594686899356145744950860 78
UVM_INFO @ 3025894 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 54963342190019913531045656025015991937430855808949928930620320880614104030828 155
UVM_INFO @ 43814835 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 93265569002580752905855652103063145181468253031241069111763826303602636777189 78
UVM_INFO @ 4856516 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 99372013428625946504878946970824886907897102105785083940486242210995260727452 78
UVM_INFO @ 3495461 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 12408687351348517237954592256904244566415994898817019869975314546986625132659 79
UVM_INFO @ 5761485 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 85012362064436321637214664110466275894034500284754148688431423330492919584872 77
UVM_INFO @ 47730453 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 43228733787912408316178405328494060705264392672525498842110083785617981647729 77
UVM_INFO @ 6818711 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 92679421817670012938104153678448204311006596758690285989382181168555056230358 79
UVM_INFO @ 10188324 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 100294630455610020780137193994419528897786246675195429406987939981598625365270 78
UVM_INFO @ 4469935 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 106620890973852746113815398108127501103588627842256863988572450862055620234350 78
UVM_INFO @ 2717931 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 6164951160303074383591125786972386764631989637697712284664541135668464487482 91
UVM_INFO @ 122730591 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 66269009051016296863079429679293929305699436872050908599199328749300585613669 78
UVM_INFO @ 6915257 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 25135779617665107207102258640077675357942898814523565231894816242625286474344 78
UVM_INFO @ 5724413 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 89202578535057773062921403065920291830733314822543620921582161574655579251961 131
UVM_INFO @ 198058695 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 35915056323152158692923246169346018016961300658326378310053621831121856446927 78
UVM_INFO @ 5315978 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 48763401663222098227856317887587575071314158117384650734074464772675332768079 79
UVM_INFO @ 3856722 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 79234555413183596408096775949014045982232838872240092073985063155154446034462 158
UVM_INFO @ 259360312 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 6495949771997164604582118305178930459952285234727711263710682222655626294003 78
UVM_INFO @ 2928770 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 77321753291176448202435525379374032130185631723923623074537037993018524330631 107
UVM_INFO @ 147775920 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 12565645736314550958556169316757732689872184664952332430663780739822899466230 78
UVM_INFO @ 2935045 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 78152179852003269326867113787063594145144992530552803644070822310516631350880 151
UVM_INFO @ 164449387 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 60550628039901078368494256006592491505181338748077234284183104383397482404498 78
UVM_INFO @ 5443932 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 21669022354448426418922233347700895997663075609834467225478661989171855840805 119
UVM_INFO @ 48660475 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 47209241667953727812330470856371968281154421381940348120412537156123910015902 78
UVM_INFO @ 5633151 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 68811349402117083964483562823663238836691478640053837586891801382732495598225 93
UVM_INFO @ 46567712 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 22457889068145873919056022944538226678514965665785715073860623049907240857265 77
UVM_INFO @ 3373249 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 93220998232058505183480665723304636820594613422658583128914218410198237822376 139
UVM_INFO @ 52154807 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 82822222992822961040414516640378373083520788002642863897878293082908557216613 102
UVM_INFO @ 53526421 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 105285900747752453307945563674871087261904676829706342261070511081729965730258 78
UVM_INFO @ 2472180 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 28231579622421244956727128767849014357862662572963585643433708270608572018361 78
UVM_INFO @ 2049163 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 86782681382441632774847802551785889760866982424749719035968131969540362237591 78
UVM_INFO @ 3130463 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 75769476673209795732778530072561412107769303540048453170857103782840830936842 79
UVM_INFO @ 4861234 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 82416805306077552178579580567893912108681193025373789027886986506900289570564 77
UVM_INFO @ 8495706 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 101657737183127058613389432677045902990241078266850736391473486828612551622780 77
UVM_INFO @ 3964131 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 17739089840086142846660370508439785197010892251711768687179855722632617426105 77
UVM_INFO @ 3002011 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 111650461737599037136142909618940891902918337618974870341402298837297287141186 79
UVM_INFO @ 13926675 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 89764158671631298150278042010986601199181363046862508651094804690358544244439 78
UVM_INFO @ 7728981 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 63983585314680824695057874314846138855382517782821497580736907644718557289840 145
UVM_INFO @ 81411701 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 92861925356645067056642850225202038085983984690670737127168354655945240477903 78
UVM_INFO @ 2231677 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 101478394076969211249389614609307570837053158197155642346220201025858882868851 78
UVM_INFO @ 3024209 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 38805612575662189696578104437542389678464213457117271250771433864163511007207 79
UVM_INFO @ 12779101 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 47136548896346022738834736755228731938973180311327101236761571881093192393223 78
UVM_INFO @ 4041382 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 60061089087259115113376262657835439099806941995957960887563877512373417505768 78
UVM_INFO @ 186803970 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 61764957718230460271268216212464563172862542237440442059995821565188557379285 78
UVM_INFO @ 3072317 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 66567700022388384392462174686611972162917952576666582943604222286143996174451 79
UVM_INFO @ 20727341 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 15111984699753769645230433531127798615294722398703425420601056266404616117412 78
UVM_INFO @ 2459169 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 30561129195131875560970645215984668295616960551621220945588719713215618233292 78
UVM_INFO @ 5224706 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 100382682640944173904625450306921037374319194680954346874578296023053136813415 79
UVM_INFO @ 5293375 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 80763703136565750552400807575438986674136959176809859820518992951693225469135 78
UVM_INFO @ 3889371 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (clkmgr_base_vseq.sv:320) virtual_sequencer [clkmgr_frequency_vseq] Mismatch for measurement recoverable error, expected *b*, got *b* 95 test runs
clkmgr_frequency 567076019654148192941023888281073856313945334569548074257788840397574199601 76
UVM_INFO @ 9832435 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 51600807310246753263838904308676250679152329022837597911640201499313453658243 76
UVM_INFO @ 6423977 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 73675018859977745581482384423574361425166564159140459352906312453876513889586 75
UVM_INFO @ 6850929 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 40411218612078916191354045100232716973438923148723215160599462191272056288974 99
UVM_INFO @ 50789128 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 43530903491762961430550749467749187939435614589831801563101882141679107572061 75
UVM_INFO @ 4350752 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 44454579852259829020190643491261999863964336919353927898685956584929799868024 78
UVM_INFO @ 40506535 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 92811346405894584079618847246304294928320919384114267549269783373709790946215 77
UVM_INFO @ 6341318 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 107065387662315476581861689108709764810349308541243939144711087588533649060593 75
UVM_INFO @ 4651985 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 113411483331776410230402224865356366068400395005480006037206483499903813164792 78
UVM_INFO @ 57591052 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 112511395926716327936328987155765855214094739598077779912945052283278119223679 143
UVM_INFO @ 115945110 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 78828445645661568190884910855699103594638397062951475714960399093152707491187 75
UVM_INFO @ 7546327 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 87536356343159138786971836506467197163278372248125799451818043022841914237293 76
UVM_INFO @ 6356310 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 106725552424157391225866060657004417554949992382859050929466022980919078563157 78
UVM_INFO @ 36819593 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 103039789432859848288887378142727654403796632144588435290553692242464112917782 76
UVM_INFO @ 7255033 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 105161504903469613049234102177694260593568757476359266375051441362314330939157 76
UVM_INFO @ 13765230 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 9469181331234439578799519291482280829736255084356492414865577231892814720795 78
UVM_INFO @ 43208472 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 47285319075038582744778041112102724940176017771426678401928601800041940452823 75
UVM_INFO @ 6309559 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 100626227653534452354966928264937318233853607655084868294869215091753806711228 77
UVM_INFO @ 8876551 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 14356199465145980685514378749613119264876794543181857453985315676489984794514 76
UVM_INFO @ 44695692 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 64616000087004888855191647739719621527717126625243719748657723444602680949332 76
UVM_INFO @ 15176914 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 24870375748837675042192688235707526852737097272059083829568205497596075748795 77
UVM_INFO @ 11935705 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 60112094720207752102776061679443771569396429055679235520458976312856757226078 84
UVM_INFO @ 91461312 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 82878621836450233667972733955941336917141083389321368192539462627874729157004 75
UVM_INFO @ 6205248 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 8647327831841696067493090679810829864507082401309115292242881592015637470872 76
UVM_INFO @ 15861765 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 49510258156673008435627137978068381307670324081898081869491750756709809285888 77
UVM_INFO @ 7194484 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 59570523769390315781516064454797406669168928953170249879440266540474736758748 77
UVM_INFO @ 9504572 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 41728465029617677056984387388222079922845581018999718099653729057459767562454 76
UVM_INFO @ 11233155 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 102289603782371456205755037237351937183744995069522440120337218450853120075565 76
UVM_INFO @ 5305600 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 111828898696018952857165415211109902067837609199044106059388094025992422073123 76
UVM_INFO @ 16594822 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 65146542325711105015955179669525672012229578332967145045845234610434338240903 75
UVM_INFO @ 16014595 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 80605458097584912824021093477405228410383755944225309615352454955222461500806 76
UVM_INFO @ 8917993 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 100893466371796175490149168149010424304222563234541406858756029197643460858161 78
UVM_INFO @ 42836257 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 54369238512034071093629855246679301110592123644711943638334410955791721561067 76
UVM_INFO @ 15025473 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 44680436154784427689672063023549621458316897167931474174041678712487954772419 76
UVM_INFO @ 10067216 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 35068200928155223521322038870169253439438143941231839127458459884929874017095 83
UVM_INFO @ 76067876 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 25851882928249679024732488976509515435537078608070722190036755046892082562502 76
UVM_INFO @ 7490003 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 18061186473266586772321360372496653257625408468276305560833926931206159225984 78
UVM_INFO @ 99414224 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 101220198167299903036554552046917279660007970971712286968684062938424176973311 139
UVM_INFO @ 74182763 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 39768981243290526253131641676194404249218548440577446886244918156523621428094 76
UVM_INFO @ 6579183 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 5910278657973869948069384335019535674857382325241780454804557571992542693691 136
UVM_INFO @ 65426246 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 28062436666666233769423652145917615854355395649724241850943057345355036051394 75
UVM_INFO @ 5558591 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 26100484426705045264260133965010181484870228495029791856833248560205020117250 76
UVM_INFO @ 93515089 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 52930942908260279927336384351737167709402943839907687120668151344986003895941 76
UVM_INFO @ 4119991 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 67507385540874454592788645693116049989268474558455830264249710450842222877768 76
UVM_INFO @ 11478359 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 106034954933699048488397995867831713854704824702743679949383547959494702984128 77
UVM_INFO @ 28561443 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 19637593859957187921506335517783750004652349578380188247125235791014309763736 76
UVM_INFO @ 9002741 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 60716514414849770140843416789562952707856328978483522970463072800105482944388 78
UVM_INFO @ 32472717 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 40152334360075902832164728369581118047226169517673102968476538799690072223150 75
UVM_INFO @ 6663068 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 98469646132778019310044107732753393156721306601855958059226378954597149496331 75
UVM_INFO @ 6764195 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 38789381176231841283813606508952977211793477711077118642016027837204782660676 193
UVM_INFO @ 635622952 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 65441739273140700104507368611131898770080952634823000520868267236037692895318 76
UVM_INFO @ 10473231 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 38051880313060985212569434753328055260763761613755493122297814471732353299538 76
UVM_INFO @ 6761888 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 13075072207765994614162214448219599353525397664066031668846928193900585719015 75
UVM_INFO @ 25140026 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 31337287432319014303587410008192465935906794602542467618441490465370082755262 76
UVM_INFO @ 20762119 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 41008716471997234250012139677370133192545946243943145691962491564656664283089 76
UVM_INFO @ 7113644 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 113054118303887661465297928613934755136262027587316526791422605122264569381664 88
UVM_INFO @ 26660646 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 35087736049569212669087157190494519693885956569258874594386554423432528679242 75
UVM_INFO @ 7828552 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 12063808999448701355021378632534072045265725735162727719818611061585848259537 76
UVM_INFO @ 6887121 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 114558094298830640539743119025954835400736089573088671998365637450843014452440 76
UVM_INFO @ 9852115 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 93605010940019253232373119555982698704549874236711212633756429926665672186289 75
UVM_INFO @ 255619185 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 79882842948820936104615536938016188426073035834327853199056587276024568746973 78
UVM_INFO @ 8034106 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 41543388660677588709297920702135582311819565467368396428085496510510807337199 75
UVM_INFO @ 11134327 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 96940869019731447057608338058713885973625954584193013354656326967212034348354 77
UVM_INFO @ 42062463 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 56917984628459923773994128304378699511929686652593362704075835253222827727231 75
UVM_INFO @ 19820183 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 78750094335714043356569797989715548640470973920881032908574108391736494227268 75
UVM_INFO @ 6197407 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 77264068523727193776150269997460688988574352953280443739856565875820789214096 76
UVM_INFO @ 138005665 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 2573899775259208028293584585519557108942522941143541013246251013853595131414 75
UVM_INFO @ 48899106 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 113835455940944073057253138734814283419640663107621219428177246827199789439925 76
UVM_INFO @ 6679596 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 109596205456730889932316207545586695879142192044235935574320535761771001368027 75
UVM_INFO @ 6966132 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 14903567795515121957510868597318575187449881418143834286742317278579640805399 94
UVM_INFO @ 109974844 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 95200101229412437674801513380545034239783114442597008461623756568801108806448 75
UVM_INFO @ 6807733 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 38334261324277965255110290421463215885601837152564627092264962215174603679648 76
UVM_INFO @ 21145144 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 108523271594500173336255495547442098269696752873420178117113687266995706789410 77
UVM_INFO @ 30006976 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 94975411657135843839638311377594098876797739430949976556418081303669920532014 103
UVM_INFO @ 25082632 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 9007586689750025496765347787594779997209428396991630230635050444073191943475 76
UVM_INFO @ 4118892 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 690701826759157490024662271227369704378638700591957852161226560646619477912 75
UVM_INFO @ 9757741 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 80598492243408144558627859634553054804910894076623546628660308045960360997418 83
UVM_INFO @ 23800732 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 67668955345875653468001768078181828058738714592098572983439892165135531127240 76
UVM_INFO @ 152578946 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 77761860954688363273336096623203259995749858364679591680274268589686334067387 75
UVM_INFO @ 4919131 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 45578650899452286891759171833774208992590037078723388060470235613053974591156 155
UVM_INFO @ 472444708 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 69786837376920924875501028069441923175084925315287960481552224613155281053184 76
UVM_INFO @ 16108273 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 62133943329208596083368795672488473494282591168979020096584384371344066846471 78
UVM_INFO @ 10807452 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 50311580124713268666951948459923176397562847218208813238602145082531976199202 75
UVM_INFO @ 42559362 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 51385873901592661019477014122280690476600948442764591520433076483897378351403 78
UVM_INFO @ 635369816 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 110286916949779504376454249741542530539311001870094116503493799490947431006276 84
UVM_INFO @ 122844314 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 34458777032087667831833432799729743296161900952503214626434428843412356401548 75
UVM_INFO @ 5608813 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 103330422179217083899176432213634949002956929785302956059685604404528768497732 112
UVM_INFO @ 39188388 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 795183549357694711926081532738509534100200957465472819198599499113051385476 75
UVM_INFO @ 7379743 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 26749555177552910296141754916161578010637434288981286285218835046808146536588 138
UVM_INFO @ 398812532 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 60196654817920782182190925683852989066410610987491553896084118927073072256577 76
UVM_INFO @ 5737205 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 18510034558972408355920119096024897448948315655092534568855918430306988000934 76
UVM_INFO @ 29060479 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 115392325480508537279399289731853154660272847500738441650978692513981207849755 77
UVM_INFO @ 6611891 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 73062013249579006269107317700017656020613448879625349391521194662218955631099 88
UVM_INFO @ 2886278551 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 63714524678096756286169573661387990996565400029650525053121116541536895297757 76
UVM_INFO @ 76738633 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 39350909314496732925991151777717043295095852165998620105821125828385072636510 76
UVM_INFO @ 7734137 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: clkmgr_reg_block.measure_ctrl_regwen.en reset value: * 40 test runs
clkmgr_shadow_reg_errors_with_csr_rw 84153880506194546280264631939958634440612513309631204145309060811912579395167 75
UVM_INFO @ 3152982 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 66690732745348831475374631436014627649566069879680254205187976888101507322999 96
UVM_INFO @ 5611025 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 5271173065404186266396684185748740087639408853443427587507630315907085746366 75
UVM_INFO @ 2859322 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 30757274998171136006508426668914896936634476791936455185571024547881186354320 96
UVM_INFO @ 23500599 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 109476762350119904703411351872227474740613616481456428721097888917145981064376 82
UVM_INFO @ 32965167 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 81865298717159679053206552963825244098038023722554028433664917990521027342650 97
UVM_INFO @ 82562445 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 27311413116817003163037782512992974428898514241749688300474626354646139624723 75
UVM_INFO @ 10151108 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 93703371434207748632411704587977198550806148932497922641169910807906277853116 83
UVM_INFO @ 13065637 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 45091485477009864705447772117648176794337412750871558507197526817203209783315 86
UVM_INFO @ 7626287 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 73981247266712522849767998565037190082768944269588926103586386925505865930193 76
UVM_INFO @ 15457199 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 90090473911328622119942445872134755143259718795760786499035164684090009551872 82
UVM_INFO @ 35198652 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 87827857701390261765671564400818744974893354238708908530979141217829273600765 75
UVM_INFO @ 15468145 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 1097259080650554063129028580622104621080524607095711502799880916548820084832 82
UVM_INFO @ 35567146 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 56451713991634573602369550151827607630598351996086511185696211527706588573362 85
UVM_INFO @ 2921096 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 41524627959126957312252969511341314540982981632503195833850919466728141680375 82
UVM_INFO @ 20730631 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 78067258299884355545428227061134077466454214354985853128226077751436262359261 75
UVM_INFO @ 5047552 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 110566076532914206310721418364507929107391234510304437483661450638184206395827 79
UVM_INFO @ 7333641 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 67812605716467489077782259003733459206686642325830982792257654006101009773681 76
UVM_INFO @ 1462242 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 46789997369493810972342417752231514612036845193413717747483394970169854465223 75
UVM_INFO @ 3687516 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 61250850851947218734290338619809306609883381886347900702081010877292050024575 89
UVM_INFO @ 20903448 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 5014112929698493451399490979999442864848023646560472982003751332630582613229 76
UVM_INFO @ 4389601 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 115726499873073419693953786220407745805319911127764240796805395573831700066157 76
UVM_INFO @ 3347585 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 77540665818267178533344738780400522251561056859398910633147917774268183155728 85
UVM_INFO @ 8709137 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 38934240855602900007342367945569256631445655789004788162772247276386542745206 75
UVM_INFO @ 3558403 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 102345333243140198291943495829144911700872957802637688433414436978153908911888 75
UVM_INFO @ 3231814 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 63462400929330016825848320583491111297792633242334824989087304655121503707023 75
UVM_INFO @ 4576986 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 46264925670724861519904810269025014478017897408776355078551784035638972754679 75
UVM_INFO @ 25003393 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 48042355399037407297870364795526086477523121688031893738287053262424960873213 75
UVM_INFO @ 4352211 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 91589081838383181733655193577195555027622883771671426205311027478613993162270 101
UVM_INFO @ 23034204 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 83725781959280655323806119347816440780294852328957682266600825669716941846510 76
UVM_INFO @ 26109855 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 58129364263577028149591160274740777290810609512944720200232954403178764414266 75
UVM_INFO @ 3347229 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 46334110682961416156780320579011878084971033654414171724158078151073050096400 82
UVM_INFO @ 15087591 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 4753882914688371454767156893064323578878936122378766207685140565028965624442 75
UVM_INFO @ 3584578 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 19857105002610966823228175331190553835608703849980727667974103280541185630940 90
UVM_INFO @ 21913446 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 70195641020256214305421059574153284574747340037078274912142947096553644329639 75
UVM_INFO @ 4570681 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 78243249399259698411264553014327093910432070383806351588346633137976359094441 75
UVM_INFO @ 5928450 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 31137903733921685149828254737753743799156889908285754963517244413575435311635 75
UVM_INFO @ 1848349 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 54221498215415862388866036656137850554762975334344842829483506203594343794844 82
UVM_INFO @ 47950690 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 42943960411590055021408731860142234319391990220410487477899931069503809035643 82
UVM_INFO @ 3026587 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 54116310204891221386928595558349481608291674856660460144862257888828868239893 82
UVM_INFO @ 16714964 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: clkmgr_reg_block.measure_ctrl_regwen reset value: * 33 test runs
clkmgr_csr_aliasing 71746841670251551750986529283436234869265384904489104827412119473614157694044 75
UVM_INFO @ 10759933 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 104565851792569082603467717067842609843217919599483419431003062576319050264964 76
UVM_INFO @ 10111592 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 97331208601833615267333269791525447470604720811609976333676105876304482529610 75
UVM_INFO @ 2702108 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_aliasing 9059940514093864879490892978943137993470525785074843588163629675014852373175 76
UVM_INFO @ 13738970 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 3031371056690432553874335416306823072496972268016230037340942033931127928452 75
UVM_INFO @ 3180894 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 47986918116264276439719497792484055770085904799579392890801202449912433542323 75
UVM_INFO @ 5272626 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 100411242530204833879998899600785402630532507784243660637771386700111883616368 75
UVM_INFO @ 4801285 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_aliasing 108051455359018704109705490202023924507010559352937557677521403155280829780642 75
UVM_INFO @ 5960253 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 18642232537041775261642489781633156346422790496530896730231503243320837647059 76
UVM_INFO @ 55295972 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 52162780064562267125115259849495197241043199075849717118948381719571669688123 75
UVM_INFO @ 3514456 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 93915537404092341243952420213016767547006366098121823500880011980775825174846 90
UVM_INFO @ 9814973 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 13781524597850909985504500076307273573968775396596042553089332808175469386633 75
UVM_INFO @ 8809573 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 77579337184461065177776577157357150473944545819034313288987348146533401921445 85
UVM_INFO @ 12352967 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 100072280698123727001097723003498326104169527808830773621967268369528026363088 75
UVM_INFO @ 20961416 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 112811206039333311878959668508771681287920228514576676222037043559869071760314 75
UVM_INFO @ 5847746 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 7113357605533555941696576603994039074716776269897680262664529264704299056740 78
UVM_INFO @ 5052961 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 71969534040378261495458511808824260854179896380178803322392909839691064950778 82
UVM_INFO @ 35979946 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 104722404196546377726978104161622667073336698907947211611470992701506509843112 75
UVM_INFO @ 2252131 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 106414998226653930696374745991889470367396962632539681974290739561999512157744 76
UVM_INFO @ 14933490 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 107887268873093861737609416539830832943773097112370193513222847966655293474686 108
UVM_INFO @ 50983413 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 4699123157979725272397573335694448190847965165379053540579761540299057361337 90
UVM_INFO @ 15451955 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 25539940349448033993658638180260989683188981289022569407903975322590780028678 76
UVM_INFO @ 3228077 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 50875051417133844693304601074194699243286282402501807280916617050149383583159 75
UVM_INFO @ 3756366 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 61258901963848232627367673625725719491319024062287796175945847026170735816327 75
UVM_INFO @ 3036264 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 113718531941755924900945043794436316532706461429131801738813227593187511679924 75
UVM_INFO @ 1095960 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 60688022595047078060928375861453019479403745586260133212260232432505218173042 78
UVM_INFO @ 8561739 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 108551513950748174364526721427320975276297132916737046343976011407391529250494 76
UVM_INFO @ 11567441 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 41620503756020379832850121463552817471902435748628860228422523477696758107398 75
UVM_INFO @ 14280452 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 109371245613513860269782631937274935072133827779077078021503706101110826212894 76
UVM_INFO @ 15305228 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 51470541277033444122357318442125666995983794827072376334650119125180639203831 76
UVM_INFO @ 18850660 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 8640144206400498171171402515421302662375216863110547040764570723375133041293 75
UVM_INFO @ 4916141 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 3769776394634556042475689288778360670107146149226269191979218098504446140725 75
UVM_INFO @ 6726394 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 98322689891590360471975874566483864700356843395324475718398864222899620215676 75
UVM_INFO @ 3105714 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (clkmgr_scoreboard.sv:257) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: clkmgr_reg_block.io_meas_ctrl_en 26 test runs
clkmgr_regwen 7331266875955126842801206469923513233619231848984285160383126544638941986560 74
UVM_INFO @ 6515594 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 95432215655171198195668193388026936027000183591127025708089845455207961952477 74
UVM_INFO @ 3672544 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 94291890256818184439671955533643747371915361765259177504642271603853465078748 74
UVM_INFO @ 2534699 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 52671006875018979005915793321122431460175376280099499491501586990177762877913 74
UVM_INFO @ 5500709 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 36470200474876440068270596853525035610965847233034266182110899238639251529589 74
UVM_INFO @ 3792158 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 32548512885522408340778627152956770160954011980978953629903502825197360865729 74
UVM_INFO @ 3532470 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 3590615600102928693350362993062259784007709617192908993550469057940645581708 74
UVM_INFO @ 6102234 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 64541323513171859762583161339175585517028949195072781644529475024485171576748 74
UVM_INFO @ 6907295 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 94523811842056466004027825668884507922422268091025962750375789361979073548692 74
UVM_INFO @ 2122679 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 100164488202172391049358667195711773794415037976554224474972673717913139200174 74
UVM_INFO @ 2923760 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 47319196072204936490451753400061890022237115340160241186164592884596480026214 74
UVM_INFO @ 9529271 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 6535329947621780380870367600403966234852440358824183919902848705538836758994 74
UVM_INFO @ 3024807 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 86352051844098992669383171138086923448115010377296060178110402733827246286019 74
UVM_INFO @ 2780360 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 67362988391887370632075730300738669767700931419107951730754007053234832428790 74
UVM_INFO @ 3436162 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 51108612646620512487423480313906299088778332506169071729149718331812832948211 74
UVM_INFO @ 6669812 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 101976296379849814872846755053204899305341296026152552689337729366402139638638 74
UVM_INFO @ 2825038 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 5081196019251741219445782580664573105405853661313473325858123596280011550234 74
UVM_INFO @ 3607703 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 7727404804163351028196829199755198221357149817255558740125871881383045797241 74
UVM_INFO @ 6332326 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 69185277427732874658135218886805955055798121093063527030913176028036312864630 74
UVM_INFO @ 5593385 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 68276926985622690148536368138942952920577463417746944578736935628146779822698 74
UVM_INFO @ 19935185 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 113972281178621298624098498789634319052135732834345777737615719597650771501657 74
UVM_INFO @ 5521682 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 72614871023504020638719016555472907060188398715196555481422690315427215988273 74
UVM_INFO @ 4772809 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 36357958429414823353209244234516648355285066096107330675735487173974345892825 74
UVM_INFO @ 6204286 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 50678547310521451466858482281684177345827301088813521474921180842161126706074 74
UVM_INFO @ 17946319 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 49438373167513248311490830392149792224124166456784462217228397765781027057263 74
UVM_INFO @ 3218452 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 97555002978594819055140725456347668064330566223250218218900945868689282759600 74
UVM_INFO @ 3190795 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:649) [clkmgr_common_vseq] Check failed masked_data == exp_data (* [*] vs * [*]) addr * read out mismatch 20 test runs
clkmgr_same_csr_outstanding 10449161475248052816414506978284813958385596501933467191053105348101280166365 75
UVM_INFO @ 3578808 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 81740100917395048059063824399172179670219299999772441153670340001791275501205 75
UVM_INFO @ 18329112 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 29202447369009851123208320041912887304919341822288266929046833580140429584014 75
UVM_INFO @ 5127092 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 17573533127036118834760041251567563878575281901536739932038583229536404582233 76
UVM_INFO @ 13346566 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 88232393874463138990804269608633282231698575525900920870431517025307069965063 75
UVM_INFO @ 5148163 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 15415319563636834093842119053856687556650004520448799772803851650050701606459 75
UVM_INFO @ 3878563 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 61823658523776764725885754845160933730701367700418279171185684734736367653140 75
UVM_INFO @ 4062398 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 114810263039157802575241642226996392439910544548809007862787644466030395702082 75
UVM_INFO @ 4932854 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 19113423678095354719483060114012565855009343418959934761229787102464174405425 75
UVM_INFO @ 32224762 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 2007781692849607044635195813393034541246828050883749020388853022639933374989 75
UVM_INFO @ 13779073 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 93239381873223184328593129097066053388584971646094805414938898685090934006466 75
UVM_INFO @ 20525190 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 6173744555710534966763021433281245610710881304848384809874525883808938732685 76
UVM_INFO @ 43757864 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 100134903523979748993900079727293149794411230886366479796851172488767296972585 75
UVM_INFO @ 2424342 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 25072878164518661595449998463902762650333331902315605987433404344562096220329 75
UVM_INFO @ 3083249 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 106022711586752922158695862972710819831263649388304978314058387371121223348814 75
UVM_INFO @ 8675780 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 45649687169783621708043690932753305896052922467963497946039299369606159832547 75
UVM_INFO @ 17601228 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 20900592437256942817605542124777631872108986520628197418439678855576595686724 75
UVM_INFO @ 17175842 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 14276210808490257194964793354134469761382152656774433202888140819197533533163 76
UVM_INFO @ 6469809 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 91319602474920267533711071444678536860588446883601012373850977273094412628408 76
UVM_INFO @ 112791727 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 106828099245544061038266772576359596274064698402546412055478380643488757838462 75
UVM_INFO @ 10314900 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (clkmgr_scoreboard.sv:257) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: clkmgr_reg_block.io_meas_ctrl_shadowed 16 test runs
clkmgr_regwen 23103157814036696759044504233569236272137612062325826633877747088140548192704 74
UVM_INFO @ 3652053 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 108740223098159262426550539511929959415154400740208897103810187995549053037534 74
UVM_INFO @ 7475662 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 46980797714364591589100502947563196335395912658051061669013393685442980614286 74
UVM_INFO @ 7637083 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 38119336450064694065691943741713313493348350196863678100318221085410821644321 74
UVM_INFO @ 7672743 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 7489666114189442207426408777023312990929578792818688097968847989343599124891 74
UVM_INFO @ 4393351 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 56733258498635569069365076762086981308653056926685857255325914578627389942430 74
UVM_INFO @ 5033477 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 84143346244961302139940607997511266917021564267610553984956531467419097855355 74
UVM_INFO @ 2285945 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 77873120318313930511882802973257243131082328901826063771689599536012584609076 74
UVM_INFO @ 2757620 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 91229509511366977985225676074655668318057297156129906914476676900335122419576 74
UVM_INFO @ 3107358 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 42298287535128962388486010843866038392841114373203243739087630876105802722805 74
UVM_INFO @ 3379604 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 11752184033431326443263334812285092511438668053991576868693995850295315878859 74
UVM_INFO @ 4594315 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 65629830602044476836872806870403738942806524180560804977674173926173722936863 74
UVM_INFO @ 8050963 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 55492287980314784377360232203799579770232864471955938035024336695200474340882 74
UVM_INFO @ 4762222 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 56926440713854811011271791821201637935223178452815608321625142923176268006202 74
UVM_INFO @ 7603190 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 8827395561674773213738395332737970512852644478884377682091429138360577975404 74
UVM_INFO @ 2390035 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 33933314219504685295753257242488592773621331757635814385410129358704695625240 74
UVM_INFO @ 1536576 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (clkmgr_scoreboard.sv:257) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: clkmgr_reg_block.main_meas_ctrl_en 6 test runs
clkmgr_regwen 19321418180770195021647435786038979376877339389472116550294349471487529062642 74
UVM_INFO @ 4460548 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 60831092846980096651549107925518242068098829913515668683165689160034717133302 74
UVM_INFO @ 5240431 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 107940040399526003399168376472132805369231139866788770434611745077404728594179 74
UVM_INFO @ 5268212 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 87625068185282173651730343042633548878541600698270351506815871638238903363755 74
UVM_INFO @ 4266953 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 11673681563966371408067975324266603212567396359088573329299039100455382565347 74
UVM_INFO @ 3667258 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 80712457885412287679454459112838213991963667844451789288852900077313975500426 74
UVM_INFO @ 4592708 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: clkmgr_reg_block.measure_ctrl_regwen reset value: * Wrote clkmgr_reg_block.measure_ctrl_regwen[*]: * 5 test runs
clkmgr_csr_bit_bash 24797352238411943719089479999013069549922571808394424094959561522475235593120 75
UVM_INFO @ 137183457 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_bit_bash 95884225413510865863997738896624597248789241394971695898108532608347043997429 75
UVM_INFO @ 461458524 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_bit_bash 61001885916900364569600955737150333879760642597730434766595982806869680704763 75
UVM_INFO @ 48541474 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_bit_bash 115673720714530446690329896307538557748952872794687606984559450544059457578927 75
UVM_INFO @ 268987234 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_bit_bash 62195770283903505338940025667990514501438181822677167276801528547732530279429 75
UVM_INFO @ 24048641 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue 4 test runs
clkmgr_shadow_reg_errors 17424537641358267150265107080764334107112224402430370397809635792247961271888 75
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors 13022940847472574131332505517765676364925322048080598419385044821988486505340 75
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors 36289633682092490491557052793764933918351310702827299500946591174846398857200 75
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors 74758014799800822164881421792851810838201681203803634607151179495746843598540 76
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1022) virtual_sequencer [clkmgr_common_vseq] expect alert:fatal_fault to fire 3 test runs
clkmgr_sec_cm 78414201415387946504424580996473269060472362752781404016377756101019386529762 81
UVM_INFO @ 12460528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_sec_cm 16216866964121608734403135858582617064115134097913085743773911332075656938234 77
UVM_INFO @ 3703097 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_sec_cm 57058617834209154085524796507217711919486295755215777938587974080527402707696 157
UVM_INFO @ 87686864 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1030) [clkmgr_common_vseq] timeout wait for alert handshake:fatal_fault 1 test run
clkmgr_sec_cm 88136062119968301510681110371477979866364800954582012383812883105834902973433 91
UVM_INFO @ 10016188478 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---