Simulation Results: kmac/masked

 
09/05/2026 02:32:54 DVSim: v1.34.0 sha: f3ee88d json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 96.69 %
  • code
  • 94.11 %
  • assert
  • 97.98 %
  • func
  • 97.99 %
  • line
  • 99.25 %
  • branch
  • 97.08 %
  • cond
  • 94.76 %
  • toggle
  • 99.89 %
  • FSM
  • 79.58 %
Validation stages
V1
100.00%
V2
99.61%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 50 50 100.00
kmac_smoke 88.640s 11113.906us 50 50 100.00
csr_hw_reset 5 5 100.00
kmac_csr_hw_reset 1.420s 246.185us 5 5 100.00
csr_rw 20 20 100.00
kmac_csr_rw 1.490s 17.384us 20 20 100.00
csr_bit_bash 5 5 100.00
kmac_csr_bit_bash 18.460s 1509.380us 5 5 100.00
csr_aliasing 5 5 100.00
kmac_csr_aliasing 8.530s 531.113us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
kmac_csr_mem_rw_with_rand_reset 2.980s 416.580us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
kmac_csr_rw 1.490s 17.384us 20 20 100.00
kmac_csr_aliasing 8.530s 531.113us 5 5 100.00
mem_walk 5 5 100.00
kmac_mem_walk 1.000s 13.846us 5 5 100.00
mem_partial_access 5 5 100.00
kmac_mem_partial_access 1.580s 34.361us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 50 50 100.00
kmac_long_msg_and_output 4265.100s 117956.781us 50 50 100.00
burst_write 50 50 100.00
kmac_burst_write 1272.060s 59493.046us 50 50 100.00
test_vectors 40 40 100.00
kmac_test_vectors_sha3_224 2715.520s 383306.719us 5 5 100.00
kmac_test_vectors_sha3_256 2338.400s 236196.946us 5 5 100.00
kmac_test_vectors_sha3_384 1260.200s 13743.554us 5 5 100.00
kmac_test_vectors_sha3_512 966.360s 18721.157us 5 5 100.00
kmac_test_vectors_shake_128 2090.430s 86777.261us 5 5 100.00
kmac_test_vectors_shake_256 378.030s 113815.671us 5 5 100.00
kmac_test_vectors_kmac 2.860s 103.286us 5 5 100.00
kmac_test_vectors_kmac_xof 2.710s 319.894us 5 5 100.00
sideload 50 50 100.00
kmac_sideload 453.570s 37098.636us 50 50 100.00
app 50 50 100.00
kmac_app 359.410s 31351.009us 50 50 100.00
app_with_partial_data 10 10 100.00
kmac_app_with_partial_data 371.100s 116308.934us 10 10 100.00
entropy_refresh 50 50 100.00
kmac_entropy_refresh 332.120s 30691.034us 50 50 100.00
error 50 50 100.00
kmac_error 399.220s 87346.498us 50 50 100.00
key_error 47 50 94.00
kmac_key_error 16.530s 7855.446us 47 50 94.00
sideload_invalid 50 50 100.00
kmac_sideload_invalid 8.770s 358.245us 50 50 100.00
edn_timeout_error 20 20 100.00
kmac_edn_timeout_error 32.440s 510.102us 20 20 100.00
entropy_mode_error 20 20 100.00
kmac_entropy_mode_error 42.120s 1720.854us 20 20 100.00
entropy_ready_error 10 10 100.00
kmac_entropy_ready_error 84.130s 60509.780us 10 10 100.00
lc_escalation 50 50 100.00
kmac_lc_escalation 21.720s 6774.791us 50 50 100.00
stress_all 50 50 100.00
kmac_stress_all 2628.800s 112069.210us 50 50 100.00
intr_test 50 50 100.00
kmac_intr_test 1.260s 34.900us 50 50 100.00
alert_test 50 50 100.00
kmac_alert_test 1.240s 203.488us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
kmac_tl_errors 3.710s 269.039us 20 20 100.00
tl_d_illegal_access 20 20 100.00
kmac_tl_errors 3.710s 269.039us 20 20 100.00
tl_d_outstanding_access 50 50 100.00
kmac_csr_hw_reset 1.420s 246.185us 5 5 100.00
kmac_csr_rw 1.490s 17.384us 20 20 100.00
kmac_csr_aliasing 8.530s 531.113us 5 5 100.00
kmac_same_csr_outstanding 3.480s 1217.637us 20 20 100.00
tl_d_partial_access 50 50 100.00
kmac_csr_hw_reset 1.420s 246.185us 5 5 100.00
kmac_csr_rw 1.490s 17.384us 20 20 100.00
kmac_csr_aliasing 8.530s 531.113us 5 5 100.00
kmac_same_csr_outstanding 3.480s 1217.637us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 20 20 100.00
kmac_shadow_reg_errors 2.410s 278.316us 20 20 100.00
shadow_reg_read_clear_staged_value 20 20 100.00
kmac_shadow_reg_errors 2.410s 278.316us 20 20 100.00
shadow_reg_storage_error 20 20 100.00
kmac_shadow_reg_errors 2.410s 278.316us 20 20 100.00
shadowed_reset_glitch 20 20 100.00
kmac_shadow_reg_errors 2.410s 278.316us 20 20 100.00
shadow_reg_update_error_with_csr_rw 20 20 100.00
kmac_shadow_reg_errors_with_csr_rw 6.280s 940.667us 20 20 100.00
tl_intg_err 25 25 100.00
kmac_sec_cm 87.390s 58187.652us 5 5 100.00
kmac_tl_intg_err 6.150s 1439.481us 20 20 100.00
sec_cm_bus_integrity 20 20 100.00
kmac_tl_intg_err 6.150s 1439.481us 20 20 100.00
sec_cm_lc_escalate_en_intersig_mubi 50 50 100.00
kmac_lc_escalation 21.720s 6774.791us 50 50 100.00
sec_cm_sw_key_key_masking 50 50 100.00
kmac_smoke 88.640s 11113.906us 50 50 100.00
sec_cm_key_sideload 50 50 100.00
kmac_sideload 453.570s 37098.636us 50 50 100.00
sec_cm_cfg_shadowed_config_shadow 20 20 100.00
kmac_shadow_reg_errors 2.410s 278.316us 20 20 100.00
sec_cm_fsm_sparse 5 5 100.00
kmac_sec_cm 87.390s 58187.652us 5 5 100.00
sec_cm_ctr_redun 5 5 100.00
kmac_sec_cm 87.390s 58187.652us 5 5 100.00
sec_cm_packer_ctr_redun 5 5 100.00
kmac_sec_cm 87.390s 58187.652us 5 5 100.00
sec_cm_cfg_shadowed_config_regwen 50 50 100.00
kmac_smoke 88.640s 11113.906us 50 50 100.00
sec_cm_fsm_global_esc 50 50 100.00
kmac_lc_escalation 21.720s 6774.791us 50 50 100.00
sec_cm_fsm_local_esc 5 5 100.00
kmac_sec_cm 87.390s 58187.652us 5 5 100.00
sec_cm_absorbed_ctrl_mubi 10 10 100.00
kmac_mubi 358.850s 30873.938us 10 10 100.00
sec_cm_sw_cmd_ctrl_sparse 50 50 100.00
kmac_smoke 88.640s 11113.906us 50 50 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 10 10 100.00
kmac_stress_all_with_rand_reset 279.950s 4028.158us 10 10 100.00

Error Messages

   Test seed line log context
UVM_ERROR (kmac_base_vseq.sv:382) [kmac_key_error_vseq] Check failed (intr_pins[KmacErr] == *) intr_pins[KmacErr] is not set! 3 test runs
kmac_key_error 55130606084461202636826309878662164347632990127498521363671886808072206221689 87
UVM_INFO @ 455158505 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_key_error 50646477276675711468087516977167334296004515456100975842702950681946323684371 109
UVM_INFO @ 1363147306 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_key_error 102724950590246986980095074136862218855158651011008766306487241116865967947018 87
UVM_INFO @ 2802692337 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---