Simulation Results: alert_handler

 
16/05/2026 03:01:19 DVSim: v1.34.0 sha: 5eeb50d json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 99.14 %
  • code
  • 98.89 %
  • assert
  • 98.92 %
  • func
  • 99.62 %
  • line
  • 99.99 %
  • branch
  • 99.99 %
  • cond
  • 97.49 %
  • toggle
  • 96.99 %
  • FSM
  • 100.00 %
Validation stages
V1
100.00%
V2
92.96%
V2S
99.25%
V3
64.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 50 50 100.00
alert_handler_smoke 73.730s 2708.270us 50 50 100.00
csr_hw_reset 5 5 100.00
alert_handler_csr_hw_reset 9.250s 41.896us 5 5 100.00
csr_rw 20 20 100.00
alert_handler_csr_rw 13.380s 145.011us 20 20 100.00
csr_bit_bash 5 5 100.00
alert_handler_csr_bit_bash 431.870s 6731.579us 5 5 100.00
csr_aliasing 5 5 100.00
alert_handler_csr_aliasing 274.740s 18678.718us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
alert_handler_csr_mem_rw_with_rand_reset 20.100s 1679.055us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
alert_handler_csr_rw 13.380s 145.011us 20 20 100.00
alert_handler_csr_aliasing 274.740s 18678.718us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
esc_accum 50 50 100.00
alert_handler_esc_alert_accum 295.750s 6469.438us 50 50 100.00
esc_timeout 50 50 100.00
alert_handler_esc_intr_timeout 85.150s 4522.287us 50 50 100.00
entropy 50 50 100.00
alert_handler_entropy 3437.330s 88488.565us 50 50 100.00
sig_int_fail 49 50 98.00
alert_handler_sig_int_fail 84.010s 1330.830us 49 50 98.00
clk_skew 50 50 100.00
alert_handler_smoke 73.730s 2708.270us 50 50 100.00
random_alerts 50 50 100.00
alert_handler_random_alerts 82.500s 3130.359us 50 50 100.00
random_classes 50 50 100.00
alert_handler_random_classes 84.710s 5812.700us 50 50 100.00
ping_timeout 22 50 44.00
alert_handler_ping_timeout 639.230s 13900.728us 22 50 44.00
lpg 99 100 99.00
alert_handler_lpg 3112.910s 241537.378us 49 50 98.00
alert_handler_lpg_stub_clk 3324.200s 59271.343us 50 50 100.00
stress_all 50 50 100.00
alert_handler_stress_all 4169.890s 773714.363us 50 50 100.00
alert_handler_entropy_stress_test 0 20 0.00
alert_handler_entropy_stress 48.750s 3823.090us 0 20 0.00
alert_handler_alert_accum_saturation 20 20 100.00
alert_handler_alert_accum_saturation 5.460s 193.198us 20 20 100.00
intr_test 50 50 100.00
alert_handler_intr_test 2.940s 21.725us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
alert_handler_tl_errors 26.990s 676.838us 20 20 100.00
tl_d_illegal_access 20 20 100.00
alert_handler_tl_errors 26.990s 676.838us 20 20 100.00
tl_d_outstanding_access 50 50 100.00
alert_handler_csr_hw_reset 9.250s 41.896us 5 5 100.00
alert_handler_csr_rw 13.380s 145.011us 20 20 100.00
alert_handler_csr_aliasing 274.740s 18678.718us 5 5 100.00
alert_handler_same_csr_outstanding 60.690s 11581.468us 20 20 100.00
tl_d_partial_access 50 50 100.00
alert_handler_csr_hw_reset 9.250s 41.896us 5 5 100.00
alert_handler_csr_rw 13.380s 145.011us 20 20 100.00
alert_handler_csr_aliasing 274.740s 18678.718us 5 5 100.00
alert_handler_same_csr_outstanding 60.690s 11581.468us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 20 20 100.00
alert_handler_shadow_reg_errors 505.450s 6049.167us 20 20 100.00
shadow_reg_read_clear_staged_value 20 20 100.00
alert_handler_shadow_reg_errors 505.450s 6049.167us 20 20 100.00
shadow_reg_storage_error 20 20 100.00
alert_handler_shadow_reg_errors 505.450s 6049.167us 20 20 100.00
shadowed_reset_glitch 20 20 100.00
alert_handler_shadow_reg_errors 505.450s 6049.167us 20 20 100.00
shadow_reg_update_error_with_csr_rw 20 20 100.00
alert_handler_shadow_reg_errors_with_csr_rw 1211.670s 17390.817us 20 20 100.00
tl_intg_err 25 25 100.00
alert_handler_sec_cm 30.060s 606.686us 5 5 100.00
alert_handler_tl_intg_err 109.520s 1131.681us 20 20 100.00
sec_cm_bus_integrity 20 20 100.00
alert_handler_tl_intg_err 109.520s 1131.681us 20 20 100.00
sec_cm_config_shadow 20 20 100.00
alert_handler_shadow_reg_errors 505.450s 6049.167us 20 20 100.00
sec_cm_ping_timer_config_regwen 50 50 100.00
alert_handler_smoke 73.730s 2708.270us 50 50 100.00
sec_cm_alert_config_regwen 50 50 100.00
alert_handler_smoke 73.730s 2708.270us 50 50 100.00
sec_cm_alert_loc_config_regwen 50 50 100.00
alert_handler_smoke 73.730s 2708.270us 50 50 100.00
sec_cm_class_config_regwen 50 50 100.00
alert_handler_smoke 73.730s 2708.270us 50 50 100.00
sec_cm_alert_intersig_diff 49 50 98.00
alert_handler_sig_int_fail 84.010s 1330.830us 49 50 98.00
sec_cm_lpg_intersig_mubi 49 50 98.00
alert_handler_lpg 3112.910s 241537.378us 49 50 98.00
sec_cm_esc_intersig_diff 49 50 98.00
alert_handler_sig_int_fail 84.010s 1330.830us 49 50 98.00
sec_cm_alert_rx_intersig_bkgn_chk 50 50 100.00
alert_handler_entropy 3437.330s 88488.565us 50 50 100.00
sec_cm_esc_tx_intersig_bkgn_chk 50 50 100.00
alert_handler_entropy 3437.330s 88488.565us 50 50 100.00
sec_cm_esc_timer_fsm_sparse 5 5 100.00
alert_handler_sec_cm 30.060s 606.686us 5 5 100.00
sec_cm_ping_timer_fsm_sparse 5 5 100.00
alert_handler_sec_cm 30.060s 606.686us 5 5 100.00
sec_cm_esc_timer_fsm_local_esc 5 5 100.00
alert_handler_sec_cm 30.060s 606.686us 5 5 100.00
sec_cm_ping_timer_fsm_local_esc 5 5 100.00
alert_handler_sec_cm 30.060s 606.686us 5 5 100.00
sec_cm_esc_timer_fsm_global_esc 5 5 100.00
alert_handler_sec_cm 30.060s 606.686us 5 5 100.00
sec_cm_accu_ctr_redun 5 5 100.00
alert_handler_sec_cm 30.060s 606.686us 5 5 100.00
sec_cm_esc_timer_ctr_redun 5 5 100.00
alert_handler_sec_cm 30.060s 606.686us 5 5 100.00
sec_cm_ping_timer_ctr_redun 5 5 100.00
alert_handler_sec_cm 30.060s 606.686us 5 5 100.00
sec_cm_ping_timer_lfsr_redun 5 5 100.00
alert_handler_sec_cm 30.060s 606.686us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 32 50 64.00
alert_handler_stress_all_with_rand_reset 521.770s 9462.644us 32 50 64.00

Error Messages

   Test seed line log context
UVM_ERROR (alert_handler_scoreboard.sv:486) [scoreboard] Check failed intr_state_val == item.d_data (* [*] vs * [*]) reg name: intr_state 23 test runs
alert_handler_ping_timeout 13813372847753087459126895549265178603408430781143638845602670634222968161527 109
UVM_INFO @ 3696595655 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 96214336684884500949229625386635235264050371989937248503508279530582723610914 118
UVM_INFO @ 3676633844 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 112791978466341768427571193835396638507869113175813089217703006529272091132041 133
UVM_INFO @ 28236448440 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 55681263189317228368029322407952678593658416267167996569118298149818242188149 93
UVM_INFO @ 2798204596 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 106934164058733258963407059099237687067011864521082635013560032993322453201148 105
UVM_INFO @ 8974788198 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 58640660811091147473826764034072655842103375630704111476400051669023487237295 129
UVM_INFO @ 27940954121 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 19138898163538936352601168513721171272704522445508184858752246299497478869907 143
UVM_INFO @ 27105603629 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 53208482505908863414699890056070422758274464846411866601967887698514992701689 133
UVM_INFO @ 14136387120 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 27161699607054485713818256451003366183402097135208829719003394517776504398280 87
UVM_INFO @ 5667537572 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 102571016912142882282343638540652115801002023999709300284801454955124279168359 104
UVM_INFO @ 12834969427 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 28574095463145534913975115665881699557772179570923309930505043903969513257738 102
UVM_INFO @ 23078823994 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 14204096554467977908830064003522421347615206713380478341147777888779789095208 87
UVM_INFO @ 5101913812 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 44891582563065900170536564976759332357490799123147720178873693157890264680821 90
UVM_INFO @ 3965254776 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 110612691716759211697614160681893790988052251296894214673291951823071958938075 87
UVM_INFO @ 3148354100 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 28829107138548344564069848491427922592247010062763786615736741312692805896185 102
UVM_INFO @ 16496665518 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 94533215852413400362214900518377199424851293246725592193924533230092414382169 114
UVM_INFO @ 121868705447 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 72925190624713132754304045346814902305509740062405944074233535105879299033096 96
UVM_INFO @ 4243831976 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 93227747700331023679728805651304612024233535201844668290756650000780357434669 100
UVM_INFO @ 7062834551 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 83992354359334642073552427683658561842765667832880551345818191615357594652039 90
UVM_INFO @ 2074574232 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 85463918348690013006203300931713215464891312070249656412658065148404435727855 103
UVM_INFO @ 6676679979 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 79572208802447180466516940705975773428456803730646682977868051136150173559906 108
UVM_INFO @ 9121732264 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 18347532408134125264788645880364800386081998676468261565581644800318384508214 98
UVM_INFO @ 10024326236 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 65695602389424832733150028052905899808888253802900666870857434368178229057320 93
UVM_INFO @ 12858972973 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR sequencer [alert_sender_ping_rsp_seq] Response queue overflow, response was dropped 20 test runs
alert_handler_entropy_stress 80269665519632017602572411923278439331045552212743373389925279545704346792633 206
UVM_INFO @ 1912349434 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 28798605248529431077376031613472805956727034024294597037783522990195452707297 156
UVM_INFO @ 2128328910 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 112134409480393027808694222580633348834967925606088041938202032983062418700531 230
UVM_INFO @ 3823090482 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 44353433634406130479221496800465851293912376306548809801346313753392506420574 204
UVM_INFO @ 197127294 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 35852914344261230282700755706438799958091705061643387389355888889007888011301 202
UVM_INFO @ 6875080214 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 103447489842216302086044854014100570442840527730557459095120647964771964713691 228
UVM_INFO @ 521771463 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 112632696468931898683985723136153866760554716447666461429994056623808839942845 218
UVM_INFO @ 1211582493 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 54156506697956852581163947550240311305495734034717792604273904334137787820997 224
UVM_INFO @ 439654115 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 8803251059052159504208727542070278490497522870574041226982881566084670101050 218
UVM_INFO @ 348140277 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 75478941856893477731152248170567561341303129258986700352844359252442896931044 198
UVM_INFO @ 176509230 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 105784326983682789992889603974926994554241883298418314081946227526723798918519 156
UVM_INFO @ 575457071 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 13603872120702379909773313868248772258128384769156002689907333402806792480030 226
UVM_INFO @ 368218419 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 83796857726526319462099478142278313686635306729199314821444406691623994448648 162
UVM_INFO @ 474671369 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 46381006729144085322102312365895916035337278229527398507787183274308082484715 220
UVM_INFO @ 1074189942 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 56338681834468515006991572140555544170214806935467604248726516114765242708742 166
UVM_INFO @ 195262008 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 69888374856485802483320547727539513055398302307660684096843874982976238995294 184
UVM_INFO @ 755900095 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 80966062363711513972971863037839815947974389337415435033154572114770301723438 200
UVM_INFO @ 1704251666 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 61415837722347909780555758200625983908811457585778744885027188831338763021176 184
UVM_INFO @ 103829210 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 78008517061660839511869873107071116662044728193593268246019507545813908904081 182
UVM_INFO @ 114232981 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 82756409814025449695312323841043698393521800795766547992199339588825676542230 226
UVM_INFO @ 389233421 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1236) [alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. 17 test runs
alert_handler_stress_all_with_rand_reset 61151997689964184281906769455716258697680883462133214946748126818997433255835 197
UVM_INFO @ 7811287613 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 59894261778191371279890795226063734208793672719883271804218908475254650231604 83
UVM_INFO @ 207594891 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 65720091520165444445509894215133660728163279753807408638873632133558582978502 89
UVM_INFO @ 2214018362 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 108428956112137942116266474791431920921496401679882796818713907183002173612076 83
UVM_INFO @ 423365168 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 112107706948553555521069960786170263385937229308250415178592593165275886980375 91
UVM_INFO @ 224582214 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 86208378881307643733347923490621933690347256135416885938152855400497283586759 84
UVM_INFO @ 4775139023 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 60976808481775554830488673621163726118848516693450805391085218300809964742354 112
UVM_INFO @ 1655172502 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 88193784124029879552475903115260433181065896067373027092349296283231677896436 110
UVM_INFO @ 3731356321 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 29088305343935403824957192406535395076783634806593748307198568761172941720830 130
UVM_INFO @ 3607436023 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 31347948658206902904692663587048879047795062188037218641326938959047113645893 94
UVM_INFO @ 1361930461 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 19774055794204736397411493305269142715462425714362503661250494793549684205234 132
UVM_INFO @ 15667885050 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 64669059727090379539231999673305080340374374663299964234172665794812867582049 94
UVM_INFO @ 849753329 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 56421778840342036411296435771705461569117220662433337810940536504745017150849 99
UVM_INFO @ 705986936 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 62097908500330070297210747491397277988698393220975798564306051614060147363212 168
UVM_INFO @ 1599393077 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 23499836373230267470058154873873973311120254553115541529766229939334596176170 200
UVM_INFO @ 36545567285 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 107226870310274322766442384255379533974040334125206606529574943256012266259557 155
UVM_INFO @ 43132480040 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 72558783377077385225947193113704730875594834426499855800393190621848536620218 98
UVM_INFO @ 2415273634 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (alert_handler_scoreboard.sv:608) scoreboard [scoreboard] Register/crashdump mismatch. loc_alert_cause[*] is * in the crashdump and * in the register model. 6 test runs
alert_handler_ping_timeout 77257979048118626738051437514838603879699430490056701553172390105414366168901 80
UVM_INFO @ 284488365 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 65995278056740095243322242052628387049139468735234863142639280987617071419660 80
UVM_INFO @ 536349407 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 100324224931729862802026883491132753217498401476153124843167524637804806784549 80
UVM_INFO @ 1958679983 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_lpg 12979126914813946549782288453562903034428478349403596542403940664227347566355 80
UVM_INFO @ 31415080371 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 16345007241548435309186951071443632999192047330982726819017020205443992750325 80
UVM_INFO @ 626135608 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 84784809544069582469884858036873577763055867646031676884805585073359942777072 80
UVM_INFO @ 1137263034 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (alert_handler_scoreboard.sv:490) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: alert_handler_reg_block.classd_state 1 test run
alert_handler_sig_int_fail 27920371371481877635744287645273947913112255941870520631713305602488100342809 84
UVM_INFO @ 280859562 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1149) [alert_handler_common_vseq] Check failed (cfg.can_reset_with_csr_accesses || !has_outstanding_access()) Trying to trigger a reset with outstanding CSR items. 1 test run
alert_handler_stress_all_with_rand_reset 7303358226517268580816812962024423993756169236143891590635152014621019778414 95
UVM_INFO @ 439096989 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---