Simulation Results: clkmgr

 
16/05/2026 03:01:19 DVSim: v1.34.0 sha: 5eeb50d json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 84.00 %
  • code
  • 80.22 %
  • assert
  • 94.01 %
  • func
  • 77.78 %
  • line
  • 91.80 %
  • branch
  • 94.77 %
  • cond
  • 89.51 %
  • toggle
  • 100.00 %
  • FSM
  • 25.00 %
Validation stages
V1
72.38%
V2
61.91%
V2S
31.91%
V3
1.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 50 50 100.00
clkmgr_smoke 2.810s 143.336us 50 50 100.00
csr_hw_reset 5 5 100.00
clkmgr_csr_hw_reset 1.610s 53.343us 5 5 100.00
csr_rw 8 20 40.00
clkmgr_csr_rw 1.630s 95.734us 8 20 40.00
csr_bit_bash 0 5 0.00
clkmgr_csr_bit_bash 11.010s 763.329us 0 5 0.00
csr_aliasing 3 5 60.00
clkmgr_csr_aliasing 2.380s 90.550us 3 5 60.00
csr_mem_rw_with_rand_reset 10 20 50.00
clkmgr_csr_mem_rw_with_rand_reset 3.240s 126.273us 10 20 50.00
regwen_csr_and_corresponding_lockable_csr 11 25 44.00
clkmgr_csr_rw 1.630s 95.734us 8 20 40.00
clkmgr_csr_aliasing 2.380s 90.550us 3 5 60.00
Testpoint Test Max Runtime Sim Time Pass Total %
peri_enables 50 50 100.00
clkmgr_peri 2.320s 103.662us 50 50 100.00
trans_enables 50 50 100.00
clkmgr_trans 5.650s 316.584us 50 50 100.00
clk_status 50 50 100.00
clkmgr_clk_status 1.900s 75.047us 50 50 100.00
jitter 50 50 100.00
clkmgr_smoke 2.810s 143.336us 50 50 100.00
frequency 1 50 2.00
clkmgr_frequency 1.660s 49.732us 1 50 2.00
frequency_timeout 0 50 0.00
clkmgr_frequency_timeout 1.300s 26.030us 0 50 0.00
frequency_overflow 1 50 2.00
clkmgr_frequency 1.660s 49.732us 1 50 2.00
stress_all 4 50 8.00
clkmgr_stress_all 6.170s 368.247us 4 50 8.00
alert_test 50 50 100.00
clkmgr_alert_test 3.960s 211.258us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
clkmgr_tl_errors 9.780s 512.986us 20 20 100.00
tl_d_illegal_access 20 20 100.00
clkmgr_tl_errors 9.780s 512.986us 20 20 100.00
tl_d_outstanding_access 16 50 32.00
clkmgr_csr_hw_reset 1.610s 53.343us 5 5 100.00
clkmgr_csr_rw 1.630s 95.734us 8 20 40.00
clkmgr_csr_aliasing 2.380s 90.550us 3 5 60.00
clkmgr_same_csr_outstanding 2.430s 114.655us 0 20 0.00
tl_d_partial_access 16 50 32.00
clkmgr_csr_hw_reset 1.610s 53.343us 5 5 100.00
clkmgr_csr_rw 1.630s 95.734us 8 20 40.00
clkmgr_csr_aliasing 2.380s 90.550us 3 5 60.00
clkmgr_same_csr_outstanding 2.430s 114.655us 0 20 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 1 25 4.00
clkmgr_sec_cm 144.360s 10022.409us 1 5 20.00
clkmgr_tl_intg_err 1.530s 38.233us 0 20 0.00
shadow_reg_update_error 15 20 75.00
clkmgr_shadow_reg_errors 2083.300s 200000.000us 15 20 75.00
shadow_reg_read_clear_staged_value 15 20 75.00
clkmgr_shadow_reg_errors 2083.300s 200000.000us 15 20 75.00
shadow_reg_storage_error 15 20 75.00
clkmgr_shadow_reg_errors 2083.300s 200000.000us 15 20 75.00
shadowed_reset_glitch 15 20 75.00
clkmgr_shadow_reg_errors 2083.300s 200000.000us 15 20 75.00
shadow_reg_update_error_with_csr_rw 0 20 0.00
clkmgr_shadow_reg_errors_with_csr_rw 1.770s 53.851us 0 20 0.00
sec_cm_bus_integrity 0 20 0.00
clkmgr_tl_intg_err 1.530s 38.233us 0 20 0.00
sec_cm_meas_clk_bkgn_chk 1 50 2.00
clkmgr_frequency 1.660s 49.732us 1 50 2.00
sec_cm_timeout_clk_bkgn_chk 0 50 0.00
clkmgr_frequency_timeout 1.300s 26.030us 0 50 0.00
sec_cm_meas_config_shadow 15 20 75.00
clkmgr_shadow_reg_errors 2083.300s 200000.000us 15 20 75.00
sec_cm_idle_intersig_mubi 50 50 100.00
clkmgr_idle_intersig_mubi 5.820s 346.395us 50 50 100.00
sec_cm_jitter_config_mubi 8 20 40.00
clkmgr_csr_rw 1.630s 95.734us 8 20 40.00
sec_cm_idle_ctr_redun 1 5 20.00
clkmgr_sec_cm 144.360s 10022.409us 1 5 20.00
sec_cm_meas_config_regwen 8 20 40.00
clkmgr_csr_rw 1.630s 95.734us 8 20 40.00
sec_cm_clk_ctrl_config_regwen 8 20 40.00
clkmgr_csr_rw 1.630s 95.734us 8 20 40.00
prim_count_check 1 5 20.00
clkmgr_sec_cm 144.360s 10022.409us 1 5 20.00
Testpoint Test Max Runtime Sim Time Pass Total %
regwen 1 50 2.00
clkmgr_regwen 1.610s 46.891us 1 50 2.00
stress_all_with_rand_reset 0 50 0.00
clkmgr_stress_all_with_rand_reset 39.530s 3216.850us 0 50 0.00

Error Messages

   Test seed line log context
UVM_ERROR (clkmgr_base_vseq.sv:320) virtual_sequencer [clkmgr_frequency_timeout_vseq] Mismatch for timeout recoverable error, expected *b*, got *b* 101 test runs
clkmgr_frequency_timeout 63551651842084310105161980506258678987927148837310907971777597350585271903007 78
UVM_INFO @ 2229518 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 91051837314735404051241701071690303176635632559008720072215889195526749969563 251
UVM_INFO @ 3216850319 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 96495134874123698833325537773280550320229409789855748410666638093792113351470 78
UVM_INFO @ 6593000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 21371214974970891623569769046303569775292715275511803373556764620022844620746 78
UVM_INFO @ 5230526 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 25147634581576587937535096405772467176081462316897956459153232495605592471552 78
UVM_INFO @ 5683501 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 19574599822950668951307491264126318060186949501435159945753015859407140344380 78
UVM_INFO @ 8994942 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 30969944015526717866862573699493846271428068613482069341973109481835793574524 78
UVM_INFO @ 2479439 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 80862251581681676956329607160019649934510203691664702342187079771397131715968 78
UVM_INFO @ 35527927 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 99564050034330126584271614418398517735840440193354506762551523914169914829137 78
UVM_INFO @ 7698899 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 15694021459292567135039026956807874850676615773045757637381555047304592420675 78
UVM_INFO @ 3294989 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 111771187924358156691470165357297442460745623073632034228149211757710677130680 147
UVM_INFO @ 41250733 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 63481889161573384230405836700799802845587513697555258878638313369733747421298 78
UVM_INFO @ 3412353 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 50426562551878700704177479277183732664647274141011391976159606810516504692005 206
UVM_INFO @ 368246549 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 81693722752990293877733873331681269814383571143736222552331189001048044204726 78
UVM_INFO @ 5588153 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 75792054331680074451486487563298424660615132678188447706128566099727255773722 79
UVM_INFO @ 7091807 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 57961316722472454884609594377829779027056432221467391313247648444379729483717 78
UVM_INFO @ 14028169 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 71275352528507687020837816466145848919032253050509097065968199115530490154278 79
UVM_INFO @ 17065198 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 79714293728923536884933735666567167771496840953486181403509206254466828302934 78
UVM_INFO @ 9110818 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 74516243925666811237339925711663453236360082135488307701644810585019010754263 89
UVM_INFO @ 446172427 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 78945106925298188910615823207263957274857936770362208163978155828601833709981 78
UVM_INFO @ 12086954 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 842348351779662623422660623036078458167737146965205336912827013310185703911 78
UVM_INFO @ 4468844 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 10521625179171812239763869274349762662971427044352812263397111686503354895574 78
UVM_INFO @ 3383861 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 97558235427843467353919055185949144419795310911894195282188551621107976300631 79
UVM_INFO @ 5419224 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 92191450902835213155291480954670650632235826662104062447173233249463234255806 106
UVM_INFO @ 215418797 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 27747610771499074700270648666037019655101552089870583381405452064894313665434 78
UVM_INFO @ 2721923 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 53611943804476838145938347994967126202948342811369910815543135885777963735449 78
UVM_INFO @ 5738478 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 115729803684886792791913096090123429874722342821850713732538633142909471453837 78
UVM_INFO @ 4752430 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 5040003561727905713123390152835984403653094683948069823721304808093225529726 104
UVM_INFO @ 195178357 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 114017870821655470505395919575632166340412938378558972082215251269051442002235 77
UVM_INFO @ 34277738 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 74711109176809623006976481790127363136812411705347541403458723639437142226980 78
UVM_INFO @ 9510102 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 48048548565908644534041186111662192148985810041597968767187439208816571510515 79
UVM_INFO @ 6944351 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 43595172244136257093506320055331192608691809625813029487211453830362190387643 78
UVM_INFO @ 3498826 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 11194332910159397892727635238682676333917085199768682238358357043361815672652 85
UVM_INFO @ 27027881 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 12541201583246374528558393194968055647631550707050767926623198118251687259963 78
UVM_INFO @ 18762266 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 15688901091433108733791579986486391238923582684034134180619648207347584738748 77
UVM_INFO @ 3860741 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 58389547992937684771569077321789720023120971986364083859382901376334200685774 78
UVM_INFO @ 2470149 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 38459831728882830891362134236935500691675832015262371776705364846247006424480 79
UVM_INFO @ 10820314 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 54212946826516129835427042054639951050557906951935333831073479710072015089048 78
UVM_INFO @ 26029709 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 68278804982403081702402138430501443380451514884184245523745739423983974433678 77
UVM_INFO @ 3440250 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 108771825032921690563827571080872223881867100479442121537336833092463831509858 78
UVM_INFO @ 5184432 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 14367727687708800301486042628750276199156111048112931997581567122359562608709 77
UVM_INFO @ 16293399 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 99549777527702224899351334173295224900994349012706071004995337537054216420415 78
UVM_INFO @ 3650357 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 64335378260399664779296026671637325152386983228278942213123569222996047939167 79
UVM_INFO @ 24705676 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 82487195417908869139107967057777501610933137050977424427583457725536560691564 77
UVM_INFO @ 2916412 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 31017226305728602728585233649586022937568927027973730300598211620085270302087 78
UVM_INFO @ 4541897 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 11377810180041954569760261496686795709670237911065142580883899373783256388054 110
UVM_INFO @ 74746703 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 115712361435585538652526503979138757217608898507694225906898370041279512050261 78
UVM_INFO @ 4092518 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 115298737630456131440786120655149721460034196260027308272970084564561066206730 78
UVM_INFO @ 4116293 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 63537503421072953247031638219618215064534024373174652148663169281469972269494 78
UVM_INFO @ 14200129 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 89010517873051683190195312694121321791703686251344971425893886550697261327874 78
UVM_INFO @ 3242538 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 113712839354563436201077985074840013009913150914892218667659080299236922957111 78
UVM_INFO @ 3274509 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 79935405940711909543645757397335962026546267158925847634289818308131324686866 79
UVM_INFO @ 8209585 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 33473680295679886017422788425950467152938892506665894433572608957009812630431 78
UVM_INFO @ 6375085 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 50661540915427700525958400831952384900493798510057825219985206817310403553121 79
UVM_INFO @ 2872366 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 41596292961493874349137036543404274942104325842060295259826318626650636553001 78
UVM_INFO @ 3487153 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 59872259491857258095852212075126977488943837487779484163371401008276453585243 78
UVM_INFO @ 3692038 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 60753031762130621084153843475736678983950089687154650570188975595072609573290 79
UVM_INFO @ 14886144 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 88413186593528387904193063049293035157605757060575927038212555210677746484228 77
UVM_INFO @ 2938497 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 50383133417216686182396423088332260642042832861929327957712268754308124260826 78
UVM_INFO @ 5840250 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 54588177998704778886425792326363169071057278352737620375073391864990624305639 78
UVM_INFO @ 44355735 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 77864714601099207862630032398563119328425541306587025056476474222539589866315 77
UVM_INFO @ 3991526 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 46117855508411755739872038847673521146663642054896870589374622271884113089827 119
UVM_INFO @ 74549219 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 12746283675191709131542343209281194598789465075679559573447813187828382983500 129
UVM_INFO @ 168610730 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 82953249921116810983951645047353194945893079188453243105892097447254837824635 78
UVM_INFO @ 4814443 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 30936347953295916052598107361334805891481627944913234363225835558569727338563 78
UVM_INFO @ 5467962 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 12855770227352923361130262094902447222866653490969606857991003339656389249483 78
UVM_INFO @ 12856109 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 106466420557309301793753510782830995025548077948037614134881313980821763326308 87
UVM_INFO @ 45108695 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 69509219589113187538768206673517389957372730509808474861955320781155048666753 77
UVM_INFO @ 4846502 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 25303151524168120098328948960662862319018334046710292325688083792432467167834 78
UVM_INFO @ 11608322 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 27715773298503916797933624420691003723640160907606852489565380862972635774926 85
UVM_INFO @ 88404509 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 100955731389535239516193407145203282400468425456329451935223497940369562568841 78
UVM_INFO @ 26640789 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 20213682824878016507016199330975014176515166842554848614111527794838206610076 78
UVM_INFO @ 3599471 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 90054905542419963373569536455106641321572395349470718990994369743416111183942 77
UVM_INFO @ 2842551 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 12273433273172494843524409039442779434272824435881862321632755184054457106551 77
UVM_INFO @ 7185153 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 64109371559770250325690036939478253682691344269451890896713255792386469477389 77
UVM_INFO @ 3980988 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 49823011390700230792497480625110420721566194913231663593065068695282291968174 79
UVM_INFO @ 15373011 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 103003863485009128470831842246988408870856662870834951243163303561397683487416 78
UVM_INFO @ 1493039 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 91551422095655670547004107908231992512694135080612304609929977076413727903789 77
UVM_INFO @ 39664140 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 32457928582627958555351570983520356351699544052411899691692200536710881764747 78
UVM_INFO @ 3257290 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 52953816040214941331190203882748765101293334263598500453850894197080227353457 79
UVM_INFO @ 13980083 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 39123008979665988784124235772467012152110090363576818730169904487285719411486 313
UVM_INFO @ 205062506 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 80993323055407720764414047311079459634243007978608806933417573365000587656720 78
UVM_INFO @ 7121931 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 91708512939833997637188541959174807201954964994155469215931144218083833623573 78
UVM_INFO @ 45989128 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 112246645511020587754402815837523504984962711923652159357961165134946541166459 78
UVM_INFO @ 6225575 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 10789271342171049272149968703262519123017253228902056713867234808009463417309 151
UVM_INFO @ 43916099 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 80812985770060271053969560397355417012636848067722843628023468499019688170112 121
UVM_INFO @ 199503975 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 51550937262481869822158684503691916349039573868868377504128122001743945279772 78
UVM_INFO @ 5730072 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 111768476605197311970783462344847889748295611403372276214455628222737680663001 77
UVM_INFO @ 10780790 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 14092160561847166106253567700186934481077620172745206548978697391857598317290 78
UVM_INFO @ 4048752 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 65456857215213104766757335519704140951471161344119898420129313604233335770207 79
UVM_INFO @ 252087366 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 76938976800308722581793256162131612124843877210497040407333314151138046580968 77
UVM_INFO @ 6650787 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 81496905064751546257769006356935629189749313098525585656228510906516947607372 78
UVM_INFO @ 3673212 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 113391588067580474318730695088494138201759905616674086617851306369791963619894 78
UVM_INFO @ 3574581 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 22503631249465807163141414224562810408484527681037952961759614757276259424657 78
UVM_INFO @ 6970131 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 13061540320560323885509093149982252790508949416723613100960997207537051452465 78
UVM_INFO @ 4473440 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 34161384993758774046091151616994301962237577250587398169384266613513870262158 78
UVM_INFO @ 5690397 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 40433293282626715571296027583186380327857249836705559845779465579500528585320 78
UVM_INFO @ 2618563 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 51781483791915915354081118637031659965487235598981966966359405384514516342532 169
UVM_INFO @ 124221584 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency_timeout 5450968732054281272201109724232774097458779839307147599642187944326648931200 78
UVM_INFO @ 2445687 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 76238316458141423885018972918998062221441511685440349547778860791877066576756 85
UVM_INFO @ 25832134 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 107047259657563534069489474534039883963214433848702716831283330663888089839505 77
UVM_INFO @ 31379004 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (clkmgr_base_vseq.sv:320) virtual_sequencer [clkmgr_frequency_vseq] Mismatch for measurement recoverable error, expected *b*, got *b* 94 test runs
clkmgr_frequency 78520961940913524254647435867254390112886011368082137224676997366950844116552 76
UVM_INFO @ 7384913 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 110732808119472315664092962799913278898515706708604796000193627463077512485579 75
UVM_INFO @ 8417356 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 20275259420750444756930805013881108604109752075099924939397371226989190825698 78
UVM_INFO @ 13752429 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 112218103912758646481334753912272765762401070021841307899754437583942190095108 76
UVM_INFO @ 13880684 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 30505523238330389813717730595774964991920622777777561928135096921851643089024 128
UVM_INFO @ 35670542 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 58289059345911047208042722055623005248036586529823556249775482904951220965300 75
UVM_INFO @ 6501669 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 20767407853950856394931652903124439825821156370355706744964785134731883300894 75
UVM_INFO @ 7791158 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 29113664151777855404585772964084570731930827128546650049069053960915671928862 78
UVM_INFO @ 65204298 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 101146281400102851127843203533819152962423822632013677007312059335393126775154 80
UVM_INFO @ 24765128 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 1284194283761695638181844204164119354605815796337683288174944296650777797667 76
UVM_INFO @ 5968872 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 88564499664660521299030929138745811402700271782296312502560145182463029564884 87
UVM_INFO @ 61874741 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 79059576743866794478984516618142018019492682859830224926784524787944835050411 76
UVM_INFO @ 6354228 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 91176099043969769273797734555012571815345694006009663878163659658028297663443 175
UVM_INFO @ 399373628 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 29535241927881562749988458422791045950851503363345517500980400078009334996179 127
UVM_INFO @ 89111799 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 77325456952018553224724946028894400852709117420245210663652737866090174474287 77
UVM_INFO @ 23899744 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 52674467377205694568925654222947508887877985800092193456958556587574577056821 76
UVM_INFO @ 12956560 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 18393395594543674463761187164571643461211065017434258122006361943328548244020 79
UVM_INFO @ 104168163 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 110351715233404648032873159482492720339683378801181217389744611646868908006737 76
UVM_INFO @ 5006624 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 69881553003993696959931820999166606084959994963014019059259829426795404792380 75
UVM_INFO @ 28125645 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 7604695799337562481216147282988507761370142327594571794700407441681669727381 76
UVM_INFO @ 8439999 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 97606551299150721308857676707509641215682166750697159686257946317943565070916 78
UVM_INFO @ 7350735 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 90150969749766857091134967896168674949749572596558491223295465114422899546843 121
UVM_INFO @ 29166517 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 110345438560720920743710571075098607800046631516105764007198746362204320980321 76
UVM_INFO @ 33936362 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 21642308410739827126184114750062333127153630105184981385393572813549186527276 75
UVM_INFO @ 6429855 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 77285070379456618089186555504987015982192021239002051255419245325037290577396 76
UVM_INFO @ 7555536 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 52416940876744083366624385299539657800927454139930306992753612459463309915565 80
UVM_INFO @ 11972548 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 48113572069743777834369444796248799159269647560518918091078191859663984360424 76
UVM_INFO @ 5808161 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 43131139393290385608846738279357709146303161105274690495961639443866045643877 76
UVM_INFO @ 10366367 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 56545830709508804826932558404667160278432533628903344943084645118029907084552 93
UVM_INFO @ 73897171 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 17529739849796050569505503697209259786800178774715375289495510804103107448008 77
UVM_INFO @ 35739594 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 37530159118628281970576358474300363927794307155624987396629810791727328393236 76
UVM_INFO @ 8683641 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 23550815674355920319207069488793833221569471575703176687010450298073670316012 77
UVM_INFO @ 7155329 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 76034865903506641362191496220082346683096771522348254123906497265041377515327 76
UVM_INFO @ 4953272 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 105285094837596566421567007100375645712492511929272345660912510162228899835380 75
UVM_INFO @ 9890668 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 89640488660766753927137329180541690647062499709747706975038328895175089216532 78
UVM_INFO @ 56713427 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 53134517506626416283649849132080936675240230333140168230822750333831916942453 76
UVM_INFO @ 6268882 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 32602171022805340954840209472560261518413756208365250777087159236098511458375 287
UVM_INFO @ 183232577 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 92691199885960257678735406944475949581578791459070451134172644786881706057794 76
UVM_INFO @ 4961167 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 21642550030889480287940115093390753071121562514332311772476738630559725320657 94
UVM_INFO @ 81474799 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 8779680691108225766359313859141100909127381680015878532490727163947286630457 75
UVM_INFO @ 14180398 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 105005266317072367921180994231447226560838394927020794664568121782875452198416 75
UVM_INFO @ 90161753 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 28665398924788572711687146209050032882920925945730591508764595412434798881724 75
UVM_INFO @ 8917371 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 46090092276284878585247069007017312469764916417597983434773959679362766349549 78
UVM_INFO @ 120164101 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 109314309108648753314185534888120400073914785771237551001792997390322730792899 76
UVM_INFO @ 27681952 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 60488243022693998643835799688925234094218631288343639680629945926406427405942 75
UVM_INFO @ 6719813 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 45551665064660483744006744503811460642508011004846636593062808140092767042269 77
UVM_INFO @ 126669475 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 47857714295877687405205610289207973194338048471033186056335193177516001292592 75
UVM_INFO @ 23935521 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 61899749821540146746992820979220850620413444439280887507158448192190889490661 122
UVM_INFO @ 52731805 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 18519737207638573318597086833686747987766727096109223290216825358556987143193 75
UVM_INFO @ 7683316 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 87573326623497687866939383220862162347355396310697494807758606395949538357859 79
UVM_INFO @ 8825163 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 66703204500415540402183221439399319598079887262550438233211986570238916032947 104
UVM_INFO @ 84060686 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 74447455722549876969018328941127188007680259470578279159893307175450923886004 75
UVM_INFO @ 7308901 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 46193185108170635913423090724678448439960120888130085810426925429089025880121 78
UVM_INFO @ 5017373 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 91073623872845477648893426237372095808980298987290638076586864414828855283977 76
UVM_INFO @ 8307523 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 95586083353082423059826019548779016313179722177376770688982182948047171691147 76
UVM_INFO @ 6742475 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 15124805520906273342080391523930781184441514948467339157756421386171680777655 75
UVM_INFO @ 89527670 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 30195166462845677677283405771568115115685670724196147394715977478082269910579 75
UVM_INFO @ 26082377 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 35158719732285957656363316697827581697563747968516853503314730724597681564060 76
UVM_INFO @ 12205947 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 4723008185667441254691965479839262143408357968458253961175779535316950661083 75
UVM_INFO @ 6440733 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 109098133568172405466153872704678263661775252621776973089932157342360579521448 118
UVM_INFO @ 144566611 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 95164939299960908234751568655189737264113797768759444653634114333832952857713 76
UVM_INFO @ 94703410 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 10438315457718572561609233617674014010902246489984601637873311734770147024609 78
UVM_INFO @ 6221986 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 33976822779835128828802216857846405383021834528959710332963539449548400323369 82
UVM_INFO @ 9138175 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 108786249267081834010196018178959585182354296047301553627764510704293840682699 78
UVM_INFO @ 10011325 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 94091181525404609769765266501705224998309723084869061148246522578887675314801 78
UVM_INFO @ 8041613 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 89604607366361816788037179940119963806734018037542138012543210610848456158953 75
UVM_INFO @ 49732241 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 94476524235680390428322825748329893107502638852679268553006838606717557748125 212
UVM_INFO @ 160264705 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 92286187891369270456047322155733698984653912299758206415159269302706748942726 76
UVM_INFO @ 10975774 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 48777002279082396155344519854515689458482014418654953658079604105813797587912 75
UVM_INFO @ 5543657 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 54525126806307260234056362770150828714610705689720573365211093838515508153989 76
UVM_INFO @ 12275587 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 72424066587582171168125821072467909903566985538531521522856094320205029608112 85
UVM_INFO @ 24471727 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 46929673548247680510819300988885396740275575501473064981224638648913555946856 75
UVM_INFO @ 8354523 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 82740300521391928790448523551616011610165978687550404064363928662718750052434 76
UVM_INFO @ 10274438 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 70678636656121454424853408130186931436721984830134867957285477597529100722163 77
UVM_INFO @ 36979945 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 2452604758966593256432294862589696108226808364143225214596309167633135196833 76
UVM_INFO @ 4717691 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 72266857760973840167351713253103802234532640587124054428902736159365300431231 76
UVM_INFO @ 4903389 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 95282490767162228893028100589175115438281999705433826830387580691729330069505 158
UVM_INFO @ 224591797 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 92285358179966045616774474320204487999582415755666555974287644387368171225842 76
UVM_INFO @ 7216450 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 64159201353858864355503965393093076634309918307179259323717092613790203800461 76
UVM_INFO @ 4541817 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 88705094503234872986405216254278764568949814982289120252793765970948373060573 78
UVM_INFO @ 15201734 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 63763836224015078643888653752441240659893538581347614723491692155115852186336 75
UVM_INFO @ 9235995 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 27395148229911102540378886779366940563581194449465760578872136669388151398265 76
UVM_INFO @ 6162565 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 24150755331490200911107910271610274608135362422188556072325138746173077905379 78
UVM_INFO @ 7142439 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 107980389740447224241253954491727218835551678139868170665298968560962958046095 76
UVM_INFO @ 7855478 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 92478091392010895747722250004122293989529591612604289886695371065078989461662 76
UVM_INFO @ 12135535 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 80947076746353401450095032911948142488646454480713420019844034335046865803295 78
UVM_INFO @ 8323517 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 5541113705089800984034908297080268509928789893988358062698762410193320018753 287
UVM_INFO @ 336726250 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 106630374914057531470367311267383182281935881938979963312781551253042676181819 76
UVM_INFO @ 5379316 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 26742671776281825422627876154420679865857364822002001451222407265720786383100 118
UVM_INFO @ 49456831 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 109426223511800439712588660031806535158816969836376596194977476139895407656284 76
UVM_INFO @ 7248386 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all_with_rand_reset 3859317237054800050460266241741810434949768312246758226408611303574139646099 78
UVM_INFO @ 28715165 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 46586203159627345165859963441989615610246173183511964902939093136399757882775 75
UVM_INFO @ 5030293 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_stress_all 36444606268233692295847900025023040731850222376114529640055253762822949859314 76
UVM_INFO @ 43493093 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_frequency 109828652137307102872612601388671825157962949104290924704265801902049516589583 78
UVM_INFO @ 9844470 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: clkmgr_reg_block.measure_ctrl_regwen.en reset value: * 32 test runs
clkmgr_shadow_reg_errors_with_csr_rw 44505677016599331408246716315289669412176723510173553601834126830888278153539 75
UVM_INFO @ 21124058 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 84702517010061253160457494124553977281482826427148389881464648277977519521520 101
UVM_INFO @ 38233234 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 84678283543028224316831529962720284236376535463484353635222934077317040339003 76
UVM_INFO @ 47244028 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 26290413026755195378067712680063436157067954023732299401398711255897747520951 75
UVM_INFO @ 2936538 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 76010671572857854294558323060371094596987487917355907373013327977728480073959 76
UVM_INFO @ 3402481 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 82132083902468854355932770783036980327203250612698808020224823092710620781956 75
UVM_INFO @ 5495679 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 30562775339057948881698190933757766542084167143086314595419106604720830794313 75
UVM_INFO @ 3774591 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 80446158284370071968717934629066501847890194005286746114941622959987613506982 82
UVM_INFO @ 8737401 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 5133455941783627614341501925983662655288377381799419077147484955261188673129 75
UVM_INFO @ 7592118 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 67136277923209490959699622803831683143444037567036751877477674111694693594449 75
UVM_INFO @ 2881249 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 59926280722266968023711241470449077232137029425332311829694342107349992453568 75
UVM_INFO @ 43030311 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 35487518654040655342825216225281152088236586690957635082751064546069081359359 75
UVM_INFO @ 2393748 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 93130307182885358652411965206924124377040804870874298282481377986664415220659 96
UVM_INFO @ 7883400 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 70775404083596372289619950315589938211579823631153009348841473103385687709352 75
UVM_INFO @ 39282830 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 9344872426524841643178617883596997729173219626768682795821931280145969943955 75
UVM_INFO @ 4883408 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 84683877133666730391783069442062007420683143615254724029711824221564833509657 78
UVM_INFO @ 4169637 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 31735810292231079296112341805445394032055729103361397151985492795007007960561 75
UVM_INFO @ 18665567 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 50117047179379567343312974812299700099361878281451522997043264358034231730412 75
UVM_INFO @ 2759016 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 46722728015279910478950114723503452035677575501041229146727604397792473271247 75
UVM_INFO @ 4867676 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 10843132816780493086829333101195471035259909548681454297003050475011432325264 82
UVM_INFO @ 20438159 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 65399175107013014233831988842035344951056726463721562325142216793031126460340 75
UVM_INFO @ 53851021 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 111947165345126474413766309651870037243568371301729675805852123836727139841178 82
UVM_INFO @ 4209284 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 74113175170209504504984073794173177066432225001366343180170514090760770590952 75
UVM_INFO @ 9023429 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 94592048116278062508826200581650285319272387079466273770265693749381645525734 75
UVM_INFO @ 2908711 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 112806218998678383088926929867696068512340685589158877562458304411666127480758 75
UVM_INFO @ 6268662 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 17053810203422657060370618391101768367838738430953644047912060960653189508687 75
UVM_INFO @ 14561370 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 113389965042010049917924067350744202821261318727947472278992846541777263330508 78
UVM_INFO @ 4133914 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 19756367169592434073894063593524887648754391417999648860026793981642151396550 76
UVM_INFO @ 10905921 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 10704783783932700832945173205519794203530098801537882632540342467723863963825 75
UVM_INFO @ 10252272 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 32614720950937442693399013133363029343706884289199488370429177613737572619036 75
UVM_INFO @ 13264650 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 66676501991800930592111067002089004485814310452902270859823184949860799523783 78
UVM_INFO @ 3303350 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 1760657308964709263613318849271415788917705187106129351605558825157160639607 76
UVM_INFO @ 8940826 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: clkmgr_reg_block.measure_ctrl_regwen reset value: * 32 test runs
clkmgr_csr_rw 78785262429537016528384251037623079668300091579688883315082677920942054141064 75
UVM_INFO @ 2585513 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 9257784043540382582626830727266629826658312929720325717541624046650911988798 75
UVM_INFO @ 7272406 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 89142453403031915258769704277293802695180654639923857362219018024198662497550 78
UVM_INFO @ 3476969 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 3516298650097328521345964246225205771346152860004647561479960134927640127827 75
UVM_INFO @ 12628877 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 5902377266277391146942179613274148283721202447718451205944483508969775217549 82
UVM_INFO @ 39220883 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 108002650178177930869129062205788063197965897041477267626784663736763105914524 75
UVM_INFO @ 13517796 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 43659564750995125042193663499016997150709992281458490134871469469817583188635 75
UVM_INFO @ 1403031 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_aliasing 83030657287468129553981101776547994276441370003587833460550613264895094163176 75
UVM_INFO @ 17234146 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 84054923621034188964801603017000454659311760952011253569006439217487718031628 75
UVM_INFO @ 4600942 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 74008230530697823914407371823793858426231145227056868527608291195600795071962 85
UVM_INFO @ 12785337 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 38305381457178961819940722362963776790374023715500948550369032805176646282708 82
UVM_INFO @ 11983820 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 74331498378430379020686382113221777234095871619206603677839404505499506053524 75
UVM_INFO @ 8563846 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 31488252660984929464705987462747833862803807364929122071254779183742048789632 75
UVM_INFO @ 6203669 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_aliasing 45732818958739848484433102999048338330363843688528553593157194957007302059999 75
UVM_INFO @ 16048084 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 29290739139752986649976631170576201394192522427388949979430546948028607082136 75
UVM_INFO @ 57708732 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 19216034580407954286198193111259949776203002679960659158117105321209595877390 76
UVM_INFO @ 19997595 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 107435481922778289260473107715198697546083548739106621446594184301807711826387 76
UVM_INFO @ 3307320 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 2956056331158311893887963098593995053159020656810878154025855870195725626720 75
UVM_INFO @ 2907425 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 15262948346659540696238258284857986245229798108873903153296739718531866141082 75
UVM_INFO @ 4927278 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 22852727177375566481768771454431557748392720728655376098653243529282712447186 75
UVM_INFO @ 3055337 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 43302380027253642467257523080203032742499812715790221793998168291612086922505 75
UVM_INFO @ 2229095 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 51489411859067779247953041270651044353949271210359427049477159308394666616264 75
UVM_INFO @ 7956790 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 86521160279284641189416486379750058079912734438240594533787799400704576010858 76
UVM_INFO @ 5313738 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 108653108842253099575915559970563222557954547376246242768388595063392259648233 96
UVM_INFO @ 12586003 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 62468173110123595407813163264624150834511784695039985012814105220648474631635 78
UVM_INFO @ 3467296 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 43785824916388776878055304964125035683092439749071485636426207062878568867665 75
UVM_INFO @ 1587680 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 71531451807475464826978559409737916315963084283145849667978195682260670299582 90
UVM_INFO @ 10615088 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_mem_rw_with_rand_reset 36352711325346748366675727480736550752506534120295990480184752668832500846878 76
UVM_INFO @ 8634566 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors_with_csr_rw 104361589513546492367794988801504867285614590766478049365456397945720189948082 75
UVM_INFO @ 3384764 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 28646398695737696194142500074456620781022652880254779684334865465993507243793 82
UVM_INFO @ 11400771 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_tl_intg_err 37753892826098704151561735745516315334563497575192791057934705792984777354806 85
UVM_INFO @ 11799877 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_rw 25331048199786535667749691260910394258385568542696729665080360517257415568116 75
UVM_INFO @ 4495813 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (clkmgr_scoreboard.sv:257) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: clkmgr_reg_block.io_meas_ctrl_en 21 test runs
clkmgr_regwen 7284576964357986879610768176880860291563408042902696041095935675485804930545 74
UVM_INFO @ 5807813 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 52271283130122573221267170280191665941373922002627903561197676121203848828618 74
UVM_INFO @ 1934251 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 84162165989042733632118674128491649357018203177673451637360113437943089839112 74
UVM_INFO @ 4265009 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 70488868945034600776577268115626206499652356467139043526524561763377706373126 74
UVM_INFO @ 4048888 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 101436126896501391170861218001590320896408432995077596588049265216939091786698 74
UVM_INFO @ 7030603 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 54140335215882731589160792314246256514281313424718846323941961426892373433991 74
UVM_INFO @ 8036231 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 94338766183019942669073510827796354760454113627915773293958027679318146060215 74
UVM_INFO @ 5399463 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 84169435861592079109146339835318387731336350272697143719495974347532118132678 74
UVM_INFO @ 3837695 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 5256969880509918270008112090609157326445010494393003101567802190200726516308 74
UVM_INFO @ 11803411 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 86682311952018393223880919352915143462021782098071859538688476333446049459432 74
UVM_INFO @ 3353716 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 17819160402772869295652074971034628698885275079168783545372899914649325727709 74
UVM_INFO @ 3119396 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 45110704755278310539182491040323052321959293054221540760394206810823221347594 74
UVM_INFO @ 2229111 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 92311799359686128188838693581303714447880372046632978939548254016398053660876 74
UVM_INFO @ 6701169 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 89216475531347911510332044833298021360953267521298080369272846046002710569867 74
UVM_INFO @ 19348019 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 38591504662619294732671415790016875625419800268283520881363824084794924064061 74
UVM_INFO @ 1282024 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 20890252832635032092851006472280296222188582420410038590102353896235236385472 74
UVM_INFO @ 13190565 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 89418123691208874430646906554849444219375379498550748661419396440568486316916 74
UVM_INFO @ 3519358 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 110572025459816830588656171705601079693066560275173674972620500602957480729075 74
UVM_INFO @ 7616266 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 30050865391234322885812176379515754671337671366225636720866800747498934466813 74
UVM_INFO @ 6442720 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 70980641705294949588222344796603889915622635956064825801786292338306607204798 74
UVM_INFO @ 4414015 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 62966614434620839722656821105958906289204392050962308978724848214720479723411 74
UVM_INFO @ 37084777 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:649) [clkmgr_common_vseq] Check failed masked_data == exp_data (* [*] vs * [*]) addr * read out mismatch 20 test runs
clkmgr_same_csr_outstanding 80743639610199900284064468004114356141647816674377572678294837373791862226130 75
UVM_INFO @ 114654508 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 95470689527645921377602753894333500551638066474454140857135032027272336936062 75
UVM_INFO @ 12061541 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 62149116777663562167510043742143901039281884642830072013391742817016446916217 75
UVM_INFO @ 4934810 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 1600377218991609813821972298357282599030742894567732227844383860494056864797 75
UVM_INFO @ 2113388 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 24041456783848954329006659377576218601618468849112557495506856902332438294899 75
UVM_INFO @ 33707159 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 103568892087722725998873876002265634284200742177085718574662021173617844793957 75
UVM_INFO @ 11298563 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 68697126616468994348906051570198276600890073181580492055593623554102991521061 75
UVM_INFO @ 20478202 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 99222191737917551884125792101872923533958744937123851799570283652707789381084 75
UVM_INFO @ 2872955 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 67153280651033423984319021206124599895174674392967943278548239365812782852178 75
UVM_INFO @ 54950454 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 65964299481268096977778962494063348206086348810230771718907310750991413907274 75
UVM_INFO @ 68002338 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 99006551462030287558234545473817488389769609799112582552020470922267589723447 75
UVM_INFO @ 1864056 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 75717549533501162507222516937769783129564457240328501395621528435204729921973 75
UVM_INFO @ 8609739 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 112092395336014326598544567373360854992580697178202803144711274695327881954989 75
UVM_INFO @ 2244946 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 29448291677862547010638107863423319460124065371470511930703415775241604321066 75
UVM_INFO @ 10139201 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 80067021441239820418047856675193039845952256765550578907102401756632626781933 75
UVM_INFO @ 41102618 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 79478500226094725955394668841137365909124868962640897860115694385250752115898 75
UVM_INFO @ 51449460 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 89839531054684907784912749357372641095853287154646694285057935820251163427834 75
UVM_INFO @ 27578064 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 87386567318088349149199937806734243156986106675487847236881306759516527418517 75
UVM_INFO @ 8989452 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 17948937440925923139175217689139390145705701653557464333782656052474300865446 75
UVM_INFO @ 4613950 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_same_csr_outstanding 51454197261848913849395280826616411552664713186291568366934776945589158736328 75
UVM_INFO @ 8265156 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (clkmgr_scoreboard.sv:257) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: clkmgr_reg_block.io_meas_ctrl_shadowed 18 test runs
clkmgr_regwen 63093617655975050693942515511871725858390067025273075872968154600951355106128 74
UVM_INFO @ 6136143 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 111694300012450154088511035264631599735897042916916865574553867041857308643108 74
UVM_INFO @ 4942253 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 2982443503189994089758533663410533169051637909955773800761375835879151750446 74
UVM_INFO @ 7708870 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 28111106639774893262407209772185030644559194131965178010180638863037790810070 74
UVM_INFO @ 6207645 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 55172885114035316696095615352635188109734301992380695730530445213502450463713 74
UVM_INFO @ 9186139 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 8101126434759166643713327849788889462844419627341081019174126018111487732338 74
UVM_INFO @ 3851924 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 97562246389907220886789561515517385136037979667219693851604440096013801794869 74
UVM_INFO @ 8129565 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 110366499826452790397119224765521606321960914049064971652661850337470878309881 74
UVM_INFO @ 8772582 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 19490930135483643948014401377776936972881364536652239498891412235693575016325 74
UVM_INFO @ 4275340 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 62035385166636946223611218114658499016249684505490759922431586240968442680435 74
UVM_INFO @ 4396160 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 48471205526054340710605847376564100149493488445082745402176510624893799038369 74
UVM_INFO @ 5960420 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 107580858924835186921342353797636623391009459902041081298793097433057434956448 74
UVM_INFO @ 4005918 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 85540258045038787526525317562950225778158591194271290936716715177562468103016 74
UVM_INFO @ 13910695 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 48203782284131562468412612358443444696742755244453531224241675709358130917239 74
UVM_INFO @ 6432617 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 28343907204597055439103640504860486473077737476907897230783791534918936719835 74
UVM_INFO @ 13211597 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 50911800626002855623468692418765090961181162638826279313654279315640842512026 74
UVM_INFO @ 3356991 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 63146663391240951652958022589742031751907763272000614688900392558697089985872 74
UVM_INFO @ 5832834 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 51643873203271959357946695064242677402328903380310617275978359227119551456188 74
UVM_INFO @ 11451021 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (clkmgr_scoreboard.sv:257) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: clkmgr_reg_block.main_meas_ctrl_en 10 test runs
clkmgr_regwen 94094444915057882939606628971243591443236750316817598036256349572607882758878 74
UVM_INFO @ 3392054 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 32967017491600268898259261039617939704160525897850741713941691469093478537424 74
UVM_INFO @ 5117046 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 56739475794071337074953796973646148300908358658375758714054312579826452726002 74
UVM_INFO @ 4588853 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 61113221957824297538463367232912895188254972282065326856483847514959599162854 74
UVM_INFO @ 7820453 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 539645858279719046169158155340439492744323529644794464818334503095472645108 74
UVM_INFO @ 7706182 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 108395232436361181779320143056731537538605503446181834759265372448211399012428 74
UVM_INFO @ 46891102 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 78808477921129181154810497089512921193995790512618186852906931479710115913382 74
UVM_INFO @ 4366858 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 47850580847761492099074972600558612920093798974512497723686500858987371915862 74
UVM_INFO @ 3014898 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 89836404271790801580617180890786686890438633591187914686682026728775849566342 74
UVM_INFO @ 6661131 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_regwen 13494073512573355497733381350349673622156014057735211362939639779557460663427 74
UVM_INFO @ 5259724 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: clkmgr_reg_block.measure_ctrl_regwen reset value: * Wrote clkmgr_reg_block.measure_ctrl_regwen[*]: * 5 test runs
clkmgr_csr_bit_bash 5565956159205180757272034865614989755774149594448568629136300150196496434478 75
UVM_INFO @ 280336887 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_bit_bash 24727857930649465169597071096401358208693329241295477425160332484763225083023 75
UVM_INFO @ 101230988 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_bit_bash 21953660988821524570507049656357110196209045705918442531330303156632057942977 75
UVM_INFO @ 35101968 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_bit_bash 97274715722010857182493230466795576204627972262696989383471019534169411977351 75
UVM_INFO @ 1951071 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_csr_bit_bash 51075152027022843975289261156598183806661479131223332725713701104853487966194 75
UVM_INFO @ 763328813 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue 5 test runs
clkmgr_shadow_reg_errors 70510695330741378598192623576307289285494187443679136788129687500234861040725 76
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors 33341633587917307945287425236369475302575866318239024603405857469760804711820 76
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors 108952921196745472508150544183603212657039437206702637512453641128796284774384 76
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors 42943705952998485498280727933550527197758942617865892326497568460931715529022 76
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_shadow_reg_errors 83030755056650428946385850435937283919113362986383943604067124421299082351234 75
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1030) [clkmgr_common_vseq] timeout wait for alert handshake:fatal_fault 3 test runs
clkmgr_sec_cm 3151833968002523605965748566416931251692694318780008924413643452314701147096 125
UVM_INFO @ 10482849945 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_sec_cm 73526501020196390576839829083251242849932411034915693229950774994414972489854 84
UVM_INFO @ 10022408596 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
clkmgr_sec_cm 4842689736720450562842289079674460323865076909813398411184890139074142995135 142
UVM_INFO @ 10066415415 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1022) virtual_sequencer [clkmgr_common_vseq] expect alert:fatal_fault to fire 1 test run
clkmgr_sec_cm 348309741739063676061526600966268243842582207562068260123347848868320792912 78
UVM_INFO @ 2107245 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---