Simulation Results: aes/gcm_masked

 
22/05/2026 15:00:33 DVSim: v1.49.0 sha: aa614ec json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 97.15 %
  • code
  • 98.13 %
  • assert
  • 98.57 %
  • func
  • 94.75 %
  • block
  • 98.22 %
  • line
  • 99.42 %
  • branch
  • 95.04 %
  • toggle
  • 98.05 %
  • FSM
  • 100.00 %
Validation stages
V1
100.00%
V2
100.00%
V2S
96.00%
V3
10.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 4.000s 113.673us 1 1 100.00
smoke 50 50 100.00
aes_smoke 21.000s 1176.012us 50 50 100.00
csr_hw_reset 5 5 100.00
aes_csr_hw_reset 2.000s 72.275us 5 5 100.00
csr_rw 20 20 100.00
aes_csr_rw 3.000s 93.012us 20 20 100.00
csr_bit_bash 5 5 100.00
aes_csr_bit_bash 10.000s 1153.800us 5 5 100.00
csr_aliasing 5 5 100.00
aes_csr_aliasing 3.000s 71.045us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
aes_csr_mem_rw_with_rand_reset 3.000s 101.480us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
aes_csr_rw 3.000s 93.012us 20 20 100.00
aes_csr_aliasing 3.000s 71.045us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 150 150 100.00
aes_smoke 21.000s 1176.012us 50 50 100.00
aes_config_error 12.000s 468.271us 50 50 100.00
aes_stress 30.000s 1535.849us 50 50 100.00
key_length 150 150 100.00
aes_smoke 21.000s 1176.012us 50 50 100.00
aes_config_error 12.000s 468.271us 50 50 100.00
aes_stress 30.000s 1535.849us 50 50 100.00
back2back 100 100 100.00
aes_stress 30.000s 1535.849us 50 50 100.00
aes_b2b 33.000s 713.565us 50 50 100.00
backpressure 50 50 100.00
aes_stress 30.000s 1535.849us 50 50 100.00
multi_message 200 200 100.00
aes_smoke 21.000s 1176.012us 50 50 100.00
aes_config_error 12.000s 468.271us 50 50 100.00
aes_stress 30.000s 1535.849us 50 50 100.00
aes_alert_reset 23.000s 2361.499us 50 50 100.00
failure_test 150 150 100.00
aes_man_cfg_err 4.000s 226.443us 50 50 100.00
aes_config_error 12.000s 468.271us 50 50 100.00
aes_alert_reset 23.000s 2361.499us 50 50 100.00
trigger_clear_test 50 50 100.00
aes_clear 14.000s 728.761us 50 50 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 19.000s 752.253us 1 1 100.00
nist_test_vectors_gcm 1 1 100.00
aes_nist_vectors_gcm 12.000s 342.832us 1 1 100.00
reset_recovery 50 50 100.00
aes_alert_reset 23.000s 2361.499us 50 50 100.00
stress 50 50 100.00
aes_stress 30.000s 1535.849us 50 50 100.00
sideload 100 100 100.00
aes_stress 30.000s 1535.849us 50 50 100.00
aes_sideload 18.000s 1558.470us 50 50 100.00
deinitialization 50 50 100.00
aes_deinit 6.000s 209.115us 50 50 100.00
stress_all 10 10 100.00
aes_stress_all 166.000s 2273.745us 10 10 100.00
gcm_save_and_restore 100 100 100.00
aes_gcm_save_restore 23.000s 1534.262us 100 100 100.00
alert_test 50 50 100.00
aes_alert_test 5.000s 61.246us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
aes_tl_errors 5.000s 521.409us 20 20 100.00
tl_d_illegal_access 20 20 100.00
aes_tl_errors 5.000s 521.409us 20 20 100.00
tl_d_outstanding_access 50 50 100.00
aes_csr_hw_reset 2.000s 72.275us 5 5 100.00
aes_csr_rw 3.000s 93.012us 20 20 100.00
aes_csr_aliasing 3.000s 71.045us 5 5 100.00
aes_same_csr_outstanding 3.000s 626.319us 20 20 100.00
tl_d_partial_access 50 50 100.00
aes_csr_hw_reset 2.000s 72.275us 5 5 100.00
aes_csr_rw 3.000s 93.012us 20 20 100.00
aes_csr_aliasing 3.000s 71.045us 5 5 100.00
aes_same_csr_outstanding 3.000s 626.319us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 50 50 100.00
aes_reseed 21.000s 3210.888us 50 50 100.00
fault_inject 647 700 92.43
aes_fi 30.000s 1625.006us 49 50 98.00
aes_control_fi 62.038s 0.000us 274 300 91.33
aes_cipher_fi 61.000s 0.000us 324 350 92.57
shadow_reg_update_error 20 20 100.00
aes_shadow_reg_errors 3.000s 396.171us 20 20 100.00
shadow_reg_read_clear_staged_value 20 20 100.00
aes_shadow_reg_errors 3.000s 396.171us 20 20 100.00
shadow_reg_storage_error 20 20 100.00
aes_shadow_reg_errors 3.000s 396.171us 20 20 100.00
shadowed_reset_glitch 20 20 100.00
aes_shadow_reg_errors 3.000s 396.171us 20 20 100.00
shadow_reg_update_error_with_csr_rw 20 20 100.00
aes_shadow_reg_errors_with_csr_rw 4.000s 814.238us 20 20 100.00
tl_intg_err 25 25 100.00
aes_sec_cm 8.000s 717.490us 5 5 100.00
aes_tl_intg_err 4.000s 794.193us 20 20 100.00
sec_cm_bus_integrity 20 20 100.00
aes_tl_intg_err 4.000s 794.193us 20 20 100.00
sec_cm_lc_escalate_en_intersig_mubi 50 50 100.00
aes_alert_reset 23.000s 2361.499us 50 50 100.00
sec_cm_main_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 396.171us 20 20 100.00
sec_cm_gcm_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 396.171us 20 20 100.00
sec_cm_main_config_sparse 217 220 98.64
aes_smoke 21.000s 1176.012us 50 50 100.00
aes_stress 30.000s 1535.849us 50 50 100.00
aes_alert_reset 23.000s 2361.499us 50 50 100.00
aes_core_fi 291.000s 10013.008us 67 70 95.71
sec_cm_gcm_config_sparse 267 270 98.89
aes_gcm_save_restore 23.000s 1534.262us 100 100 100.00
aes_config_error 12.000s 468.271us 50 50 100.00
aes_stress 30.000s 1535.849us 50 50 100.00
aes_core_fi 291.000s 10013.008us 67 70 95.71
sec_cm_aux_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 396.171us 20 20 100.00
sec_cm_aux_config_regwen 99 100 99.00
aes_readability 3.000s 149.648us 49 50 98.00
aes_stress 30.000s 1535.849us 50 50 100.00
sec_cm_key_sideload 100 100 100.00
aes_stress 30.000s 1535.849us 50 50 100.00
aes_sideload 18.000s 1558.470us 50 50 100.00
sec_cm_key_sw_unreadable 49 50 98.00
aes_readability 3.000s 149.648us 49 50 98.00
sec_cm_data_reg_sw_unreadable 49 50 98.00
aes_readability 3.000s 149.648us 49 50 98.00
sec_cm_key_sec_wipe 49 50 98.00
aes_readability 3.000s 149.648us 49 50 98.00
sec_cm_iv_config_sec_wipe 49 50 98.00
aes_readability 3.000s 149.648us 49 50 98.00
sec_cm_data_reg_sec_wipe 49 50 98.00
aes_readability 3.000s 149.648us 49 50 98.00
sec_cm_data_reg_key_sca 50 50 100.00
aes_stress 30.000s 1535.849us 50 50 100.00
sec_cm_key_masking 50 50 100.00
aes_stress 30.000s 1535.849us 50 50 100.00
sec_cm_main_fsm_sparse 49 50 98.00
aes_fi 30.000s 1625.006us 49 50 98.00
sec_cm_main_fsm_redun 697 750 92.93
aes_fi 30.000s 1625.006us 49 50 98.00
aes_control_fi 62.038s 0.000us 274 300 91.33
aes_cipher_fi 61.000s 0.000us 324 350 92.57
aes_ctr_fi 6.000s 79.053us 50 50 100.00
sec_cm_cipher_fsm_sparse 49 50 98.00
aes_fi 30.000s 1625.006us 49 50 98.00
sec_cm_cipher_fsm_redun 647 700 92.43
aes_fi 30.000s 1625.006us 49 50 98.00
aes_control_fi 62.038s 0.000us 274 300 91.33
aes_cipher_fi 61.000s 0.000us 324 350 92.57
sec_cm_cipher_ctr_redun 324 350 92.57
aes_cipher_fi 61.000s 0.000us 324 350 92.57
sec_cm_ctr_fsm_sparse 49 50 98.00
aes_fi 30.000s 1625.006us 49 50 98.00
sec_cm_ctr_fsm_redun 373 400 93.25
aes_fi 30.000s 1625.006us 49 50 98.00
aes_control_fi 62.038s 0.000us 274 300 91.33
aes_ctr_fi 6.000s 79.053us 50 50 100.00
sec_cm_ghash_fsm_sparse 49 50 98.00
aes_fi 30.000s 1625.006us 49 50 98.00
sec_cm_ctrl_sparse 697 750 92.93
aes_fi 30.000s 1625.006us 49 50 98.00
aes_control_fi 62.038s 0.000us 274 300 91.33
aes_cipher_fi 61.000s 0.000us 324 350 92.57
aes_ctr_fi 6.000s 79.053us 50 50 100.00
sec_cm_main_fsm_global_esc 50 50 100.00
aes_alert_reset 23.000s 2361.499us 50 50 100.00
sec_cm_main_fsm_local_esc 697 750 92.93
aes_fi 30.000s 1625.006us 49 50 98.00
aes_control_fi 62.038s 0.000us 274 300 91.33
aes_cipher_fi 61.000s 0.000us 324 350 92.57
aes_ctr_fi 6.000s 79.053us 50 50 100.00
sec_cm_cipher_fsm_local_esc 697 750 92.93
aes_fi 30.000s 1625.006us 49 50 98.00
aes_control_fi 62.038s 0.000us 274 300 91.33
aes_cipher_fi 61.000s 0.000us 324 350 92.57
aes_ctr_fi 6.000s 79.053us 50 50 100.00
sec_cm_ctr_fsm_local_esc 373 400 93.25
aes_fi 30.000s 1625.006us 49 50 98.00
aes_control_fi 62.038s 0.000us 274 300 91.33
aes_ctr_fi 6.000s 79.053us 50 50 100.00
sec_cm_ghash_fsm_local_esc 139 140 99.29
aes_ghash_fi 4.000s 494.295us 90 90 100.00
aes_fi 30.000s 1625.006us 49 50 98.00
sec_cm_data_reg_local_esc 647 700 92.43
aes_fi 30.000s 1625.006us 49 50 98.00
aes_control_fi 62.038s 0.000us 274 300 91.33
aes_cipher_fi 61.000s 0.000us 324 350 92.57
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 10 10.00
aes_stress_all_with_rand_reset 146.000s 40179.651us 1 10 10.00

Error Messages

   Test seed line log context
Job timed out after * minutes 25 test runs
aes_control_fi 85454311058723660200703479842530215980465329514899542277541047996878606651279 None
aes_control_fi 66846517684220417674926625135490638119653065985930248643343643430878884364686 None
aes_control_fi 28075829027429866892913666024276078616688945670221808454840557407173353578844 None
aes_control_fi 11250276283884482339780061217598476137515236835912435462184070613931418821259 None
aes_cipher_fi 91432771964812749660943531387974959216060800061778356561178501325971865093732 None
aes_cipher_fi 70220451643694581476607828663572520777824287685143399566279019157642225893447 None
aes_cipher_fi 28200712273994447114676713365599661568226496878359531241434711157824733179880 None
aes_control_fi 29146667103403511935655856562137256796886042254795535059441089198593868618315 None
aes_cipher_fi 62951054659064679147375343022301413871116419280281332119622240446985083201688 None
aes_control_fi 71311914695090527975507140411370671623996287585116889260940657484491434573507 None
aes_cipher_fi 91442744769743481730913196068970773404043451854048380693889621051304320750872 None
aes_control_fi 21281451588857439805246047042810324185716818855441266183263104954818608530487 None
aes_control_fi 87818895375393624533842571735239698979174815197202674940471428356468018344975 None
aes_cipher_fi 9893650036233845031718414651942166336318812298322901703656722585083460431761 None
aes_control_fi 19366236098344240437500500691280623210695956427075683626273951692398911147883 None
aes_control_fi 42950519220830904977675505743663798704136058562289500012842547182303245476059 None
aes_cipher_fi 52635083040610257550481513390815444505345934258585155062305466172268654394955 None
aes_control_fi 88669202829206063216408482293333945360597099703844984876126165159283433276661 None
aes_control_fi 741602221875172962895683563176520504458766839575629427032263157700537707926 None
aes_control_fi 91245972783720374852897008516655209307434752338934309521638661272728634368017 None
aes_control_fi 136295714343279551581708071359497755114070277017442841292842559187645544681 None
aes_control_fi 77096116409320982990559120905280275974825083060635056299809886226470372409871 None
aes_control_fi 16378262336610182555758370261794639368770963932457578525555323884638543433117 None
aes_control_fi 88137026915501681152812194774778783656583568638699885220276907208600698154717 None
aes_cipher_fi 22564962391493691021937294079718859155495700813396374578492242282790010588411 None
UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred! 17 test runs
aes_cipher_fi 28896850257611279146140507576082647558309051972597803525415046938507479419769 144
UVM_INFO @ 10007974120 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 87172249691060350599050956109006337537044993730899620262842078164955178871988 141
UVM_INFO @ 10020710962 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 94192471703167044229596060713462818359515382637286921089569145649894326313988 146
UVM_INFO @ 10061289983 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 105181305418849001240029167267965295424527840279844439409796446893081654409750 142
UVM_INFO @ 10018642574 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 84709619678846279844156791128947958872581819573268976263244130745026803176279 148
UVM_INFO @ 10046152710 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 76134213395252028267493129191317372072716601405126921047964444805686928718758 149
UVM_INFO @ 10012418392 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 19915474375038584075733181200466486467034840666135591164069458885508730005946 142
UVM_INFO @ 10015146491 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 65327718092096149977423921102790548615659999387284181200459529424242009593868 159
UVM_INFO @ 10005964994 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 38058993106632208768510311537715232527146277061089513725305927452055212069748 151
UVM_INFO @ 10024111235 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 44141391280945978299906015215469189749477119566809762033086975206328563351308 147
UVM_INFO @ 10041709815 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 112931747751776995135680907926847816429971548836957303117204557518582134815403 143
UVM_INFO @ 10049947711 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 112200218866590061618047030142608537727856840439098081251844536289038910177655 146
UVM_INFO @ 10016740658 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 25150245025003604934545441069211330364763410255857643812109855002559999531247 150
UVM_INFO @ 10008498980 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 1043477983714078253672400369199754553771498065831182829501876988966317784366 141
UVM_INFO @ 10009874888 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 42003742555037693760082805094589272624978239070561092391828498458627584497828 155
UVM_INFO @ 10022126784 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 89818737265864696167919836687454539003685221801771948840272869113589542966315 146
UVM_INFO @ 10012526109 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 81525833722582466111392088157951684373351389831677229880784707390911042678239 155
UVM_INFO @ 10016179631 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred! 9 test runs
aes_control_fi 91659727409101606810063436597712728712474261032895015470793790255903954058126 147
UVM_INFO @ 10006610111 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 26587762352062750923805755534240422092436203791622284897432981510656236869319 147
UVM_INFO @ 10011511658 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 92869496161943067456765048449793646382956416095640510913428844582015928215472 142
UVM_INFO @ 10024799950 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 36560681277732198455324777649105031792800646534658362206192670378333010440113 146
UVM_INFO @ 10022967510 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 81312159072163173393609967606500414057689740563808182688828197535284841859314 155
UVM_INFO @ 10007855644 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 106568488126234997512609023442302658010919699383022130073790438333845222769977 149
UVM_INFO @ 10046463951 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 31201436050141889147946988944692855065087425758802848251812434386283412062785 153
UVM_INFO @ 10015794807 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 35614964111303960320528331547820862864125674789190555067616396051968032724051 150
UVM_INFO @ 10046799560 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 90348567651658541416416895672352169861786372830743021692037793758541051171693 148
UVM_INFO @ 10014601950 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1287) [aes_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. 3 test runs
aes_stress_all_with_rand_reset 68822822126702409598800045197704718046706596986035286011309461246836630699211 169
UVM_INFO @ 318963026 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 106137440045858706228829266802097532895797347936056988867914185835167536536436 217
UVM_INFO @ 682247188 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 111036609857863280342440518650044993428598107923350977242223626867528439067013 247
UVM_INFO @ 998482540 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_base_vseq.sv:76) [aes_alert_reset_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) 2 test runs
aes_stress_all_with_rand_reset 75502939717033302659809053652554928197660211710410996204698686276619865087244 465
UVM_INFO @ 502818591 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 103569142492995179532121339963561771854535774200206873293738177861261442016443 754
UVM_INFO @ 798455554 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_base_vseq.sv:76) [aes_stress_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) 2 test runs
aes_stress_all_with_rand_reset 27282518845495484264617092646948563973576182722620864320467580756747114800089 364
UVM_INFO @ 357465687 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 114197185573373832061589318652354220425611704708350057471079604569289745749122 1157
UVM_INFO @ 666073489 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_core_fi_vseq.sv:70) [aes_core_fi_vseq] wait timeout occurred! 2 test runs
aes_core_fi 39574611806030192147400418736322207799806319247125029053059000720030324726194 151
UVM_INFO @ 10009041803 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 48300591291555377048995609819198023519140500659514536305473234005277276950591 148
UVM_INFO @ 10014526469 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues 1 test run
aes_stress_all_with_rand_reset 69548183079842632512461995777184860372764179345832775779994885397036542345395 565
UVM_INFO @ 1766378012 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_base_vseq.sv:307) virtual_sequencer [aes_reseed_vseq] Expected GCM phase GCM_TEXT, got GCM_TAG 1 test run
aes_stress_all_with_rand_reset 90074624208496939392137718609011817985951847931773093239090499092391015233007 2313
UVM_INFO @ 5214022600 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=10) 1 test run
aes_core_fi 13335811501269559561184707484695587551447934825663183088460122512411281901290 141
UVM_INFO @ 10013007574 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_scoreboard.sv:785) scoreboard [scoreboard] # * 1 test run
aes_fi 82179846011384722053979003868777997529904075783923683348526965316045834603361 7298
TEST FAILED MESSAGES DID NOT MATCH
0 9b 5d 00 0
1 3a b1 00 0
UVM_FATAL (aes_readability_vseq.sv:66) virtual_sequencer [aes_readability_vseq] ----|Write data reg was Readable |---- 1 test run
aes_readability 6382607264094709455939733184969299048627687781706197418529906139971689114229 138
UVM_INFO @ 9784354 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=4) 1 test run
aes_cipher_fi 53391950789456691034499737507829954872702306254464483370849362935206067508199 138
UVM_INFO @ 10015309254 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---