| V1 |
|
100.00% |
| V2 |
|
90.56% |
| V2S |
|
96.23% |
| V3 |
|
46.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 50 | 50 | 100.00 | |||
| alert_handler_smoke | 96.470s | 1357.266us | 50 | 50 | 100.00 | |
| csr_hw_reset | 5 | 5 | 100.00 | |||
| alert_handler_csr_hw_reset | 8.190s | 471.678us | 5 | 5 | 100.00 | |
| csr_rw | 20 | 20 | 100.00 | |||
| alert_handler_csr_rw | 14.720s | 538.411us | 20 | 20 | 100.00 | |
| csr_bit_bash | 5 | 5 | 100.00 | |||
| alert_handler_csr_bit_bash | 214.980s | 7698.890us | 5 | 5 | 100.00 | |
| csr_aliasing | 5 | 5 | 100.00 | |||
| alert_handler_csr_aliasing | 303.780s | 20569.467us | 5 | 5 | 100.00 | |
| csr_mem_rw_with_rand_reset | 20 | 20 | 100.00 | |||
| alert_handler_csr_mem_rw_with_rand_reset | 20.660s | 219.574us | 20 | 20 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 25 | 25 | 100.00 | |||
| alert_handler_csr_rw | 14.720s | 538.411us | 20 | 20 | 100.00 | |
| alert_handler_csr_aliasing | 303.780s | 20569.467us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| esc_accum | 50 | 50 | 100.00 | |||
| alert_handler_esc_alert_accum | 418.500s | 15307.774us | 50 | 50 | 100.00 | |
| esc_timeout | 50 | 50 | 100.00 | |||
| alert_handler_esc_intr_timeout | 97.300s | 2800.627us | 50 | 50 | 100.00 | |
| entropy | 49 | 50 | 98.00 | |||
| alert_handler_entropy | 3600.124s | 0.000us | 49 | 50 | 98.00 | |
| sig_int_fail | 49 | 50 | 98.00 | |||
| alert_handler_sig_int_fail | 100.110s | 2943.435us | 49 | 50 | 98.00 | |
| clk_skew | 50 | 50 | 100.00 | |||
| alert_handler_smoke | 96.470s | 1357.266us | 50 | 50 | 100.00 | |
| random_alerts | 50 | 50 | 100.00 | |||
| alert_handler_random_alerts | 94.360s | 5006.947us | 50 | 50 | 100.00 | |
| random_classes | 50 | 50 | 100.00 | |||
| alert_handler_random_classes | 101.410s | 6648.060us | 50 | 50 | 100.00 | |
| ping_timeout | 18 | 50 | 36.00 | |||
| alert_handler_ping_timeout | 544.770s | 11540.322us | 18 | 50 | 36.00 | |
| lpg | 88 | 100 | 88.00 | |||
| alert_handler_lpg | 3600.124s | 0.000us | 42 | 50 | 84.00 | |
| alert_handler_lpg_stub_clk | 3600.253s | 0.000us | 46 | 50 | 92.00 | |
| stress_all | 49 | 50 | 98.00 | |||
| alert_handler_stress_all | 5541.780s | 201490.930us | 49 | 50 | 98.00 | |
| alert_handler_entropy_stress_test | 0 | 20 | 0.00 | |||
| alert_handler_entropy_stress | 26.000s | 2235.820us | 0 | 20 | 0.00 | |
| alert_handler_alert_accum_saturation | 20 | 20 | 100.00 | |||
| alert_handler_alert_accum_saturation | 6.270s | 62.157us | 20 | 20 | 100.00 | |
| intr_test | 50 | 50 | 100.00 | |||
| alert_handler_intr_test | 3.210s | 22.651us | 50 | 50 | 100.00 | |
| tl_d_oob_addr_access | 20 | 20 | 100.00 | |||
| alert_handler_tl_errors | 33.340s | 1061.877us | 20 | 20 | 100.00 | |
| tl_d_illegal_access | 20 | 20 | 100.00 | |||
| alert_handler_tl_errors | 33.340s | 1061.877us | 20 | 20 | 100.00 | |
| tl_d_outstanding_access | 50 | 50 | 100.00 | |||
| alert_handler_csr_hw_reset | 8.190s | 471.678us | 5 | 5 | 100.00 | |
| alert_handler_csr_rw | 14.720s | 538.411us | 20 | 20 | 100.00 | |
| alert_handler_csr_aliasing | 303.780s | 20569.467us | 5 | 5 | 100.00 | |
| alert_handler_same_csr_outstanding | 66.180s | 2991.921us | 20 | 20 | 100.00 | |
| tl_d_partial_access | 50 | 50 | 100.00 | |||
| alert_handler_csr_hw_reset | 8.190s | 471.678us | 5 | 5 | 100.00 | |
| alert_handler_csr_rw | 14.720s | 538.411us | 20 | 20 | 100.00 | |
| alert_handler_csr_aliasing | 303.780s | 20569.467us | 5 | 5 | 100.00 | |
| alert_handler_same_csr_outstanding | 66.180s | 2991.921us | 20 | 20 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| shadow_reg_update_error | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 489.140s | 36865.376us | 20 | 20 | 100.00 | |
| shadow_reg_read_clear_staged_value | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 489.140s | 36865.376us | 20 | 20 | 100.00 | |
| shadow_reg_storage_error | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 489.140s | 36865.376us | 20 | 20 | 100.00 | |
| shadowed_reset_glitch | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 489.140s | 36865.376us | 20 | 20 | 100.00 | |
| shadow_reg_update_error_with_csr_rw | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors_with_csr_rw | 1192.750s | 16411.081us | 20 | 20 | 100.00 | |
| tl_intg_err | 25 | 25 | 100.00 | |||
| alert_handler_sec_cm | 95.940s | 2500.318us | 5 | 5 | 100.00 | |
| alert_handler_tl_intg_err | 110.100s | 2668.794us | 20 | 20 | 100.00 | |
| sec_cm_bus_integrity | 20 | 20 | 100.00 | |||
| alert_handler_tl_intg_err | 110.100s | 2668.794us | 20 | 20 | 100.00 | |
| sec_cm_config_shadow | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 489.140s | 36865.376us | 20 | 20 | 100.00 | |
| sec_cm_ping_timer_config_regwen | 50 | 50 | 100.00 | |||
| alert_handler_smoke | 96.470s | 1357.266us | 50 | 50 | 100.00 | |
| sec_cm_alert_config_regwen | 50 | 50 | 100.00 | |||
| alert_handler_smoke | 96.470s | 1357.266us | 50 | 50 | 100.00 | |
| sec_cm_alert_loc_config_regwen | 50 | 50 | 100.00 | |||
| alert_handler_smoke | 96.470s | 1357.266us | 50 | 50 | 100.00 | |
| sec_cm_class_config_regwen | 50 | 50 | 100.00 | |||
| alert_handler_smoke | 96.470s | 1357.266us | 50 | 50 | 100.00 | |
| sec_cm_alert_intersig_diff | 49 | 50 | 98.00 | |||
| alert_handler_sig_int_fail | 100.110s | 2943.435us | 49 | 50 | 98.00 | |
| sec_cm_lpg_intersig_mubi | 42 | 50 | 84.00 | |||
| alert_handler_lpg | 3600.124s | 0.000us | 42 | 50 | 84.00 | |
| sec_cm_esc_intersig_diff | 49 | 50 | 98.00 | |||
| alert_handler_sig_int_fail | 100.110s | 2943.435us | 49 | 50 | 98.00 | |
| sec_cm_alert_rx_intersig_bkgn_chk | 49 | 50 | 98.00 | |||
| alert_handler_entropy | 3600.124s | 0.000us | 49 | 50 | 98.00 | |
| sec_cm_esc_tx_intersig_bkgn_chk | 49 | 50 | 98.00 | |||
| alert_handler_entropy | 3600.124s | 0.000us | 49 | 50 | 98.00 | |
| sec_cm_esc_timer_fsm_sparse | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 95.940s | 2500.318us | 5 | 5 | 100.00 | |
| sec_cm_ping_timer_fsm_sparse | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 95.940s | 2500.318us | 5 | 5 | 100.00 | |
| sec_cm_esc_timer_fsm_local_esc | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 95.940s | 2500.318us | 5 | 5 | 100.00 | |
| sec_cm_ping_timer_fsm_local_esc | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 95.940s | 2500.318us | 5 | 5 | 100.00 | |
| sec_cm_esc_timer_fsm_global_esc | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 95.940s | 2500.318us | 5 | 5 | 100.00 | |
| sec_cm_accu_ctr_redun | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 95.940s | 2500.318us | 5 | 5 | 100.00 | |
| sec_cm_esc_timer_ctr_redun | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 95.940s | 2500.318us | 5 | 5 | 100.00 | |
| sec_cm_ping_timer_ctr_redun | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 95.940s | 2500.318us | 5 | 5 | 100.00 | |
| sec_cm_ping_timer_lfsr_redun | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 95.940s | 2500.318us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 23 | 50 | 46.00 | |||
| alert_handler_stress_all_with_rand_reset | 512.930s | 87581.755us | 23 | 50 | 46.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_ERROR (cip_base_vseq.sv:1286) [alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. | 27 test runs | |||
| alert_handler_stress_all_with_rand_reset | 56619255068253944838457853938592080420980301402167770492356440193179850824698 | 123 |
UVM_INFO @ 6603775773 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 71598095290959299460475110103431247096812925515623995669427875679191578888671 | 180 |
UVM_INFO @ 14234216757 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 26554562086186652182660122433940911501219153854232980344635736372256513091009 | 83 |
UVM_INFO @ 403643587 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 33093620264493989211160053924297830963300975183759219564426057753628249087296 | 140 |
UVM_INFO @ 9521704217 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 21880799146728334580512514854365957587555674873070219237726183876249637541556 | 93 |
UVM_INFO @ 744264153 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 63853521384043860374070419877675120061638162914872447650213395073514853806137 | 102 |
UVM_INFO @ 1747183882 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 113519739342504865536127703086936888610636796975154220718890913723219942631607 | 126 |
UVM_INFO @ 3065163539 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 105786206657840236220380497915769546253755702744725575783996381353240978111495 | 109 |
UVM_INFO @ 1327249529 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 86712767764950524332245899517504687170855581015319405695180101834467415925100 | 83 |
UVM_INFO @ 225115646 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 97827989388521520818131794900371629996739251251764067754040161617213032998159 | 110 |
UVM_INFO @ 1836861313 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 22376882172088376217363990251123321438598559201803804563534377109628198911147 | 129 |
UVM_INFO @ 2417046716 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 32290607727177818447944346526491465049703763956366470076281005898137682644393 | 213 |
UVM_INFO @ 17171756033 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 57356288730346465613493820278927718830018125127374144428479606267522685054241 | 117 |
UVM_INFO @ 7157311936 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 95577605562995759578866250496858113477759980684199868135620316334067423385662 | 150 |
UVM_INFO @ 10256587978 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 115568413499049927661136510207396675029101043650687387254787880284601611023800 | 135 |
UVM_INFO @ 2072006466 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 111787992706651666112697474477674508408590698016868426479736101404763654564433 | 98 |
UVM_INFO @ 3880365027 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 34470543758469353686491840383880867296702053313329311019564538504957002365273 | 143 |
UVM_INFO @ 8582546655 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 20633621322272764842440362546278604890957252541423933483586218492228405030955 | 103 |
UVM_INFO @ 3230822024 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 90202576968768623291291870290172996698408146486051022846364743897657375371116 | 106 |
UVM_INFO @ 1214252303 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 76809196480230041855931533776025139836252782928491291589273582244480416491486 | 98 |
UVM_INFO @ 1874011796 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 40012566277736450640337089343763422979685716680348656813153407605770313730035 | 304 |
UVM_INFO @ 7963478702 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 32140312599772867623094172928775483873328642407386856685813201617770901679983 | 141 |
UVM_INFO @ 2565738110 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 53519676192425506121161305004834435535712698320364723096609131031802714795541 | 102 |
UVM_INFO @ 417525772 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 49979790567256058668122485018727276823830218699005107690814583630359071063849 | 93 |
UVM_INFO @ 103371405 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 6424355309890939076217727538031202276567379850516153772927881883956461645595 | 105 |
UVM_INFO @ 337917187 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 83474496185610469672701050264406094445667844487833645337790742908639100680046 | 258 |
UVM_INFO @ 2586257010 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 28018183663366631371938261514056450775030012486235465546349288225999264727605 | 101 |
UVM_INFO @ 295579028 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (alert_handler_scoreboard.sv:486) [scoreboard] Check failed intr_state_val == item.d_data (* [*] vs * [*]) reg name: intr_state | 26 test runs | |||
| alert_handler_ping_timeout | 111996151657720770251097214032993601826536695037228250779498093363847585272147 | 134 |
UVM_INFO @ 8701342645 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 64269297005951325863447463248522837883436477554006266931238572345271517294353 | 87 |
UVM_INFO @ 17913091302 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 70649636745959890621923196470696262961974527278415769663568793360062623085726 | 108 |
UVM_INFO @ 7916136927 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 80705400463160877385154862010708256508039107736346512950683365376872735164894 | 96 |
UVM_INFO @ 14006860422 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 101416829275028558081126595706239038065261253480330318892627052266192223043346 | 90 |
UVM_INFO @ 1986640493 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_lpg | 60374361546740306098921295396555475334021610406440220328598321669845897505318 | 80 |
UVM_INFO @ 114477642226 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 66919600068679631537330555120557482275050242334892408060773491560915500122795 | 87 |
UVM_INFO @ 9729182694 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 14589663489914437943428952291435440430840593919055907974186288085114181228794 | 96 |
UVM_INFO @ 3206278132 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 17989534794030195681413112769657074740575719447665013725379552238627657791491 | 114 |
UVM_INFO @ 18970111379 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 65189788439601990249676366827558415106129618571329768011383791340967599524312 | 123 |
UVM_INFO @ 10856501200 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 14308441587740146836508886802772909951786365572680966092737109235585448371503 | 102 |
UVM_INFO @ 18133038059 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 14292366093251404615180070216873831328496931716465814565642948509776639779368 | 96 |
UVM_INFO @ 51937570392 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 78705133639354804835749026596191153398146575112823774388399916608983409181871 | 93 |
UVM_INFO @ 2908510323 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 16651869468409399379336594027902315332334990972435441674008191585588062926610 | 105 |
UVM_INFO @ 4434767486 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 77829246029764420929302606606190287092147818489623832800806931277343615104149 | 95 |
UVM_INFO @ 6156972683 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 42933629520508428891340531482723624392888873797489056449767801214599566442843 | 105 |
UVM_INFO @ 20321920160 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 63579503464308242596241488861610558032151047510003426317137365026336386030293 | 84 |
UVM_INFO @ 3476220066 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 67704364682886722187550462901256319618218770817440839512655472695438968352524 | 87 |
UVM_INFO @ 3754823258 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 45993517337119720573112163053517890150846885265465421801847741389382342753449 | 93 |
UVM_INFO @ 4676069906 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 17398780252049712821358984707623845029470425874611496796760059913802209012762 | 123 |
UVM_INFO @ 10226542293 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 78517363511645172261918345670449611132705115427013552827835972216772038296906 | 99 |
UVM_INFO @ 5298852899 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 50652807748885938265731879706964144644357442975166886665669545602126550194114 | 99 |
UVM_INFO @ 10585404417 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 20953405602553340862462049473263899143624534115011932027708839676009937982825 | 93 |
UVM_INFO @ 10946167572 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 45016420064129549796691183203334241827002377828126700119019546254252158052370 | 96 |
UVM_INFO @ 2835424173 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 16860543500822418142326094033701916271225964697031126623301233835377780087484 | 114 |
UVM_INFO @ 16963043640 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 57922776055288120584177996547624003212168603905318232666489753427501641334505 | 90 |
UVM_INFO @ 16912546866 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR sequencer [alert_sender_ping_rsp_seq] Response queue overflow, response was dropped | 20 test runs | |||
| alert_handler_entropy_stress | 40700233151694318704618154616726838150965335285590599878448779456355042380831 | 168 |
UVM_INFO @ 144549582 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 50455323662936422490580357820872084497121192952544881404064759988001842252743 | 194 |
UVM_INFO @ 339426837 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 22592182788793607345644754158560233822612596378832993898634654709669838657626 | 172 |
UVM_INFO @ 508230727 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 26405094907293889553134326839723359973346410366107120768562689926291799420670 | 206 |
UVM_INFO @ 421119248 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 101589007578940536870762184537033045226307382288322906398932919436917464291970 | 220 |
UVM_INFO @ 117057733 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 46466746229887645891387133156816810219260191594028315742269736246613601300740 | 212 |
UVM_INFO @ 743979642 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 106014167949286028681092950887985169754912229456165701186934870740879469874977 | 222 |
UVM_INFO @ 92355830 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 70411351320143855206008764605939481580557491505868271041187989365534866776979 | 160 |
UVM_INFO @ 439952687 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 78067633652921493496022794371171208544740731151960280534181922992501523782030 | 192 |
UVM_INFO @ 372267429 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 82856560613388389859854470457467509610552318240765465129248618145091598640737 | 200 |
UVM_INFO @ 261186858 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 18636470712088348249276965119744604880924531473683914114252566045059197868895 | 220 |
UVM_INFO @ 167012494 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 99406870799138579394237512219185782593968071908158317667854443818641930610135 | 218 |
UVM_INFO @ 321392191 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 78644845137911296535362969552960778501694726350169103526927095755038406665175 | 182 |
UVM_INFO @ 623717565 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 7944865591654506041109188178846446307395593540833722196240080884153846377628 | 228 |
UVM_INFO @ 437628374 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 59958361059597999167014520897712182035218575470648103531888674566443472898861 | 224 |
UVM_INFO @ 259182415 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 86268052813219167811967501873742661040433523577591312405053209584961169517910 | 230 |
UVM_INFO @ 455539311 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 91076807118983178998146748740888735701216866979083606772059429143504838930072 | 230 |
UVM_INFO @ 87036171 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 52097871329519834712719760061062805467026583582437262652282562879177083092964 | 222 |
UVM_INFO @ 143564233 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 48349108290012641797420141969456937041363989085043174559332200413872766939486 | 198 |
UVM_INFO @ 2235819676 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 6386540583485942644558183643110806538551194675683083395092959988385812928002 | 208 |
UVM_INFO @ 278688686 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| Job timed out after * minutes | 10 test runs | |||
| alert_handler_lpg_stub_clk | 59298629241465145760508385577156955192299148315520071810016375350942826283178 | None | ||
| alert_handler_lpg | 23120196656385754616144252517765201274551175034231883522808790297305978274487 | None | ||
| alert_handler_lpg | 105907998836380628625646772904163702748252265228692844840790586819674233051941 | None | ||
| alert_handler_lpg | 45158076086316946156285805130386505071726489846096174207222476071308245574257 | None | ||
| alert_handler_entropy | 18891669844260016732392029447280032905314132345428251358612957432696891020348 | None | ||
| alert_handler_lpg_stub_clk | 64308607498953043023963831324166883436257075602782889707894074282058131627934 | None | ||
| alert_handler_lpg_stub_clk | 2409060082698579922367249726816843849403446401945285109825185407555026759914 | None | ||
| alert_handler_lpg | 48643820367276529398778500350930533167030322050828104264119269440198132135271 | None | ||
| alert_handler_lpg | 77758352385128422674845775275203543594113096857162425915750364707650780841034 | None | ||
| alert_handler_lpg | 70969298093179871263143536314056294426940103883925087608757383552208417775299 | None | ||
| UVM_ERROR (alert_handler_scoreboard.sv:608) scoreboard [scoreboard] Register/crashdump mismatch. loc_alert_cause[*] is * in the crashdump and * in the register model. | 8 test runs | |||
| alert_handler_lpg | 10768527122849033914193599905195145272534266694648506266499961674572662459261 | 80 |
UVM_INFO @ 82318694565 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 47717960885935828727141941136718129053793855579431437210314902248087698394481 | 80 |
UVM_INFO @ 2117544915 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 51267200509319528134223323402141616001210902839729131920622207445049590095749 | 80 |
UVM_INFO @ 593341706 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 86118784976243402489332410416650532415319803336314000995905768912317299898218 | 80 |
UVM_INFO @ 1809898356 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 33659391658795064592076415271731965205151390665981222153908997469359759236922 | 80 |
UVM_INFO @ 309579947 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 11707971492401071306535723300462438302696658693995719234202300082439511764748 | 80 |
UVM_INFO @ 3951000797 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 82353330630965649600941194570990544244597065652221293919016653039469914542679 | 80 |
UVM_INFO @ 548684485 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 44296222667888762647494003497157125296402874634340139334434652560363764995773 | 80 |
UVM_INFO @ 1819118447 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| Some pass patterns missing: ['^TEST PASSED (UVM_)?CHECKS$'] | 1 test run | |||
| alert_handler_stress_all | 67259303407836729576885351887769802753210065493108031354066243832617664528924 | None |
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; May 22 15:13 2026
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 255
|
|
| UVM_ERROR (alert_handler_scoreboard.sv:258) scoreboard [scoreboard] Unexpected interrupt value in cfg.intr_vif.pins[*]: saw *, but expected *. (is_int_err = *, local_alert_type = LocalEscIntFail) | 1 test run | |||
| alert_handler_sig_int_fail | 71688314327990926262629619291531769768094992845280213299141035515578616520560 | 85 |
UVM_INFO @ 114147316 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (alert_handler_scoreboard.sv:258) scoreboard [scoreboard] Unexpected interrupt value in cfg.intr_vif.pins[*]: saw *, but expected *. (is_int_err = *, local_alert_type = LocalAlertPingFail) | 1 test run | |||
| alert_handler_lpg_stub_clk | 2170170765312119136459081825299574349290675081627514206254925680564752655895 | 81 |
UVM_INFO @ 44010890464 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|