Simulation Results: aes/gcm_unmasked

 
30/05/2026 03:06:07 DVSim: v1.49.0 sha: 1bd5f9a json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 92.72 %
  • code
  • 94.24 %
  • assert
  • 97.94 %
  • func
  • 85.98 %
  • block
  • 94.95 %
  • line
  • 96.05 %
  • branch
  • 89.93 %
  • toggle
  • 98.08 %
  • FSM
  • 92.91 %
Validation stages
V1
100.00%
V2
98.62%
V2S
90.41%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 2.000s 116.429us 1 1 100.00
smoke 10 10 100.00
aes_smoke 3.000s 78.884us 10 10 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 2.000s 90.651us 1 1 100.00
csr_rw 5 5 100.00
aes_csr_rw 2.000s 96.119us 5 5 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 6.000s 1713.601us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 3.000s 223.033us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
aes_csr_mem_rw_with_rand_reset 2.000s 87.594us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
aes_csr_rw 2.000s 96.119us 5 5 100.00
aes_csr_aliasing 3.000s 223.033us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 70 70 100.00
aes_smoke 3.000s 78.884us 10 10 100.00
aes_config_error 4.000s 131.131us 50 50 100.00
aes_stress 4.000s 141.240us 10 10 100.00
key_length 70 70 100.00
aes_smoke 3.000s 78.884us 10 10 100.00
aes_config_error 4.000s 131.131us 50 50 100.00
aes_stress 4.000s 141.240us 10 10 100.00
back2back 35 35 100.00
aes_stress 4.000s 141.240us 10 10 100.00
aes_b2b 8.000s 976.161us 25 25 100.00
backpressure 10 10 100.00
aes_stress 4.000s 141.240us 10 10 100.00
multi_message 94 95 98.95
aes_smoke 3.000s 78.884us 10 10 100.00
aes_config_error 4.000s 131.131us 50 50 100.00
aes_stress 4.000s 141.240us 10 10 100.00
aes_alert_reset 5.000s 201.869us 24 25 96.00
failure_test 84 85 98.82
aes_man_cfg_err 2.000s 74.487us 10 10 100.00
aes_config_error 4.000s 131.131us 50 50 100.00
aes_alert_reset 5.000s 201.869us 24 25 96.00
trigger_clear_test 10 10 100.00
aes_clear 3.000s 181.173us 10 10 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 5.000s 194.241us 1 1 100.00
reset_recovery 24 25 96.00
aes_alert_reset 5.000s 201.869us 24 25 96.00
stress 10 10 100.00
aes_stress 4.000s 141.240us 10 10 100.00
sideload 20 20 100.00
aes_stress 4.000s 141.240us 10 10 100.00
aes_sideload 9.000s 644.307us 10 10 100.00
deinitialization 10 10 100.00
aes_deinit 4.000s 253.710us 10 10 100.00
stress_all 8 10 80.00
aes_stress_all 30.000s 32604.706us 8 10 80.00
alert_test 10 10 100.00
aes_alert_test 3.000s 52.635us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
aes_tl_errors 4.000s 1472.001us 25 25 100.00
tl_d_illegal_access 25 25 100.00
aes_tl_errors 4.000s 1472.001us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
aes_csr_hw_reset 2.000s 90.651us 1 1 100.00
aes_csr_rw 2.000s 96.119us 5 5 100.00
aes_csr_aliasing 3.000s 223.033us 1 1 100.00
aes_same_csr_outstanding 3.000s 71.764us 5 5 100.00
tl_d_partial_access 12 12 100.00
aes_csr_hw_reset 2.000s 90.651us 1 1 100.00
aes_csr_rw 2.000s 96.119us 5 5 100.00
aes_csr_aliasing 3.000s 223.033us 1 1 100.00
aes_same_csr_outstanding 3.000s 71.764us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 10 10 100.00
aes_reseed 5.000s 553.286us 10 10 100.00
fault_inject 577 660 87.42
aes_fi 3.000s 248.698us 9 10 90.00
aes_control_fi 61.000s 0.000us 268 300 89.33
aes_cipher_fi 62.074s 0.000us 300 350 85.71
shadow_reg_update_error 20 20 100.00
aes_shadow_reg_errors 3.000s 128.197us 20 20 100.00
shadow_reg_read_clear_staged_value 20 20 100.00
aes_shadow_reg_errors 3.000s 128.197us 20 20 100.00
shadow_reg_storage_error 20 20 100.00
aes_shadow_reg_errors 3.000s 128.197us 20 20 100.00
shadowed_reset_glitch 20 20 100.00
aes_shadow_reg_errors 3.000s 128.197us 20 20 100.00
shadow_reg_update_error_with_csr_rw 20 20 100.00
aes_shadow_reg_errors_with_csr_rw 5.000s 894.739us 20 20 100.00
tl_intg_err 30 30 100.00
aes_sec_cm 6.000s 1913.717us 5 5 100.00
aes_tl_intg_err 4.000s 230.453us 25 25 100.00
sec_cm_bus_integrity 25 25 100.00
aes_tl_intg_err 4.000s 230.453us 25 25 100.00
sec_cm_lc_escalate_en_intersig_mubi 24 25 96.00
aes_alert_reset 5.000s 201.869us 24 25 96.00
sec_cm_main_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 128.197us 20 20 100.00
sec_cm_gcm_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 128.197us 20 20 100.00
sec_cm_main_config_sparse 134 145 92.41
aes_smoke 3.000s 78.884us 10 10 100.00
aes_stress 4.000s 141.240us 10 10 100.00
aes_alert_reset 5.000s 201.869us 24 25 96.00
aes_core_fi 311.000s 10010.320us 90 100 90.00
sec_cm_gcm_config_sparse 150 160 93.75
aes_config_error 4.000s 131.131us 50 50 100.00
aes_stress 4.000s 141.240us 10 10 100.00
aes_core_fi 311.000s 10010.320us 90 100 90.00
sec_cm_aux_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 128.197us 20 20 100.00
sec_cm_aux_config_regwen 20 20 100.00
aes_readability 3.000s 71.864us 10 10 100.00
aes_stress 4.000s 141.240us 10 10 100.00
sec_cm_key_sideload 20 20 100.00
aes_stress 4.000s 141.240us 10 10 100.00
aes_sideload 9.000s 644.307us 10 10 100.00
sec_cm_key_sw_unreadable 10 10 100.00
aes_readability 3.000s 71.864us 10 10 100.00
sec_cm_data_reg_sw_unreadable 10 10 100.00
aes_readability 3.000s 71.864us 10 10 100.00
sec_cm_key_sec_wipe 10 10 100.00
aes_readability 3.000s 71.864us 10 10 100.00
sec_cm_iv_config_sec_wipe 10 10 100.00
aes_readability 3.000s 71.864us 10 10 100.00
sec_cm_data_reg_sec_wipe 10 10 100.00
aes_readability 3.000s 71.864us 10 10 100.00
sec_cm_data_reg_key_sca 10 10 100.00
aes_stress 4.000s 141.240us 10 10 100.00
sec_cm_key_masking 10 10 100.00
aes_stress 4.000s 141.240us 10 10 100.00
sec_cm_main_fsm_sparse 9 10 90.00
aes_fi 3.000s 248.698us 9 10 90.00
sec_cm_main_fsm_redun 602 685 87.88
aes_fi 3.000s 248.698us 9 10 90.00
aes_control_fi 61.000s 0.000us 268 300 89.33
aes_cipher_fi 62.074s 0.000us 300 350 85.71
aes_ctr_fi 3.000s 68.871us 25 25 100.00
sec_cm_cipher_fsm_sparse 9 10 90.00
aes_fi 3.000s 248.698us 9 10 90.00
sec_cm_cipher_fsm_redun 577 660 87.42
aes_fi 3.000s 248.698us 9 10 90.00
aes_control_fi 61.000s 0.000us 268 300 89.33
aes_cipher_fi 62.074s 0.000us 300 350 85.71
sec_cm_cipher_ctr_redun 300 350 85.71
aes_cipher_fi 62.074s 0.000us 300 350 85.71
sec_cm_ctr_fsm_sparse 9 10 90.00
aes_fi 3.000s 248.698us 9 10 90.00
sec_cm_ctr_fsm_redun 302 335 90.15
aes_fi 3.000s 248.698us 9 10 90.00
aes_control_fi 61.000s 0.000us 268 300 89.33
aes_ctr_fi 3.000s 68.871us 25 25 100.00
sec_cm_ghash_fsm_sparse 9 10 90.00
aes_fi 3.000s 248.698us 9 10 90.00
sec_cm_ctrl_sparse 602 685 87.88
aes_fi 3.000s 248.698us 9 10 90.00
aes_control_fi 61.000s 0.000us 268 300 89.33
aes_cipher_fi 62.074s 0.000us 300 350 85.71
aes_ctr_fi 3.000s 68.871us 25 25 100.00
sec_cm_main_fsm_global_esc 24 25 96.00
aes_alert_reset 5.000s 201.869us 24 25 96.00
sec_cm_main_fsm_local_esc 602 685 87.88
aes_fi 3.000s 248.698us 9 10 90.00
aes_control_fi 61.000s 0.000us 268 300 89.33
aes_cipher_fi 62.074s 0.000us 300 350 85.71
aes_ctr_fi 3.000s 68.871us 25 25 100.00
sec_cm_cipher_fsm_local_esc 602 685 87.88
aes_fi 3.000s 248.698us 9 10 90.00
aes_control_fi 61.000s 0.000us 268 300 89.33
aes_cipher_fi 62.074s 0.000us 300 350 85.71
aes_ctr_fi 3.000s 68.871us 25 25 100.00
sec_cm_ctr_fsm_local_esc 302 335 90.15
aes_fi 3.000s 248.698us 9 10 90.00
aes_control_fi 61.000s 0.000us 268 300 89.33
aes_ctr_fi 3.000s 68.871us 25 25 100.00
sec_cm_ghash_fsm_local_esc 9 10 90.00
aes_fi 3.000s 248.698us 9 10 90.00
sec_cm_data_reg_local_esc 577 660 87.42
aes_fi 3.000s 248.698us 9 10 90.00
aes_control_fi 61.000s 0.000us 268 300 89.33
aes_cipher_fi 62.074s 0.000us 300 350 85.71
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 10 0.00
aes_stress_all_with_rand_reset 15.000s 1971.604us 0 10 0.00

Error Messages

   Test seed line log context
UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred! 34 test runs
aes_cipher_fi 54348137050154432468906446306706037686575654603653294461445762013829320770430 142
UVM_INFO @ 10005627938 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 88245303157848916787075229557438178707492989124558989896199529320187675548035 143
UVM_INFO @ 10008311546 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 25213110410941003284373057154229337307359475202064275080196110107503466377091 142
UVM_INFO @ 10024484689 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 63062776705477651487324921290568518515048550805071121360573443372651554907956 146
UVM_INFO @ 10006527910 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 86260702448336700217281339829045016931049981789759999891858452884960649434920 149
UVM_INFO @ 10002256550 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 72714234565034407606685386715950127478515170830400062392696855377229857710848 146
UVM_INFO @ 10059203444 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 63738204386012011937366629102332174455625912383095139173949460596095833878897 145
UVM_INFO @ 10007599650 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 36059463514745421058598158038350511608490939664952766082588391697122958101469 147
UVM_INFO @ 10030001074 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 49159327098034895496465565380240941127232716798378355371596209921879968085157 150
UVM_INFO @ 10005017359 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 37178844128425882648155153957635060170189748028718224741180491951027651483714 153
UVM_INFO @ 10014102106 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 67401737904633264371329731554908796826201254830871444331275095716526807437208 148
UVM_INFO @ 10008506940 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 6784018870801133592081719664529640478399536745350353146189134755726005403328 150
UVM_INFO @ 10004868788 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 14301643034931141986575062009876740213567216349645963858433876882597095879309 147
UVM_INFO @ 10028549562 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 77725092885374847103537289260806103471663541900508386453652388647186290846980 162
UVM_INFO @ 10007629649 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 41076750510315909441952693111976030103497417577764466064038285114463862651394 154
UVM_INFO @ 10005416062 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 83698045606884899157209932702754245993208870245106073404689997494994450230654 156
UVM_INFO @ 10006509997 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 80187713664818552117495134674910562713824547402393683799899692706093150606047 142
UVM_INFO @ 10007168404 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 37566291450388938357595576061764776640019201310372321269930928894356985430111 152
UVM_INFO @ 10004208319 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 703674674655321272979662364774257880325369252385932219901450917568258837704 155
UVM_INFO @ 10002661986 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 40398133665948886151467079487892606430688135076505596939789140172192824792468 147
UVM_INFO @ 10034984758 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 30964422166619266907735846940016478218492597480344198276420636085128957013082 154
UVM_INFO @ 10015282576 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 92873163177348653967371593937136982918493766481955968616872401774360872444581 153
UVM_INFO @ 10009353331 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 61182741081357982355806395839491016465442657676027729499710137466811874969385 146
UVM_INFO @ 10023374406 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 18558458369177746757576666586762769503701872706634613805481860018975462416560 156
UVM_INFO @ 10006351350 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 77993393776198101299540210033258126510364159364644386162757260734697460404647 151
UVM_INFO @ 10004300118 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 28583756725206216960454382517789172479850727048311955868435956117001529883456 151
UVM_INFO @ 10038185441 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 29554992339911503711845511934982068730480827020154576815150006472944771108884 140
UVM_INFO @ 10007316228 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 45326880710852352479817000481802555897502231666615236807645416855707460651194 146
UVM_INFO @ 10004945060 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 56671816414766289337641590384904661983588672498248871037378610366061078942600 142
UVM_INFO @ 10061801191 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 101527847504647593788110379157242258302076772440502917013860113521269173611715 142
UVM_INFO @ 10006237601 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 6046833035830961831028149435992756967354860343186014049716810072188587059439 154
UVM_INFO @ 10011502380 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 32993799851661910214507647074243544415777437131040117497085023363802747426554 147
UVM_INFO @ 10004597835 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 17333851779049183618216529891856275224781714684534821472437512771984837325138 143
UVM_INFO @ 10053319647 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 44674452101129006887173083665269279641452165609559318076616306543500926267463 142
UVM_INFO @ 10030130461 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred! 22 test runs
aes_control_fi 60079980497642957752194718536783108498401061841292716308156603581541317652513 149
UVM_INFO @ 10011372506 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 59118840379600399992255394089293004776759478172403705894598057422015963548761 148
UVM_INFO @ 10004808246 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 75567663922238855014778616604119390338682076838193835173098932816217706449510 141
UVM_INFO @ 10006912957 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 43114448931176703712073317071811576188836338550195412582206259296370984087995 157
UVM_INFO @ 10003650459 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 12797808215350873833133459184826278408830306920664235648469757750498577453033 148
UVM_INFO @ 10004720063 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 9072226382594514952691278144558341527839192664102182491373716692048141762512 159
UVM_INFO @ 10013404615 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 24096837421329851703259610027823138669188498652244496848997048179433499171556 142
UVM_INFO @ 10003110720 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 82226199644307590687456124245175565500089911212869694932613350772585095318648 148
UVM_INFO @ 10009085858 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 23004815871091075646023326818750037281946148015121802895235592888763797053735 150
UVM_INFO @ 10007778322 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 90809612958849156212788713693595824696491866114920061758751187525852463747734 151
UVM_INFO @ 10031272252 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 51260068405652834791982123437697947631595347092942430512162266076962650048367 144
UVM_INFO @ 10011473940 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 31350472307408044104872122392852925328944242882592372152158587963920520708334 145
UVM_INFO @ 10005833329 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 89202710570988040313987311504364047417846218398453530667865989343574900799920 148
UVM_INFO @ 10008205052 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 5689991797374829509532235898587536736267963222856188787972003948142004722250 146
UVM_INFO @ 10011518459 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 72062395105614895328464619600018566209788197020932614601032843233759232504897 151
UVM_INFO @ 10034155608 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 87078038143204350504563068159508366172617754561987556011661345130297593499422 149
UVM_INFO @ 10004583986 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 22811196088927644009552333138580992014390717629913813289456467764109641537464 149
UVM_INFO @ 10026090855 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 41376315761952618849371484597545934106550737932264025497904561907215735072594 144
UVM_INFO @ 10021297664 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 25361010107950649685689302142367510421890561570469266340109040514791064469725 152
UVM_INFO @ 10008997882 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 50539335127286899580142062819239680158595025353117013774247931505418934338022 147
UVM_INFO @ 10008563299 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 10027990932811920640192659011395447734495721668300934706333223386305344037182 148
UVM_INFO @ 10025207028 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 74421121320658464738021142989907588408145585004975791387185916525110985755668 145
UVM_INFO @ 10002527459 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Job timed out after * minutes 22 test runs
aes_cipher_fi 95908582865415347126281023422655847175682244954161552186820518456066152714092 None
aes_cipher_fi 112427535559967355806588905673272105344405696459881339424761906805445978225154 None
aes_cipher_fi 97450742695322750444663009468860333367135851679119911726280929697696278033341 None
aes_control_fi 107146786280882625866433749975163706182126898271656343263667743377980971835058 None
aes_cipher_fi 10024954113604574766927401697752572485766675897528249298847064101758334940752 None
aes_cipher_fi 21711719353477798699351643386608365872665110865176814877342344010206972718210 None
aes_control_fi 22884115144758245204780934647949099266660170245107456392437227893897092663162 None
aes_control_fi 85453455082136941686573099301208301981317526502377930270772311899197693836820 None
aes_cipher_fi 102484562305679594840025919248726916153311059621222283767782066749339831131172 None
aes_control_fi 81890862062387351732476229256733267448499574743480039857458520239181473685021 None
aes_control_fi 73606770317968413122894326949025462008356807032228904290469030841492213891579 None
aes_cipher_fi 49444619500776974223783612131161500195250687704433281948688999222414961622724 None
aes_control_fi 7015822408454291869702255757402315114297505183596567130406037212693864111485 None
aes_cipher_fi 58453777092030332668904662681257435635037172190845488917617499210139734952573 None
aes_cipher_fi 19343021215550054388928072748134495204123133334889316083926179882648555042624 None
aes_control_fi 17878259793057000105043265677628939020587240913699064721734380629243642151962 None
aes_cipher_fi 106887783993881151946251935555410153942434166787933330071746247461865314792878 None
aes_cipher_fi 8074785890125345765284729223127472066940457013938077264999422599981284927343 None
aes_cipher_fi 81523523843423180159725167679609172796650848652751795429864332939352268899710 None
aes_control_fi 71432361090012819844773463337867106480817068899351257478073617227352233334724 None
aes_cipher_fi 46887841225780580368351501589443728372734355940617692944696979001577718718266 None
aes_control_fi 105491081082106186239383800300471526271766971121369059389285233645166026322898 None
UVM_FATAL (cip_base_vseq.sv:1220) [aes_common_vseq] Check failed (vseq_done) 8 test runs
aes_stress_all_with_rand_reset 1019503845059536406888184219697373696517930588899155331727604926497681494594 155
UVM_INFO @ 14691685 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 39409643522299818113722170683225544107247396014710777227277880517361479073811 519
UVM_INFO @ 1971603790 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 98825126231231047671012843832925804199588831443637831041589732657508609543496 158
UVM_INFO @ 51132139 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 84630737408215705948662322768112780609582303881460676789604474362962831145013 143
UVM_INFO @ 58268562 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 83343891210729171608730150059934406776652935598668147333791483514609132150553 565
UVM_INFO @ 2339088590 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 107634152172261270277901469392696137467352060636117712941322510962952073732585 175
UVM_INFO @ 20759108 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 62455095519103634978619830221629351668544488763059395463007777383080870194350 138
UVM_INFO @ 6554885 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 41885894947633663083109050169749493536667630502177611332212494139156877052101 206
UVM_INFO @ 154638657 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_core_fi_vseq.sv:70) [aes_core_fi_vseq] wait timeout occurred! 6 test runs
aes_core_fi 4927323639070824903393408616444624556205949195866688229885819203019876877909 150
UVM_INFO @ 10009379300 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 14600033264657946897047300426523690747870307056820434930224588188252246096327 148
UVM_INFO @ 10012818801 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 65486050329943819078121209203673663209456378802924106413763949807419186058051 151
UVM_INFO @ 10056146918 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 20993511466280979511885971705132084731525845295167253131359954168712460541695 144
UVM_INFO @ 10007472249 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 25339956757600195316251463089534660957850536488235721746232478466727620494252 159
UVM_INFO @ 10018987588 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 105308499957539043698637216274043642571476166264130818547575764378114255337748 148
UVM_INFO @ 10011643445 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_gcm_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_*/rtl/aes_core.sv,1136): Assertion AesSecCmDataRegLocalEscDataOut has failed (* cycles, starting * PS) 2 test runs
aes_stress_all 21632558294324472973189389536160045952594073038103934650251226685972264140825 79954
UVM_ERROR @ 667960994 ps: (aes_core.sv:1136) [ASSERT FAILED] AesSecCmDataRegLocalEscDataOut
UVM_INFO @ 667960994 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 7523880249390857346906503858752794600279929422101887167917815034049129804144 141
($past(iv_q) != $past(state_done_transposed, 2) ^ $past(data_in_prev_q, 2)))
|
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_gcm_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_core.sv,1142): (time 9458103 PS) Assertion tb.dut.u_aes_core.AesSecCmDataRegLocalEscIv has failed (2 cycles, starting 9418103 PS)
UVM_ERROR @ 9458103 ps: (aes_core.sv:1136) [ASSERT FAILED] AesSecCmDataRegLocalEscDataOut
UVM_FATAL (aes_base_vseq.sv:76) [aes_stress_all_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) 2 test runs
aes_stress_all_with_rand_reset 96559163903721122084950709971963232700661500342186904303495243082905554278921 112
UVM_INFO @ 9992467 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 83050313025956449922427141620578605936299067539849982393139236670145633453102 112
UVM_INFO @ 4659214 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=9) 2 test runs
aes_core_fi 29357332203633555840670613872271648226827850309269495906639641179688968077699 143
UVM_INFO @ 10010319812 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 109886731021056584119507159551360466188872768941382556922362466253695043093664 144
UVM_INFO @ 10010857222 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_scoreboard.sv:785) scoreboard [scoreboard] # * 1 test run
aes_stress_all 17428563812241545362409776719986214199170657573928732284765891667049620560763 69744
TEST FAILED MESSAGES DID NOT MATCH
0 68 62 00 0
1 00 d2 00 0
UVM_ERROR (cip_base_scoreboard.sv:255) scoreboard [scoreboard] alert fatal_fault has unexpected timeout error 1 test run
aes_alert_reset 619252488437078604238458085088157869817023154420657633090381445959750411317 377
UVM_INFO @ 61051018 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_scoreboard.sv:926) scoreboard [scoreboard] 1 test run
aes_fi 50948044566512147483799035213830510372175599113429209022840376602808425525007 7321
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 2
----| Expected corrupted: 0
UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=10) 1 test run
aes_core_fi 3638739753385642462555953719986214572650419814597770882494780493994048096304 144
UVM_INFO @ 10021064819 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=4) 1 test run
aes_cipher_fi 90726857518964064063976365762969468557681434996247109246195307739679382506484 136
UVM_INFO @ 10009798300 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue 1 test run
aes_control_fi 11757882997269625015783882642963099343934142970900950728591949882049023070728 151
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_core_fi_vseq.sv:93) [aes_core_fi_vseq] wait timeout occurred! 1 test run
aes_core_fi 72550266241031654694118388032154214056859724534557415528025607243676397995064 142
UVM_INFO @ 10034649624 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3) 1 test run
aes_cipher_fi 18383041478939568169730763445029661132915328365761716817142556273468083218549 136
UVM_INFO @ 10034236561 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---