Simulation Results: gpio

 
30/05/2026 03:06:07 DVSim: v1.49.0 sha: 1bd5f9a json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 95.35 %
  • code
  • 87.62 %
  • assert
  • 98.42 %
  • func
  • 100.00 %
  • line
  • 97.84 %
  • branch
  • 95.52 %
  • cond
  • 94.32 %
  • toggle
  • 94.19 %
  • FSM
  • 56.25 %
Validation stages
V1
100.00%
V2
93.63%
V2S
100.00%
V3
35.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 40 40 100.00
gpio_smoke 1.870s 39.763us 10 10 100.00
gpio_smoke_no_pullup_pulldown 2.230s 191.509us 10 10 100.00
gpio_smoke_en_cdc_prim 2.100s 80.516us 10 10 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 2.060s 145.307us 10 10 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 1.070s 13.973us 1 1 100.00
csr_rw 5 5 100.00
gpio_csr_rw 1.160s 97.279us 5 5 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 7.330s 1375.136us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 3.050s 702.625us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
gpio_csr_mem_rw_with_rand_reset 1.590s 86.454us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
gpio_csr_rw 1.160s 97.279us 5 5 100.00
gpio_csr_aliasing 3.050s 702.625us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 20 20 100.00
gpio_random_dout_din 1.760s 99.409us 10 10 100.00
gpio_random_dout_din_no_pullup_pulldown 2.080s 61.972us 10 10 100.00
out_in_regs_read_write 10 10 100.00
gpio_dout_din_regs_random_rw 1.330s 29.360us 10 10 100.00
gpio_interrupt_programming 10 10 100.00
gpio_intr_rand_pgm 1.840s 201.566us 10 10 100.00
random_interrupt_trigger 10 10 100.00
gpio_rand_intr_trigger 4.090s 488.016us 10 10 100.00
interrupt_and_noise_filter 10 10 100.00
gpio_intr_with_filter_rand_intr_event 4.550s 168.559us 10 10 100.00
noise_filter_stress 10 10 100.00
gpio_filter_stress 22.530s 4155.068us 10 10 100.00
regs_long_reads_and_writes 10 10 100.00
gpio_random_long_reg_writes_reg_reads 8.210s 1122.732us 10 10 100.00
full_random 10 10 100.00
gpio_full_random 1.660s 294.601us 10 10 100.00
stress_all 1 10 10.00
gpio_stress_all 143.560s 17583.602us 1 10 10.00
alert_test 10 10 100.00
gpio_alert_test 0.970s 22.918us 10 10 100.00
intr_test 10 10 100.00
gpio_intr_test 0.980s 19.730us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
gpio_tl_errors 4.110s 369.229us 25 25 100.00
tl_d_illegal_access 25 25 100.00
gpio_tl_errors 4.110s 369.229us 25 25 100.00
tl_d_outstanding_access 11 12 91.67
gpio_csr_rw 1.160s 97.279us 5 5 100.00
gpio_same_csr_outstanding 1.800s 62.987us 4 5 80.00
gpio_csr_aliasing 3.050s 702.625us 1 1 100.00
gpio_csr_hw_reset 1.070s 13.973us 1 1 100.00
tl_d_partial_access 11 12 91.67
gpio_csr_rw 1.160s 97.279us 5 5 100.00
gpio_same_csr_outstanding 1.800s 62.987us 4 5 80.00
gpio_csr_aliasing 3.050s 702.625us 1 1 100.00
gpio_csr_hw_reset 1.070s 13.973us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 30 30 100.00
gpio_tl_intg_err 3.420s 212.805us 25 25 100.00
gpio_sec_cm 1.440s 161.438us 5 5 100.00
sec_cm_bus_integrity 25 25 100.00
gpio_tl_intg_err 3.420s 212.805us 25 25 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 7 10 70.00
gpio_rand_straps 0.940s 126.930us 7 10 70.00
stress_all_with_rand_reset 0 10 0.00
gpio_stress_all_with_rand_reset 7.640s 1452.183us 0 10 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 10 10 100.00
gpio_inp_prd_cnt 0.960s 44.287us 10 10 100.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:248) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 12 test runs
gpio_stress_all 42741444103584150182055926069414395332685750665614824742801824646031349109295 3091
UVM_INFO @ 17583602440 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 82985821928350198481736911836083252473043549874632081909756650534835708318479 982
UVM_INFO @ 15091750053 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 86198330714878512612478091696611859148494079407342043218739059444910765069661 911
UVM_INFO @ 11302293496 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 36867623850371327268683414732837990304367587268009101217916869340348457727152 76
UVM_INFO @ 18379191 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 38666674677057251720326767336293255990440206191514530136263499490107680926539 1263
UVM_INFO @ 4111347670 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 80200644044279426239248984073357290381123823715895295784451885175579935835571 75
UVM_INFO @ 2356505 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 88804968012752627380728173056035598050819394973935938306229313938238760530929 75
UVM_INFO @ 575018823 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 11357572630908122592231845975455505844706577011143864832558503267345204182430 311
UVM_INFO @ 1747223181 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 72271433295569059744060612655309614591129542777504278166216394965384604594965 75
UVM_INFO @ 5255248 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 36213666276595334717323550652403128724187165539445656193588445393216532276037 1411
UVM_INFO @ 5971089295 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 487710352077377693370598599307641710992008739011536061286669249356636457049 247
UVM_INFO @ 538503555 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 108787101137034504801664229402653387787545623579601650582858073049054017686509 75
UVM_INFO @ 5768692 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1220) [gpio_common_vseq] Check failed (vseq_done) 5 test runs
gpio_stress_all_with_rand_reset 58882302651304186522500471088759044487476041004447815784095228018583073980184 80
UVM_INFO @ 39367544 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 31648171096815880981436707540907358231764587876068537142745894445935154401195 80
UVM_INFO @ 1430752 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 90694976122239806369078833834535367136275286195510450138747497765971952386254 84
UVM_INFO @ 24206696 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 40415541757388932227697009288253139907776242278523744707371967558132746775628 80
UVM_INFO @ 22642666 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 35365075641467926387778500615707400686293533193967070969253278563611598204137 80
UVM_INFO @ 15032021 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -* 5 test runs
gpio_stress_all_with_rand_reset 59526910121425766942434504747287513014047940452398961615296812643823465656547 81
UVM_INFO @ 1452182700 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 39677990255754932260366834439326465638292025832945315585786152681011383864929 78
UVM_INFO @ 1139962230 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 62909840773607108409084648461379932492115294060081932965284590989981713835182 78
UVM_INFO @ 294411993 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 101446592063465572044968622591593158635272867231282247263711808275383771091177 78
UVM_INFO @ 2475336 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 19189755034973047272181417381549970519906332260965568922254701144836058518644 78
UVM_INFO @ 3884750 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:660) [gpio_common_vseq] Check failed masked_data == exp_data (* [*] vs * [*]) addr * read out mismatch 1 test run
gpio_same_csr_outstanding 24177699984443161546426214760769672309586353514308021294804033501586271603160 79
UVM_INFO @ 62987217 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---