| V1 |
|
100.00% |
| V2 |
|
98.37% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| xbar_smoke | 20 | 20 | 100.00 | |||
| xbar_smoke | 23.700s | 2343.785us | 20 | 20 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| xbar_base_random_sequence | 20 | 20 | 100.00 | |||
| xbar_random | 232.370s | 23511.654us | 20 | 20 | 100.00 | |
| xbar_random_delay | 117 | 120 | 97.50 | |||
| xbar_smoke_zero_delays | 7.030s | 171.650us | 20 | 20 | 100.00 | |
| xbar_smoke_large_delays | 377.950s | 66683.375us | 20 | 20 | 100.00 | |
| xbar_smoke_slow_rsp | 429.270s | 55127.745us | 20 | 20 | 100.00 | |
| xbar_random_zero_delays | 83.810s | 1496.075us | 20 | 20 | 100.00 | |
| xbar_random_large_delays | 1712.040s | 249790.805us | 18 | 20 | 90.00 | |
| xbar_random_slow_rsp | 2130.310s | 132916.472us | 19 | 20 | 95.00 | |
| xbar_unmapped_address | 40 | 40 | 100.00 | |||
| xbar_unmapped_addr | 112.600s | 3369.142us | 20 | 20 | 100.00 | |
| xbar_error_and_unmapped_addr | 107.930s | 2567.185us | 20 | 20 | 100.00 | |
| xbar_error_cases | 40 | 40 | 100.00 | |||
| xbar_error_random | 171.720s | 9106.857us | 20 | 20 | 100.00 | |
| xbar_error_and_unmapped_addr | 107.930s | 2567.185us | 20 | 20 | 100.00 | |
| xbar_all_access_same_device | 66 | 70 | 94.29 | |||
| xbar_access_same_device | 308.390s | 61649.124us | 20 | 20 | 100.00 | |
| xbar_access_same_device_slow_rsp | 3507.990s | 381575.952us | 46 | 50 | 92.00 | |
| xbar_all_hosts_use_same_source_id | 20 | 20 | 100.00 | |||
| xbar_same_source | 198.780s | 30096.978us | 20 | 20 | 100.00 | |
| xbar_stress_all | 70 | 70 | 100.00 | |||
| xbar_stress_all | 1636.700s | 162032.082us | 20 | 20 | 100.00 | |
| xbar_stress_all_with_error | 1264.220s | 183828.585us | 50 | 50 | 100.00 | |
| xbar_stress_with_reset | 70 | 70 | 100.00 | |||
| xbar_stress_all_with_rand_reset | 1399.740s | 19215.004us | 20 | 20 | 100.00 | |
| xbar_stress_all_with_reset_error | 1470.590s | 12134.217us | 50 | 50 | 100.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue | 7 test runs | |||
| xbar_random_large_delays | 89964207983396236098679902301761960840867020667644092754991847653031650176374 | 181 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 78609115179160429915732232030202827461206606181402990035443222850942622173014 | 150 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_random_slow_rsp | 59793132318484949668949902318080840639563665732024050366183433819060912332065 | 136 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 29215287506183994293404206031804903250591850330356483334042950983706891119380 | 167 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_random_large_delays | 38489835512904443398155101517746197473724548664925226595633793165258892174698 | 180 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 93122847150681247275352346161992975620901723918127385220738172790516804508059 | 212 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 31218031917608999125102342500725345805899078858295849958570529842874998702322 | 137 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|