| V1 |
|
100.00% |
| V2 |
|
87.18% |
| V2S |
|
97.56% |
| V3 |
|
60.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 10 | 10 | 100.00 | |||
| alert_handler_smoke | 85.890s | 9057.365us | 10 | 10 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| alert_handler_csr_hw_reset | 14.140s | 625.932us | 1 | 1 | 100.00 | |
| csr_rw | 5 | 5 | 100.00 | |||
| alert_handler_csr_rw | 15.710s | 585.838us | 5 | 5 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| alert_handler_csr_bit_bash | 668.730s | 69436.023us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| alert_handler_csr_aliasing | 280.280s | 6739.650us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 5 | 5 | 100.00 | |||
| alert_handler_csr_mem_rw_with_rand_reset | 22.360s | 775.267us | 5 | 5 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 6 | 6 | 100.00 | |||
| alert_handler_csr_rw | 15.710s | 585.838us | 5 | 5 | 100.00 | |
| alert_handler_csr_aliasing | 280.280s | 6739.650us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| esc_accum | 25 | 25 | 100.00 | |||
| alert_handler_esc_alert_accum | 387.650s | 7360.308us | 25 | 25 | 100.00 | |
| esc_timeout | 50 | 50 | 100.00 | |||
| alert_handler_esc_intr_timeout | 92.950s | 5748.735us | 50 | 50 | 100.00 | |
| entropy | 25 | 25 | 100.00 | |||
| alert_handler_entropy | 3456.540s | 63415.820us | 25 | 25 | 100.00 | |
| sig_int_fail | 50 | 50 | 100.00 | |||
| alert_handler_sig_int_fail | 93.650s | 2804.917us | 50 | 50 | 100.00 | |
| clk_skew | 10 | 10 | 100.00 | |||
| alert_handler_smoke | 85.890s | 9057.365us | 10 | 10 | 100.00 | |
| random_alerts | 10 | 10 | 100.00 | |||
| alert_handler_random_alerts | 80.620s | 1553.905us | 10 | 10 | 100.00 | |
| random_classes | 50 | 50 | 100.00 | |||
| alert_handler_random_classes | 94.280s | 1576.641us | 50 | 50 | 100.00 | |
| ping_timeout | 17 | 50 | 34.00 | |||
| alert_handler_ping_timeout | 522.670s | 54349.045us | 17 | 50 | 34.00 | |
| lpg | 89 | 100 | 89.00 | |||
| alert_handler_lpg | 3600.151s | 0.000us | 45 | 50 | 90.00 | |
| alert_handler_lpg_stub_clk | 3600.135s | 0.000us | 44 | 50 | 88.00 | |
| stress_all | 49 | 50 | 98.00 | |||
| alert_handler_stress_all | 4816.200s | 90168.784us | 49 | 50 | 98.00 | |
| alert_handler_entropy_stress_test | 0 | 20 | 0.00 | |||
| alert_handler_entropy_stress | 42.810s | 766.615us | 0 | 20 | 0.00 | |
| alert_handler_alert_accum_saturation | 20 | 20 | 100.00 | |||
| alert_handler_alert_accum_saturation | 7.330s | 658.442us | 20 | 20 | 100.00 | |
| intr_test | 10 | 10 | 100.00 | |||
| alert_handler_intr_test | 2.530s | 10.088us | 10 | 10 | 100.00 | |
| tl_d_oob_addr_access | 25 | 25 | 100.00 | |||
| alert_handler_tl_errors | 32.210s | 651.003us | 25 | 25 | 100.00 | |
| tl_d_illegal_access | 25 | 25 | 100.00 | |||
| alert_handler_tl_errors | 32.210s | 651.003us | 25 | 25 | 100.00 | |
| tl_d_outstanding_access | 12 | 12 | 100.00 | |||
| alert_handler_csr_hw_reset | 14.140s | 625.932us | 1 | 1 | 100.00 | |
| alert_handler_csr_rw | 15.710s | 585.838us | 5 | 5 | 100.00 | |
| alert_handler_csr_aliasing | 280.280s | 6739.650us | 1 | 1 | 100.00 | |
| alert_handler_same_csr_outstanding | 52.270s | 5949.806us | 5 | 5 | 100.00 | |
| tl_d_partial_access | 12 | 12 | 100.00 | |||
| alert_handler_csr_hw_reset | 14.140s | 625.932us | 1 | 1 | 100.00 | |
| alert_handler_csr_rw | 15.710s | 585.838us | 5 | 5 | 100.00 | |
| alert_handler_csr_aliasing | 280.280s | 6739.650us | 1 | 1 | 100.00 | |
| alert_handler_same_csr_outstanding | 52.270s | 5949.806us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| shadow_reg_update_error | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 392.150s | 5864.696us | 20 | 20 | 100.00 | |
| shadow_reg_read_clear_staged_value | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 392.150s | 5864.696us | 20 | 20 | 100.00 | |
| shadow_reg_storage_error | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 392.150s | 5864.696us | 20 | 20 | 100.00 | |
| shadowed_reset_glitch | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 392.150s | 5864.696us | 20 | 20 | 100.00 | |
| shadow_reg_update_error_with_csr_rw | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors_with_csr_rw | 1368.780s | 87434.030us | 20 | 20 | 100.00 | |
| tl_intg_err | 30 | 30 | 100.00 | |||
| alert_handler_sec_cm | 36.160s | 979.734us | 5 | 5 | 100.00 | |
| alert_handler_tl_intg_err | 116.470s | 9960.077us | 25 | 25 | 100.00 | |
| sec_cm_bus_integrity | 25 | 25 | 100.00 | |||
| alert_handler_tl_intg_err | 116.470s | 9960.077us | 25 | 25 | 100.00 | |
| sec_cm_config_shadow | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 392.150s | 5864.696us | 20 | 20 | 100.00 | |
| sec_cm_ping_timer_config_regwen | 10 | 10 | 100.00 | |||
| alert_handler_smoke | 85.890s | 9057.365us | 10 | 10 | 100.00 | |
| sec_cm_alert_config_regwen | 10 | 10 | 100.00 | |||
| alert_handler_smoke | 85.890s | 9057.365us | 10 | 10 | 100.00 | |
| sec_cm_alert_loc_config_regwen | 10 | 10 | 100.00 | |||
| alert_handler_smoke | 85.890s | 9057.365us | 10 | 10 | 100.00 | |
| sec_cm_class_config_regwen | 10 | 10 | 100.00 | |||
| alert_handler_smoke | 85.890s | 9057.365us | 10 | 10 | 100.00 | |
| sec_cm_alert_intersig_diff | 50 | 50 | 100.00 | |||
| alert_handler_sig_int_fail | 93.650s | 2804.917us | 50 | 50 | 100.00 | |
| sec_cm_lpg_intersig_mubi | 45 | 50 | 90.00 | |||
| alert_handler_lpg | 3600.151s | 0.000us | 45 | 50 | 90.00 | |
| sec_cm_esc_intersig_diff | 50 | 50 | 100.00 | |||
| alert_handler_sig_int_fail | 93.650s | 2804.917us | 50 | 50 | 100.00 | |
| sec_cm_alert_rx_intersig_bkgn_chk | 25 | 25 | 100.00 | |||
| alert_handler_entropy | 3456.540s | 63415.820us | 25 | 25 | 100.00 | |
| sec_cm_esc_tx_intersig_bkgn_chk | 25 | 25 | 100.00 | |||
| alert_handler_entropy | 3456.540s | 63415.820us | 25 | 25 | 100.00 | |
| sec_cm_esc_timer_fsm_sparse | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 36.160s | 979.734us | 5 | 5 | 100.00 | |
| sec_cm_ping_timer_fsm_sparse | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 36.160s | 979.734us | 5 | 5 | 100.00 | |
| sec_cm_esc_timer_fsm_local_esc | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 36.160s | 979.734us | 5 | 5 | 100.00 | |
| sec_cm_ping_timer_fsm_local_esc | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 36.160s | 979.734us | 5 | 5 | 100.00 | |
| sec_cm_esc_timer_fsm_global_esc | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 36.160s | 979.734us | 5 | 5 | 100.00 | |
| sec_cm_accu_ctr_redun | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 36.160s | 979.734us | 5 | 5 | 100.00 | |
| sec_cm_esc_timer_ctr_redun | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 36.160s | 979.734us | 5 | 5 | 100.00 | |
| sec_cm_ping_timer_ctr_redun | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 36.160s | 979.734us | 5 | 5 | 100.00 | |
| sec_cm_ping_timer_lfsr_redun | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 36.160s | 979.734us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 6 | 10 | 60.00 | |||
| alert_handler_stress_all_with_rand_reset | 581.440s | 34662.837us | 6 | 10 | 60.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_ERROR (alert_handler_scoreboard.sv:486) [scoreboard] Check failed intr_state_val == item.d_data (* [*] vs * [*]) reg name: intr_state | 25 test runs | |||
| alert_handler_ping_timeout | 86166379284227868047902123254951889421532090304334935567880500863379974910093 | 87 |
UVM_INFO @ 2527319561 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 70816406583214825698889125433514166325591815255310294675930236482346163541103 | 144 |
UVM_INFO @ 26288596654 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 106643813916295080170160448842711023570713314626419769539794893994161143333266 | 93 |
UVM_INFO @ 7230156904 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 80284148984073093791737450428987149440147469534906719824088144857865266256283 | 90 |
UVM_INFO @ 4235231283 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 75191464487401879607586719727177490956784330716516966870194703774162862172372 | 129 |
UVM_INFO @ 8284090642 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 68248327499665297133310422424514511609970304289547737089312898545950368988971 | 94 |
UVM_INFO @ 1800250945 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 66407196243160073840599811068993734403942944729930381634455561933716769683357 | 90 |
UVM_INFO @ 6047814745 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 83636037498034790942818857929423750139815991473180158051567552831166649829586 | 87 |
UVM_INFO @ 3554059820 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 51625921771846533711201808454731614674066595440102172916436088489343422866528 | 141 |
UVM_INFO @ 32695420378 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 409878455209338195294031421480850930416428194939952642731088637599743068313 | 93 |
UVM_INFO @ 9284088696 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 35848330574423373480565169804743200666568560196612757823842896840362956123206 | 90 |
UVM_INFO @ 22852459623 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 67941825432170016885006285152720644737322707516699701244542275545247653056030 | 102 |
UVM_INFO @ 3893671110 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 6797239366910479706407786915488516744821819711663731910354382156149944515456 | 102 |
UVM_INFO @ 3711854694 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 59802745997227588333815525191099395806368248773583877595773590418153935708664 | 84 |
UVM_INFO @ 4250524235 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 8628141999323856447803861971253393132025484196228502257236360623934257839267 | 93 |
UVM_INFO @ 2500726357 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 95936981803731204479863989739336323640916420833398485717680449024304115864500 | 135 |
UVM_INFO @ 8923069897 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 109673826260349284583532299001469537433965934999399294181348482679255405574287 | 105 |
UVM_INFO @ 19817205854 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 13628270059988569104208660029964010405507979490424033355027210275944641456627 | 110 |
UVM_INFO @ 7420898475 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 79856382936754180894934753431830168915226495093281995841114808930171485026533 | 108 |
UVM_INFO @ 5512237076 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 77290528985667075871150098943146705395781982317819877919072089572820475293468 | 108 |
UVM_INFO @ 30241392838 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 70375589434481942502602731805971705700420921861661077441740385326301617651986 | 129 |
UVM_INFO @ 48814379382 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 33732461492094913602802685593721183277934325549330737217898762005485384083386 | 93 |
UVM_INFO @ 5018712917 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 903148380445459090033143802850476592672648260657728208996659373311113023375 | 87 |
UVM_INFO @ 2632764237 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 4619172141335523668471823634947696251460426525534136930136686685615884830318 | 90 |
UVM_INFO @ 1162224832 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 53184855456277904297960374235024029744388287541211219616504377431016332268556 | 84 |
UVM_INFO @ 7917499319 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR sequencer [alert_sender_ping_rsp_seq] Response queue overflow, response was dropped | 20 test runs | |||
| alert_handler_entropy_stress | 45966761781658030688308222666439781377600297775514175071429547044866328642564 | 220 |
UVM_INFO @ 240561349 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 11107233242915672843804185113426265635225952097244460201898823522900072418703 | 226 |
UVM_INFO @ 1208649761 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 78669791796434073140179876759859049711770523814449740759380789225398453618444 | 218 |
UVM_INFO @ 236507070 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 66596021450177209560435966483805690674743951214728139985072130270721446322084 | 138 |
UVM_INFO @ 1599901408 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 93172228626152945203496083725274070552800722202043576970124104131917391766669 | 126 |
UVM_INFO @ 172598543 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 102742693498215715585205320502684663988398434683854538679926439484305342008724 | 162 |
UVM_INFO @ 168443172 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 38078323964578890291379569027532271025013707668170057994170437412948072365046 | 142 |
UVM_INFO @ 452166296 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 85352257348312472235900729936403057754211418552680575324568666315455889334447 | 142 |
UVM_INFO @ 448910904 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 65704952889327505473584370123625384835796988671153358446043377881040075913046 | 182 |
UVM_INFO @ 556105042 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 8840388504421060198665055090235268856494290588626774420738968466707754787166 | 226 |
UVM_INFO @ 1004498499 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 64513781905627952044935553290222347056777938703469441847044507405194287313899 | 210 |
UVM_INFO @ 119810469 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 101944014903912498437488801162418123356740562520067783004217919278979637809472 | 176 |
UVM_INFO @ 613695980 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 33703124614675981431848227841237758147952324799647470170272546502549432310265 | 162 |
UVM_INFO @ 862766147 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 63604666210578570709007810064508876445515434537276633583206691899271562764746 | 222 |
UVM_INFO @ 122723652 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 90721422983860660622615760136010070447828353348528695593850885835961829754788 | 218 |
UVM_INFO @ 282271172 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 89957531378552846263379581982459493606413956212923311558095044222170651726830 | 154 |
UVM_INFO @ 905853649 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 72330460655628672490249508924910851271356730132756824443075054861048280954143 | 200 |
UVM_INFO @ 682820823 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 17962167236515685651900021229988861561059519558181704218455370787535000125508 | 190 |
UVM_INFO @ 744887297 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 47209334797015170355337382815052154706744664857201305769930039875026728558164 | 212 |
UVM_INFO @ 3208773706 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 50615185064645706659291115372382062248134261183612200013875740877598276304117 | 220 |
UVM_INFO @ 766614927 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| Job timed out after * minutes | 10 test runs | |||
| alert_handler_lpg_stub_clk | 83821627436603344310512215461724468641881729463420187160013318984022894863948 | None | ||
| alert_handler_lpg | 4102940978068735720988737963663021188892866508332426266531362563852653893646 | None | ||
| alert_handler_lpg_stub_clk | 11984470389777832464318285533684425615106586473648388666008564994140137422200 | None | ||
| alert_handler_lpg_stub_clk | 8488085698418207825895900906796673640191708833914852292044539334395789902090 | None | ||
| alert_handler_lpg_stub_clk | 102227970205547347131911171623456180850075507821183900871446879758750941600424 | None | ||
| alert_handler_lpg_stub_clk | 91348892424783601634971772072887754388871981088063055233394134110970549296669 | None | ||
| alert_handler_lpg_stub_clk | 110999388318640689921457498512775727450476262232629368081555620958453137621844 | None | ||
| alert_handler_lpg | 79746372187799892604987035927959531433977993089056455021435842089082784271201 | None | ||
| alert_handler_lpg | 45776493499924448218668050822985323473579890862232527541046631325878394537448 | None | ||
| alert_handler_lpg | 45924392581878721055171114303441374328838436452528565016857760170268044528393 | None | ||
| UVM_ERROR (alert_handler_scoreboard.sv:608) scoreboard [scoreboard] Register/crashdump mismatch. loc_alert_cause[*] is * in the crashdump and * in the register model. | 8 test runs | |||
| alert_handler_lpg | 50220187227555662972537084704281729583769272981921274321095075819927220943905 | 80 |
UVM_INFO @ 3615581061 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 813241673322990770107951617211251648315486265468933446348295095195373914660 | 80 |
UVM_INFO @ 1569833278 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 37629446764443238091725219271501331090897256933299817956950015598061939483804 | 80 |
UVM_INFO @ 1101617790 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 23945231910919046553117738567384636762780907679192077552058751617334412040330 | 83 |
UVM_INFO @ 404725053 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 13197416029560205132087849577883762905438799831856745444400050369785841750130 | 80 |
UVM_INFO @ 444517028 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 101455168278918631184772622457662422740527798882094569731632490341442166526426 | 83 |
UVM_INFO @ 984629768 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 7709982850770119928900656549768184786185149115020053063088585585476300029177 | 80 |
UVM_INFO @ 886975417 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 53928062734771419803751105645222987432787693705395758720495903903759817072237 | 80 |
UVM_INFO @ 757876629 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (cip_base_vseq.sv:1286) [alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. | 4 test runs | |||
| alert_handler_stress_all_with_rand_reset | 32561187893105215616453816729816464452393276108022515229457224675617254933773 | 110 |
UVM_INFO @ 7802411696 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 114185113223223300491366824595585242203317759735150290535657598867422089060598 | 83 |
UVM_INFO @ 295882816 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 110591397654804599817138087428619102656179859323034084514891196394189716532991 | 121 |
UVM_INFO @ 1382905097 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 66568052256030051187169371307969910425732516348951076738366012029992857230187 | 167 |
UVM_INFO @ 10546249036 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (alert_handler_scoreboard.sv:490) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: alert_handler_reg_block.classb_esc_cnt | 1 test run | |||
| alert_handler_ping_timeout | 12510848791287509033892523486101063686703583727991595080549546680279759383766 | 125 |
UVM_INFO @ 23334609205 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (alert_handler_scoreboard.sv:258) scoreboard [scoreboard] Unexpected interrupt value in cfg.intr_vif.pins[*]: saw *, but expected *. (is_int_err = *, local_alert_type = LocalEscIntFail) | 1 test run | |||
| alert_handler_stress_all | 70362495318655646370745692511657721229878142698490321237136712745913834358799 | 132 |
UVM_INFO @ 4077917863 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|