Simulation Results

Simulation Results: otp_ctrl

12/06/2026 15:00:31 DVSim: v1.49.0 sha: e804155 json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
85.68 %

code
80.91 %

assert
94.89 %

func
81.24 %

line
88.46 %

branch
86.56 %

cond
88.46 %

toggle
88.90 %

FSM
52.19 %

Validation stages

V1		80.77%
V2		72.78%
V2S		73.03%
V3		6.93%

21/26 passed

80.77 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
wake_up				1	1	100.00
	otp_ctrl_wake_up	1.840s	153.744us	1	1	100.00
smoke				6	10	60.00
	otp_ctrl_smoke	10.420s	497.767us	6	10	60.00
csr_hw_reset				1	1	100.00
	otp_ctrl_csr_hw_reset	3.150s	127.074us	1	1	100.00
csr_rw				5	5	100.00
	otp_ctrl_csr_rw	2.460s	48.441us	5	5	100.00
csr_bit_bash				1	1	100.00
	otp_ctrl_csr_bit_bash	5.170s	528.038us	1	1	100.00
csr_aliasing				1	1	100.00
	otp_ctrl_csr_aliasing	10.320s	626.287us	1	1	100.00
csr_mem_rw_with_rand_reset				4	5	80.00
	otp_ctrl_csr_mem_rw_with_rand_reset	17.560s	10174.559us	4	5	80.00
regwen_csr_and_corresponding_lockable_csr				6	6	100.00
	otp_ctrl_csr_rw	2.460s	48.441us	5	5	100.00
	otp_ctrl_csr_aliasing	10.320s	626.287us	1	1	100.00
mem_walk				1	1	100.00
	otp_ctrl_mem_walk	1.460s	44.457us	1	1	100.00
mem_partial_access				1	1	100.00
	otp_ctrl_mem_partial_access	1.660s	59.903us	1	1	100.00

548/753 passed

72.78 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
dai_access_partition_walk				0	1	0.00
	otp_ctrl_partition_walk	119.280s	5571.851us	0	1	0.00
init_fail				227	300	75.67
	otp_ctrl_init_fail	8.150s	2651.196us	227	300	75.67
partition_check				18	60	30.00
	otp_ctrl_background_chks	49.470s	9286.782us	5	10	50.00
	otp_ctrl_check_fail	73.090s	32141.358us	13	50	26.00
regwen_during_otp_init				19	30	63.33
	otp_ctrl_regwen	11.070s	357.709us	19	30	63.33
partition_lock				12	30	40.00
	otp_ctrl_dai_lock	36.840s	3203.338us	12	30	40.00
interface_key_check				3	10	30.00
	otp_ctrl_parallel_key_req	12.170s	339.209us	3	10	30.00
lc_interactions				179	210	85.24
	otp_ctrl_parallel_lc_req	17.790s	2096.035us	6	10	60.00
	otp_ctrl_parallel_lc_esc	63.890s	31356.512us	173	200	86.50
otp_dai_errors				22	25	88.00
	otp_ctrl_dai_errs	60.530s	9261.772us	22	25	88.00
otp_macro_errors				4	10	40.00
	otp_ctrl_macro_errs	38.120s	4413.974us	4	10	40.00
test_access				5	10	50.00
	otp_ctrl_test_access	26.740s	23414.322us	5	10	50.00
stress_all				2	10	20.00
	otp_ctrl_stress_all	172.940s	68817.298us	2	10	20.00
intr_test				10	10	100.00
	otp_ctrl_intr_test	2.350s	161.832us	10	10	100.00
alert_test				10	10	100.00
	otp_ctrl_alert_test	3.470s	134.011us	10	10	100.00
tl_d_oob_addr_access				25	25	100.00
	otp_ctrl_tl_errors	7.760s	2971.577us	25	25	100.00
tl_d_illegal_access				25	25	100.00
	otp_ctrl_tl_errors	7.760s	2971.577us	25	25	100.00
tl_d_outstanding_access				12	12	100.00
	otp_ctrl_csr_hw_reset	3.150s	127.074us	1	1	100.00
	otp_ctrl_csr_rw	2.460s	48.441us	5	5	100.00
	otp_ctrl_csr_aliasing	10.320s	626.287us	1	1	100.00
	otp_ctrl_same_csr_outstanding	5.080s	1610.495us	5	5	100.00
tl_d_partial_access				12	12	100.00
	otp_ctrl_csr_hw_reset	3.150s	127.074us	1	1	100.00
	otp_ctrl_csr_rw	2.460s	48.441us	5	5	100.00
	otp_ctrl_csr_aliasing	10.320s	626.287us	1	1	100.00
	otp_ctrl_same_csr_outstanding	5.080s	1610.495us	5	5	100.00

V2S

482/660 passed

73.03 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
sec_cm_additional_check				3	5	60.00
	otp_ctrl_sec_cm	436.700s	200000.000us	3	5	60.00
tl_intg_err				28	30	93.33
	otp_ctrl_sec_cm	436.700s	200000.000us	3	5	60.00
	otp_ctrl_tl_intg_err	49.160s	23745.691us	25	25	100.00
prim_count_check				3	5	60.00
	otp_ctrl_sec_cm	436.700s	200000.000us	3	5	60.00
prim_fsm_check				3	5	60.00
	otp_ctrl_sec_cm	436.700s	200000.000us	3	5	60.00
sec_cm_bus_integrity				25	25	100.00
	otp_ctrl_tl_intg_err	49.160s	23745.691us	25	25	100.00
sec_cm_secret_mem_scramble				6	10	60.00
	otp_ctrl_smoke	10.420s	497.767us	6	10	60.00
sec_cm_part_mem_digest				6	10	60.00
	otp_ctrl_smoke	10.420s	497.767us	6	10	60.00
sec_cm_dai_fsm_sparse				3	5	60.00
	otp_ctrl_sec_cm	436.700s	200000.000us	3	5	60.00
sec_cm_kdi_fsm_sparse				3	5	60.00
	otp_ctrl_sec_cm	436.700s	200000.000us	3	5	60.00
sec_cm_lci_fsm_sparse				3	5	60.00
	otp_ctrl_sec_cm	436.700s	200000.000us	3	5	60.00
sec_cm_part_fsm_sparse				3	5	60.00
	otp_ctrl_sec_cm	436.700s	200000.000us	3	5	60.00
sec_cm_scrmbl_fsm_sparse				3	5	60.00
	otp_ctrl_sec_cm	436.700s	200000.000us	3	5	60.00
sec_cm_timer_fsm_sparse				3	5	60.00
	otp_ctrl_sec_cm	436.700s	200000.000us	3	5	60.00
sec_cm_dai_ctr_redun				3	5	60.00
	otp_ctrl_sec_cm	436.700s	200000.000us	3	5	60.00
sec_cm_kdi_seed_ctr_redun				3	5	60.00
	otp_ctrl_sec_cm	436.700s	200000.000us	3	5	60.00
sec_cm_kdi_entropy_ctr_redun				3	5	60.00
	otp_ctrl_sec_cm	436.700s	200000.000us	3	5	60.00
sec_cm_lci_ctr_redun				3	5	60.00
	otp_ctrl_sec_cm	436.700s	200000.000us	3	5	60.00
sec_cm_part_ctr_redun				3	5	60.00
	otp_ctrl_sec_cm	436.700s	200000.000us	3	5	60.00
sec_cm_scrmbl_ctr_redun				3	5	60.00
	otp_ctrl_sec_cm	436.700s	200000.000us	3	5	60.00
sec_cm_timer_integ_ctr_redun				3	5	60.00
	otp_ctrl_sec_cm	436.700s	200000.000us	3	5	60.00
sec_cm_timer_cnsty_ctr_redun				3	5	60.00
	otp_ctrl_sec_cm	436.700s	200000.000us	3	5	60.00
sec_cm_timer_lfsr_redun				3	5	60.00
	otp_ctrl_sec_cm	436.700s	200000.000us	3	5	60.00
sec_cm_dai_fsm_local_esc				176	205	85.85
	otp_ctrl_parallel_lc_esc	63.890s	31356.512us	173	200	86.50
	otp_ctrl_sec_cm	436.700s	200000.000us	3	5	60.00
sec_cm_lci_fsm_local_esc				173	200	86.50
	otp_ctrl_parallel_lc_esc	63.890s	31356.512us	173	200	86.50
sec_cm_kdi_fsm_local_esc				173	200	86.50
	otp_ctrl_parallel_lc_esc	63.890s	31356.512us	173	200	86.50
sec_cm_part_fsm_local_esc				177	210	84.29
	otp_ctrl_parallel_lc_esc	63.890s	31356.512us	173	200	86.50
	otp_ctrl_macro_errs	38.120s	4413.974us	4	10	40.00
sec_cm_scrmbl_fsm_local_esc				173	200	86.50
	otp_ctrl_parallel_lc_esc	63.890s	31356.512us	173	200	86.50
sec_cm_timer_fsm_local_esc				176	205	85.85
	otp_ctrl_parallel_lc_esc	63.890s	31356.512us	173	200	86.50
	otp_ctrl_sec_cm	436.700s	200000.000us	3	5	60.00
sec_cm_dai_fsm_global_esc				176	205	85.85
	otp_ctrl_parallel_lc_esc	63.890s	31356.512us	173	200	86.50
	otp_ctrl_sec_cm	436.700s	200000.000us	3	5	60.00
sec_cm_lci_fsm_global_esc				173	200	86.50
	otp_ctrl_parallel_lc_esc	63.890s	31356.512us	173	200	86.50
sec_cm_kdi_fsm_global_esc				173	200	86.50
	otp_ctrl_parallel_lc_esc	63.890s	31356.512us	173	200	86.50
sec_cm_part_fsm_global_esc				177	210	84.29
	otp_ctrl_parallel_lc_esc	63.890s	31356.512us	173	200	86.50
	otp_ctrl_macro_errs	38.120s	4413.974us	4	10	40.00
sec_cm_scrmbl_fsm_global_esc				173	200	86.50
	otp_ctrl_parallel_lc_esc	63.890s	31356.512us	173	200	86.50
sec_cm_timer_fsm_global_esc				176	205	85.85
	otp_ctrl_parallel_lc_esc	63.890s	31356.512us	173	200	86.50
	otp_ctrl_sec_cm	436.700s	200000.000us	3	5	60.00
sec_cm_part_data_reg_integrity				227	300	75.67
	otp_ctrl_init_fail	8.150s	2651.196us	227	300	75.67
sec_cm_part_data_reg_bkgn_chk				13	50	26.00
	otp_ctrl_check_fail	73.090s	32141.358us	13	50	26.00
sec_cm_part_mem_regren				12	30	40.00
	otp_ctrl_dai_lock	36.840s	3203.338us	12	30	40.00
sec_cm_part_mem_sw_unreadable				12	30	40.00
	otp_ctrl_dai_lock	36.840s	3203.338us	12	30	40.00
sec_cm_part_mem_sw_unwritable				12	30	40.00
	otp_ctrl_dai_lock	36.840s	3203.338us	12	30	40.00
sec_cm_lc_part_mem_sw_noaccess				12	30	40.00
	otp_ctrl_dai_lock	36.840s	3203.338us	12	30	40.00
sec_cm_access_ctrl_mubi				12	30	40.00
	otp_ctrl_dai_lock	36.840s	3203.338us	12	30	40.00
sec_cm_token_valid_ctrl_mubi				6	10	60.00
	otp_ctrl_smoke	10.420s	497.767us	6	10	60.00
sec_cm_lc_ctrl_intersig_mubi				12	30	40.00
	otp_ctrl_dai_lock	36.840s	3203.338us	12	30	40.00
sec_cm_test_bus_lc_gated				6	10	60.00
	otp_ctrl_smoke	10.420s	497.767us	6	10	60.00
sec_cm_test_tl_lc_gate_fsm_sparse				3	5	60.00
	otp_ctrl_sec_cm	436.700s	200000.000us	3	5	60.00
sec_cm_direct_access_config_regwen				19	30	63.33
	otp_ctrl_regwen	11.070s	357.709us	19	30	63.33
sec_cm_check_trigger_config_regwen				6	10	60.00
	otp_ctrl_smoke	10.420s	497.767us	6	10	60.00
sec_cm_check_config_regwen				6	10	60.00
	otp_ctrl_smoke	10.420s	497.767us	6	10	60.00
sec_cm_macro_mem_integrity				4	10	40.00
	otp_ctrl_macro_errs	38.120s	4413.974us	4	10	40.00

7/101 passed

6.93 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
otp_ctrl_low_freq_read				0	1	0.00
	otp_ctrl_low_freq_read	101.970s	62666.372us	0	1	0.00
stress_all_with_rand_reset				7	100	7.00
	otp_ctrl_stress_all_with_rand_reset	187.820s	27588.714us	7	100	7.00

Error Messages

	Test	seed	line	log context
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_] Check failed obs == exp ( [] vs []) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value:				88 test runs
	otp_ctrl_partition_walk	113540135669870657122981898179496256949756425532522918940582070273909736132667	160055	UVM_INFO @ 5571851483 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_smoke	59976302190311202760218681939234840983917068785342670934163158917942065214393	460	UVM_INFO @ 92733017 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	46623614751805507328467278546062808682524069778316699299701436683624548841450	6364	UVM_INFO @ 3624651050 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_smoke	71787046602092998514946755820769857162430351702941499755621343487158206177279	2892	UVM_INFO @ 135657072 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	62007398114387426071745474574039310138833023686163789755872069913102662318794	1760	UVM_INFO @ 299851705 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	44269421194126898666532194298201751409974972597899222776358114502875733990696	325	UVM_INFO @ 104723848 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_smoke	88986249969206104773400460117396403804425008054406338693993349061497706731410	1780	UVM_INFO @ 112874403 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	16721997354906309777311004074929031628686109328911755717043037561522850104421	3108	UVM_INFO @ 113105125 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_smoke	26872013799296006959636706912075513250959948328473729838410332661410910414637	6598	UVM_INFO @ 548328202 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	47639746501933336762146729828702041281399451553467779687800651682283651513841	239	UVM_INFO @ 100584712 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	29376516860696169221109797473137715940608188260679741606214592903185927594247	551	UVM_INFO @ 639850337 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	76253227713203045591718885829138419629904100932547792708855522161344380314385	477	UVM_INFO @ 93707877 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	802377755078332502764531414027700564570573764480218314692943063628660446552	3598	UVM_INFO @ 204691853 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	38764379592301089273809440703731495385338963289791509173121821399692470185579	986	UVM_INFO @ 165030230 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	113469293695121214000136118199703730568179639375298340656189307372906984909837	3312	UVM_INFO @ 2067971379 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	6622713468745377309432953569526054873450175389454198628303995278775706523695	1426	UVM_INFO @ 68511718 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	94449442254227983318285514926473762023057578933958713059609142807278560459923	3656	UVM_INFO @ 170295795 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	49155221236652783882870803312445116456477068915632676875908778250924546455528	1319	UVM_INFO @ 121761655 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	39446367643464360661954259844957686633700063524769826211614162545849136001068	4856	UVM_INFO @ 107584473 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	41360203780058427021295108907199919550505632142964375829184137625239493285982	1753	UVM_INFO @ 105539885 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	12372612843698383670593964147976067924033020759665754490971207944931973359017	3298	UVM_INFO @ 1329129562 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	100217330674399676991644164803151771603909084369901820125455641647382624165753	1898	UVM_INFO @ 145823474 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	105120933243576327477948003190566871820384145246258365640086136945387768590342	525	UVM_INFO @ 80908323 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	43248129530532032494678840449843091188767372249778271958430890706126806227568	491	UVM_INFO @ 47932067 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	93528672369625470631013251077373570931555270005620695852691088543322804460041	739	UVM_INFO @ 45452322 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	74549470882115405455059533767346161801783884883583337080766550276350955946490	1167	UVM_INFO @ 48691404 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	14435947697061437446491511598561152729994329938161094784704425682488671194426	365	UVM_INFO @ 71105553 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	64332117105098058711144240932578301120639051205153231797014676237430140633417	523	UVM_INFO @ 37873864 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	67101288740593473846139295825780152324332662744233039145029368315161164521114	2237	UVM_INFO @ 244285391 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	82315768258961623972577654381045748808988650154624348557524725467906772955742	2251	UVM_INFO @ 66894670 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	112666171572243015717890607371408092432728487073046548738873064027179541927346	1771	UVM_INFO @ 138809135 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	80517194930162972747378127365643170173455299615317879020702320858943848876443	1791	UVM_INFO @ 82193419 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	40085733278791138721842833733592634905745779684378231183051462075225152954627	305	UVM_INFO @ 44039149 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	73420927238381775907129580716778359638732023310946636747223818718944543916142	349	UVM_INFO @ 45825194 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	40612412714499395262879524778834345255180885929520661472407539942174592711019	451	UVM_INFO @ 48767518 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	90520217089480589152424959209111597028254005256232295560143269234276802265873	367	UVM_INFO @ 877165456 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	88762516665033596757894733797931247640846242791711395876265012332977230930923	181	UVM_INFO @ 68418545 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	80859972260526787177710162234785928069981650600344429261198999828766826984672	1967	UVM_INFO @ 169815762 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	31679446847614773286185950036769264539189484517149156674692477010506417847000	1463	UVM_INFO @ 53832034 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	31096971852714685831168212685609965754516334293969181912080446926907386911987	309	UVM_INFO @ 63081229 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	23661931640947925750659014278150021313498752126784847392325365819502274579026	431	UVM_INFO @ 591847961 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	78394632818600485753055601968330542004059583249101360907855023053139786808019	283	UVM_INFO @ 70775024 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	77071353559560445037435772495721008706342972687864130240649045576045353582414	1259	UVM_INFO @ 163426812 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	112448732968214349277257327506058976488431000012737270869294539418691074721354	141	UVM_INFO @ 33600211 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	112018075601329074860131137442013780627637351608974079423701378777421022909194	391	UVM_INFO @ 591882722 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	79177897178914334930743405315217610676320561862470331504266711906733957512134	521	UVM_INFO @ 137889430 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	79237391389825800617961679362520805208316842157978337948327992985431879507690	1441	UVM_INFO @ 146232084 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	55843657938671079093201069354688880448063984727026697015421555136795614014154	717	UVM_INFO @ 683380532 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	36237837936013522855531410441998597195965837977947610097051554181186082104979	1679	UVM_INFO @ 249646536 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	94429363564760620914304169498999427742028163023897640317221447524134629568556	141	UVM_INFO @ 63592079 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	23083793148370043776719905929900824298817650060620498962308594637284797143795	199	UVM_INFO @ 66360378 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	43569854757535632922090743823434592521473573331614947244627042896840651179581	141	UVM_INFO @ 68734135 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	45036623862086137348535050563375071121874918234087754672958173273746095075226	1103	UVM_INFO @ 784509673 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	106079794394152083155379197543383599533727928158684841904968279213144022569890	139	UVM_INFO @ 49816340 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	43694521568921970789177475144381005385054755130927299758485440172284604541018	645	UVM_INFO @ 78810415 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	76876958376234672542090165774538387114559648332255852588007271725018754958708	241	UVM_INFO @ 132197903 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	70025184484000038897942631400333289062869231404553352395549282245168654692568	491	UVM_INFO @ 625833340 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	69852142015567806304701834854833714782516593786871768756646724579669049031496	99	UVM_INFO @ 512532621 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	9713869797646765583179874803022044125275186839728790232227265723499376144617	885	UVM_INFO @ 128637844 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	19548568828975570273812196280848451337757005965464721521509497288114304248014	99	UVM_INFO @ 33034393 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	68108193373650732571063577129018567428681655075331455714486387880897161803130	183	UVM_INFO @ 77940924 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	7409027436560612479215564297580520242309226862572769660427905075486475925607	593	UVM_INFO @ 124178739 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	53851900964966943197218889887337941426486732914339765086582859761354406074262	365	UVM_INFO @ 147028169 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	40392533527970956082777820431199798145290555845746908437974360997983371544510	905	UVM_INFO @ 741361345 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	25461980379262652902324737215188040183705640946858359426347418511180209946947	367	UVM_INFO @ 43331757 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	74882547376467394826155426176135208462955779080117389076279235063588366394949	887	UVM_INFO @ 716485053 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	42665274745417397831623515198044824095793611704979105200247096743904342617933	1759	UVM_INFO @ 326819341 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	109201973502516500912521627269093730303558551912996888863561156028632883190202	99	UVM_INFO @ 31284949 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	100046993330977266888030794263734385921964808866997999309833456361815095503503	265	UVM_INFO @ 134632840 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	43939557980575153017588251373108641624656074618146599622739968031792923657944	225	UVM_INFO @ 97348089 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	33617312221940831148499470359458297708818751323962542618813950520204739059902	1443	UVM_INFO @ 1240351092 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	12172982361250111507505176052824367608508382230408362575867564868796727793945	2339	UVM_INFO @ 263316053 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	68801536545904109643939432000465150368786816205275676360672644682162794234741	1617	UVM_INFO @ 161258684 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	72668076872815775794802238671086182046097123413766939449973538761469488513552	1729	UVM_INFO @ 240458910 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	83528994105219120007210873756590966142513956506202613308094616645708701822151	841	UVM_INFO @ 177594799 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	104184201470382188455286269935115321710631276125261657022527414771333604512466	741	UVM_INFO @ 85290689 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	103243021244097400250459117349339277975965092382997812755610804394150638160290	1755	UVM_INFO @ 63242753 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	31684972017700024428185702858087250507846489227077597969186789087043775042414	817	UVM_INFO @ 68932575 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	57768924999771513519673003939963051031313279907785239554489466613886371529809	641	UVM_INFO @ 41933113 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	72987298387140388729604032875410148801285926638193955038797643265999238205344	307	UVM_INFO @ 73715609 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	4419342739707981810600074336598045844417849101964593845322919190124572631067	1677	UVM_INFO @ 1154486485 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	21002124361829804742435433744399850696640419449892587223884149422220967975287	1983	UVM_INFO @ 153286023 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	27700840919418577432892428700280338093066991087380689815961691103762843615051	1317	UVM_INFO @ 54957162 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	28294957465889070333157615606700476454451269672922896162671068697875483016078	409	UVM_INFO @ 46188357 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	3051270219146307113621496761730104505130614477394300287315621430906025009312	2695	UVM_INFO @ 99929146 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	34247157200481062038093520050666105694424614396740679919119574202120068093847	413	UVM_INFO @ 56531459 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	492455599723246978352238451222059231757493544095702290429476550274272091768	2309	UVM_INFO @ 1164731988 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	62056094763829395078260744204196193987289968689820789568919096570944172828623	1317	UVM_INFO @ 68032772 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs []) reg name: otp_ctrl_core_reg_block.err_code_				88 test runs
	otp_ctrl_parallel_lc_esc	76408876619480721541214794277857256088704176621625423488410140379220017957139	1594	UVM_INFO @ 126935469 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_errs	74928599360704939190372494496187494816585724263661314746844600203645588590270	5444	UVM_INFO @ 370579276 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	86707727797918088342788524393010209545373991140735763025451266563561394981435	3786	UVM_INFO @ 752230430 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	27640095747979782438904477998584363948290212099157762659028937649333643240816	2463	UVM_INFO @ 825787400 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_background_chks	62527751658168514341047284068402633454187997127786678841954838382003609331125	716	UVM_INFO @ 152014806 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_req	2466647260516777661450733407325296320952953285178629415385356479139351591719	4347	UVM_INFO @ 2352880817 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	103465269423314049387710356538170650005799234540395066085630658703209420743913	4337	UVM_INFO @ 151124671 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	45793752557214016476080369978970578732863691837192736085317651986428432488301	1996	UVM_INFO @ 1171716132 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	33981203516875328843929486659606443141317584680264671734583276990444125662595	1796	UVM_INFO @ 77585806 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	15322774449145277542910281609059150422584585159726428579992219543827263269472	2616	UVM_INFO @ 3858985352 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_key_req	21671211115142143886988622850043991819906375639424168917088974033500559449507	6815	UVM_INFO @ 515367185 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	59162641908354057274408484413927322904859162043445446234330959897908960775761	1681	UVM_INFO @ 159701136 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	39665190177162710635400032559742717697820587333194721028471691984059790967974	398	UVM_INFO @ 256152564 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_key_req	88577733543236000889197384167344116137032744484428629114220052672732659074129	6469	UVM_INFO @ 431164086 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	26558946939784701729220582738972505233558563910960222045731108267329024988851	6427	UVM_INFO @ 1033210962 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_background_chks	28986649897716053913564631485192868145436608200854847293661918827295729593825	5135	UVM_INFO @ 895797178 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_errs	73224979808153595388671965322542290999922570822669249187067738191567014338593	1246	UVM_INFO @ 217758449 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	94045191258389199788875063015542728115617151909945415816000817688377925331241	1248	UVM_INFO @ 1043429896 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	77369360852493172255710159341475532291910515810689985582623826880647568319631	3990	UVM_INFO @ 3297064585 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_key_req	66784799672482086776730624519394924397667334660913519728841591446093730124544	1592	UVM_INFO @ 2038812479 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	43804136113573123930828003778025853287732165320954014525633933262434115342900	15924	UVM_INFO @ 1376675299 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	42076584648898404110083201965253243567246027963508895703880461488549001783986	1901	UVM_INFO @ 883126793 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	46793085859017570553975920995958875223941934236490750932710243854529398903323	4271	UVM_INFO @ 214979200 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	40000951249501929008201085593084861366304927767680983520877054433873986466203	4371	UVM_INFO @ 782834463 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	55389769705244296697624027071635709293701894281655023904157585672530667157582	12767	UVM_INFO @ 1548331564 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	59548543302740101304985987952287567174741092286074879020947101812935696299784	3911	UVM_INFO @ 5849737031 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_key_req	15665194568761636722323666547029554360528673609439541788163924551237206367887	2290	UVM_INFO @ 2949706379 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	5684118570514224860155240940766521319851461123288142466211103383333629036891	9671	UVM_INFO @ 16242389466 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	33504011727305853481383321349399539712640733296543454560287407316694408180423	1624	UVM_INFO @ 401396348 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	69686304225699327124610177428117019681913298604829305794462462174241797070502	5909	UVM_INFO @ 404626267 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	25558552838576267757795932592720767277004544572352040149399659469802513011362	1754	UVM_INFO @ 117854169 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	103703722684232150965986292735694602522023636616578487595812487125113530255418	698	UVM_INFO @ 76460411 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	103124140999231997338949632033404670618513922978238732977445252059743790778009	6423	UVM_INFO @ 3086800420 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	95610170083887426823119839332770797529636652403313998467509887030162157013596	1738	UVM_INFO @ 71100939 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	40921316560380775360051063892433288360221052725918502635236315662568562591669	3226	UVM_INFO @ 147051950 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	70435273791390675312719632589192623592846019010548370661292638647091892571619	671	UVM_INFO @ 2226031344 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	39274082792759082663273290589520843387333498007876954897055768722700876605112	1927	UVM_INFO @ 439210536 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	67142847159497853109309512038708546885186761283327774238315588362149504387683	4311	UVM_INFO @ 405754159 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	35814802386616272190242910325560605982757654442073362722792670213307770499006	3256	UVM_INFO @ 1516581913 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	10104210546953491760021890988455265550221449806807750393385093011302371689541	982	UVM_INFO @ 151378776 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	58262727049805761430459862698482339834175252335537762894792342254025654371325	10592	UVM_INFO @ 5475972964 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	24732330052342993607680565345259809702634636803523235119337706460228231636447	172	UVM_INFO @ 67299442 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	82406391308361819501492622036070645212647688394921485753553481789647535112977	1202	UVM_INFO @ 65725785 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	54335302735920052650701563487733173790685294116899560256829316547460239256864	9833	UVM_INFO @ 282534884 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	92831420103718699440181759886605506757932777708696902496820755368504849713133	1152	UVM_INFO @ 136107941 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	87624097965399909917094647617546612936017166823652151062520371194183285547138	1812	UVM_INFO @ 61056669 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	64814246862661460539298523488961181249214984166862126581730132318141712613724	14566	UVM_INFO @ 22010091506 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	15418549244934381005077725307975995414090323070171072560494367600223291214117	648	UVM_INFO @ 486988935 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	19853925153112892097654210991816910379170199181905763163463902679591519643506	3062	UVM_INFO @ 1917037966 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	114930435751906844487874307452905572686802853301005455802887257019534122924509	1371	UVM_INFO @ 1644534241 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	25974490460508690805645532897838339335709770647245365937228347571780412328343	5166	UVM_INFO @ 449769756 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	47964859656390007915008142317022378843686175153400039553925363671073604021053	2136	UVM_INFO @ 713766678 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	35475159694510528263439800110126419562898355064432056789778016942409032314510	7409	UVM_INFO @ 205363090 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	48198684807651535259529981736100376745053113191554922969090440352874636311160	4220	UVM_INFO @ 1605298022 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	17825356307257255594582660153713395338817978568934794617847991559493889721162	1324	UVM_INFO @ 84387701 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	39564850758360856082174740059987263177796019868127662552054176632578979276071	45501	UVM_INFO @ 6449638143 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	24445051300504417347005180162848927766666069910378231307097109880580881164338	222	UVM_INFO @ 222358423 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	66469287672104682153688887000798147386361914436436331254484458480166981728765	3322	UVM_INFO @ 10016580729 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	107461699356984908456242168056668040729702589880086629507323284955334546192992	767	UVM_INFO @ 234099730 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	87110427390283113269171668328046364991878964609721520732984380016577599265657	362	UVM_INFO @ 111799361 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	21948889618742904119002324989726470781493379465008017278886507342091990145623	6216	UVM_INFO @ 3040325910 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	48903469103403595763420661138591652796639078000390703427563207666768526921055	3544	UVM_INFO @ 107787430 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	80581580748841646560801506962500855974836548438159430421925573907957689061898	2918	UVM_INFO @ 188721022 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	97209865583375370880574062533741268741812576388637382760536380203319676572587	5486	UVM_INFO @ 3393974452 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	67726822719720143226937366008393138903913506766833895588813681219536422328283	3721	UVM_INFO @ 519567351 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	22856244921861611272123700024917965681308815472503469381354014820512274257895	658	UVM_INFO @ 1348998039 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	100832947312371076139005091632821315323825495464634943018839406325726670053693	11503	UVM_INFO @ 1817948117 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	83843247563492820507407430313299410073753563728605682344750703018289733458459	4797	UVM_INFO @ 2617404131 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	94625203624885591177904691165777057212417979896493328523739689590719103428890	4771	UVM_INFO @ 739508454 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	26263475721606758505711935316224447568563105505892642441099273800042212082778	914	UVM_INFO @ 706943230 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	37796433605190191596513453208633046731916227826544279511841912786809107419945	1894	UVM_INFO @ 76178155 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	3134486994757247103117482383637565353883970347252923932553968434265122724013	5811	UVM_INFO @ 2428568737 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	19409885667754511267800750113602934673110198222676526142820381234440313993753	17104	UVM_INFO @ 1123036538 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	36432813735797436439425517417839115826966691863322217402855775769421381801569	1320	UVM_INFO @ 201989826 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	88364170662595934341674820687583329155896859117778867004585372124031749425861	2810	UVM_INFO @ 299444960 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	91468432723764240686705948196362058675921809647225951137122241121572777064805	1478	UVM_INFO @ 277939190 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	21419777905729319135480918137167228647740003180136405188890917860303558831096	710	UVM_INFO @ 322333226 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	70925624320045599703410506865690731825258814206084601448780201434266175279144	692	UVM_INFO @ 47649531 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	93444121180147472753283500913230752507710449199296823136504705599837465859777	1716	UVM_INFO @ 146150357 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	21067730880694936374735993083768937841497168459972839594594583612387183452045	570	UVM_INFO @ 66156099 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	18723666900794454994902590175085704471694086219491005564523893039726071595798	746	UVM_INFO @ 347946396 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	94386175227895180672724448707958035871656449640996053761705234341757503628166	1184	UVM_INFO @ 232085078 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	25759363233439802277159169002473252666409554257725864712920142150909131802133	868	UVM_INFO @ 49323768 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	31682612333352026510343393126207924549649575027385311615191929508221217584877	1268	UVM_INFO @ 809774254 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	10706184201060172660000552857145693196888978666707440412697840035138659873549	1524	UVM_INFO @ 150673259 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	104318899715049750860675455362284667537265433161618971030457164664416647846376	1674	UVM_INFO @ 278836538 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	90945446153901204745505565908682662883286635323453520304473995278853696594435	436	UVM_INFO @ 104650939 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	86394058040047859869951306036444603885261903015731560098156152939311559671955	3234	UVM_INFO @ 78180592 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs [*]) reg name: otp_ctrl_core_reg_block.intr_state				44 test runs
	otp_ctrl_dai_lock	73737670091671161640262042661023387557257307882804148715976020263113896753102	1901	UVM_INFO @ 479065661 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_key_req	26949470956043754196896344890072245197065512275474101501272041230995270961457	5473	UVM_INFO @ 163429954 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_background_chks	32733044081696958791310160841602688677182977080909053007585242263206381491683	18125	UVM_INFO @ 23523765142 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	29143931174186212289923129961219849358088489617952097642835017572070107672184	12779	UVM_INFO @ 42329069453 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	62121946329380802781510588135651249449672039290601986716357478226947192141670	18112	UVM_INFO @ 855557457 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_background_chks	6577523696389139326030669149590144312513031329426269547530911898394169882754	4777	UVM_INFO @ 1181599641 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	21994163364280784691065003520732329895627018415529021485832254084939031016645	6161	UVM_INFO @ 441059385 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	74949771269837249213396910810206376282702644301462759834584888989610250592289	3948	UVM_INFO @ 594398968 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	77226435802422199891917349641946180863824098477977485891391433672397338534157	15768	UVM_INFO @ 1307277619 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	51249657533721105586983924675825106629298647762114331817370335390762479137008	1656	UVM_INFO @ 15666337403 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	45134423719968654291075960486634728257344015929786925743223057262798431022210	5067	UVM_INFO @ 1455103653 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	113830240113164715671893493178471249407158149439684112410958827702207046829954	9234	UVM_INFO @ 321372553 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	44321933918413061973671496959766270725486474312306439327008031630361606244754	6609	UVM_INFO @ 439636585 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	23694414107172608160367711773497228122058399504360737730264160515352034220237	3540	UVM_INFO @ 1283121398 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	35466591778864611051292133254615661868486856853361090189512983177899434900521	6307	UVM_INFO @ 2614725874 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	92005274765784412212760484433927985815840303550509486636942963458627515416315	1497	UVM_INFO @ 4330381410 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	27152023510374182737787023494094742953100104866607505370856889332340118476371	5516	UVM_INFO @ 6249129679 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	76737228930208036131337406477650418738405977407009733741207012811615278771137	1474	UVM_INFO @ 922638352 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	94755066924188992185141520348851466545120931592900533660397776096884394546821	14209	UVM_INFO @ 39553130242 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	15981079553734410715720230399319838692340691022931082925632921912897321056071	6048	UVM_INFO @ 3510383767 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	81635187857256494400139481150157818018215014097541600005704934527333440126974	12915	UVM_INFO @ 2150091007 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	13722446915158571781463734635103361617769539246591671199290987639111557320575	8380	UVM_INFO @ 3762489304 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	92135022282179906927554655263974823201343748336855792825353758711030059201543	4873	UVM_INFO @ 960121745 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	37583103107389549015804298052463986261869358198325784478884282326592567929769	5174	UVM_INFO @ 13270588239 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	24032419846086192418083271606337317366257347107916536682483128500061522684095	15897	UVM_INFO @ 2457343199 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	71329200003523461063868746975027261191016477694529864010501598585199369472204	3199	UVM_INFO @ 8131712541 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	85167098024859054428855466856379571488246106340569831938526941329344208275588	10529	UVM_INFO @ 2522971896 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	82275955926563318609253298864789330704208747129923351139706532457973384077674	3605	UVM_INFO @ 2178900955 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	82193663738378202198053230267046964134814968649074864540216623785626204692179	142	UVM_INFO @ 45434979 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	34331377659257377151227312470045596664282690277013547767881941296270611088043	626	UVM_INFO @ 1019834903 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	15249654374520193416919332329968023084569157201112968211721955729714807195412	20685	UVM_INFO @ 59637893203 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	51476884547937660202958907637316974080760449957130417278338246226342811209937	4055	UVM_INFO @ 2628821864 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	29522054516261250777862375235928431942847633458807398487171424358418014411441	11718	UVM_INFO @ 5069163005 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	89234280572547011750167874686457589471491674850013237067329116210322242808418	214	UVM_INFO @ 190192813 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	63477994401993590834882243044351354458687131392812186959115227355379377402801	11206	UVM_INFO @ 1892438664 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	80939186344961938547683482484030434457338313781247183280092805555164633354120	299	UVM_INFO @ 424306374 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	107150065858612655880273275064717813953490750891410480607409789829529257431679	8619	UVM_INFO @ 744244222 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	115018110045418617920122117378958666678943688002122176746875201945752027516538	2607	UVM_INFO @ 1124204445 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	54708664007859444004526743110935710214957191112572126309500653794625264043275	3144	UVM_INFO @ 480007652 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	97836773078283487038753432075920034969076110878930118616345029916404745135601	4851	UVM_INFO @ 15248405347 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	46607308054218531013547419703442267756429394296957692101333756813919742560422	9936	UVM_INFO @ 1161204692 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	101476744338401840073558290552784033367469775794809904250823110816467339940065	6241	UVM_INFO @ 1273293338 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	76127155398816818908507654981829398120813978512672567234402639626342527545781	5773	UVM_INFO @ 6561128268 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	53611724516638827109303419767770876663714133787430814034416894971596746429413	3996	UVM_INFO @ 10087210056 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs []) reg name: otp_ctrl_core_reg_block.direct_access_rdata_				36 test runs
	otp_ctrl_macro_errs	86668940414597992174620362128603685344587917146900194614234592375869964921354	3419	UVM_INFO @ 347180593 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	115054707898543104367214882280365736419480039228277339622513199880372918159588	7996	UVM_INFO @ 1101682591 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	40429099092001233369508799347448137618022873653994517434762762631289091014517	1981	UVM_INFO @ 1981332328 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	23361660517379146786658821107275475141129407399108844875593188867523892935550	15807	UVM_INFO @ 587222788 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	2900454102039351442247146355815807742076987735546185126660509651178838857663	4158	UVM_INFO @ 7899626663 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	9318646613382877918187394455001844420408328433062387951744021568535838583833	584	UVM_INFO @ 62393988 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	1741746990056215140983652785711133162433305991938524907762637204378000192431	184	UVM_INFO @ 137029693 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	92718530502613550012786136104179127986785479420043089243045562871229000779071	23926	UVM_INFO @ 32141357640 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	61527574806920680560166836987822597811694464404696048491404152576033622299713	7857	UVM_INFO @ 2306484134 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	7529357064756987830529453754033830554885806485278781865441915515150825184246	170	UVM_INFO @ 41216841 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	17012064419236176604359783976840025690846362575555616118779865890271296387366	5173	UVM_INFO @ 444160922 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	21280856709491610084800375167432932063424005054993284996097792909689047071155	6474	UVM_INFO @ 257523154 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	39264760718090350954299221726867499380857675356453739077583107977877973891213	7762	UVM_INFO @ 12836251622 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	7444412038954746639827204600544507234366895650401811849888257811925350528676	6301	UVM_INFO @ 1170682411 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	101950583332124146075530850742560074257910602628618095265714106624237925863351	7629	UVM_INFO @ 11457722553 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_errs	81481271875153632451948279505836619601952136991705504067666204453067970710950	1702	UVM_INFO @ 272963504 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	13256203333399473535821562267786810222979944615426066864310959040122451002118	120	UVM_INFO @ 129714146 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	73381057120354389690136198111392823014399830048046239720258281014769467369717	3426	UVM_INFO @ 431144732 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	102920385152593723941438024685735288287453084144269158492808260083894441791052	4705	UVM_INFO @ 453661579 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	106360155013441675295436436209915223699546888160077009905743781339568933689838	13587	UVM_INFO @ 5010914615 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	37540677670170703100022675590730402702733301610560668367934101611773244282926	944	UVM_INFO @ 1834297412 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	80659190298242513873087441999774590651399720082887465695656028112412759974210	1666	UVM_INFO @ 100625228 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	98741714597366515134813738643721207242394966077768319331475266124344994268847	3458	UVM_INFO @ 2981057435 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	112498670977617970983940225165389466487134880930038376534169742961974941589629	8059	UVM_INFO @ 3567625357 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	49376903145285406431647716994584701800129579613329819562146961845228605016450	15684	UVM_INFO @ 21565354896 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	70112033119008102586834926579131735736346652507412056073207778890938089283319	930	UVM_INFO @ 201919378 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	55450866669278611932467395113883332354361711429552921797614576195748321876485	114	UVM_INFO @ 132501650 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	92146581340954623379987916710153302732907991664000143186181040102593507572908	232	UVM_INFO @ 33670210 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	64379735717691547463898481765401749475067402724879786809929528527009127245759	1246	UVM_INFO @ 152432539 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	646661731006014288096876287474282573495568422330544306449560487426437472482	4585	UVM_INFO @ 699005400 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	66814215887861228652031121960488083324014839365294681273192947723794487867204	1027	UVM_INFO @ 1073032113 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	89208290052610487049355709754595904865424540718873645078308852578121639130849	168	UVM_INFO @ 36462222 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	64034164815932579599641968009026281729982100779318030275016391843159705372562	168	UVM_INFO @ 74243589 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	54162380542064117900794914906942468368370642735238909211995717826618986501420	1334	UVM_INFO @ 89181318 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	99911678857131261800929849910310073971452816014418159512031448782972022842162	1914	UVM_INFO @ 756366216 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	33513905951487580209792998596466475725930306939546847201528697589025481989789	46450	UVM_INFO @ 11749350485 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:2213) [scoreboard] Check failed item.d_data == exp_data (* [] vs []) d_data mismatch when d_error =				17 test runs
	otp_ctrl_stress_all_with_rand_reset	102081498127674128612482029603791291049265239869104564810843097092468417203255	91	UVM_INFO @ 65940937 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	109233854929938386095774703440616808976899501213119740908671169640763577718887	1264	UVM_INFO @ 5747919647 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	77141555506367600744604489739671900179941505227055464508883720131762559964540	3293	UVM_INFO @ 26037135301 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	93655360546108000258740561155410702367198569713171012686109501468916405898253	91	UVM_INFO @ 30286937 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	56259501603551920190355009424034479762905786587297955751154696410355931229576	42795	UVM_INFO @ 27588713834 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	36705617181163377172473011022281234662601899784829650114195784462116439493172	6137	UVM_INFO @ 3129308995 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	94201017472300607121973541340809741771324566441985637552189908001329543654064	814	UVM_INFO @ 271183160 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	83198181675552558278049868055032451894081630131222609206630720955434039157435	317	UVM_INFO @ 15194008858 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	62306554398237710919660312382827356356364581088171587005769497618799055942452	1083	UVM_INFO @ 90015415 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	88471945257700102583463746775637115938511007674366071133846807019510929622485	425	UVM_INFO @ 3165365341 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	92480248117241017690714847243644001326847340237649325446693154344916423461200	38082	UVM_INFO @ 2151964095 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	70690911760512876393698124617667715746837501590435244949480586088311001231711	435	UVM_INFO @ 66601486 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	48621135423888811798414051407310517180780386910744965320292602622359362433188	165	UVM_INFO @ 72315114 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	12107327067805974216184111776539591527003990696900502442000339789790586718508	398	UVM_INFO @ 84493897 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	13925290330360754122444020594245641050982171606338624485808244083082335722152	91	UVM_INFO @ 120363660 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	99135710382081329538624537699095318840524195352916449172947216131577166220905	91	UVM_INFO @ 56992985 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	29093456641299804393031171096767220897448658447827302064662799050264536758405	393	UVM_INFO @ 132629521 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:671) [scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (* [] vs [*]) Interrupt_pin: OtpErr				9 test runs
	otp_ctrl_parallel_key_req	101273551146523344479921916866601063088088009781640171094433244553069948182829	7299	UVM_INFO @ 588372649 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	20127290662695859110273093449891328083269035344669745027368352884992945884404	2655	UVM_INFO @ 1163897464 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_background_chks	34341566371149680358949051523818431230471980019891493959143689166817247561782	26512	UVM_INFO @ 1086687618 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_key_req	94262749404978523570845098594393315511321596310693188124954841274948291668204	8109	UVM_INFO @ 3486872247 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	111115385594244895379827964787713374286736068754926003626410262770504027531958	6760	UVM_INFO @ 588159438 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	67824258003436603861110230492674410742558029287590382299249456069648007709698	12651	UVM_INFO @ 1202074260 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	98649440522277728741265939807907650164767107498991718541865817061595931330925	232	UVM_INFO @ 207707037 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	111212685235317563480213284942697614600689760411053814422675185802499693028756	3799	UVM_INFO @ 321485285 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	62645593457944519707357629332563640448599784331551448859596447215409524717445	2986	UVM_INFO @ 360163743 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:958) [scoreboard] Check failed (csr.get_mirrored_value() \| status_mask) == (item.d_data \| status_mask) (* [] vs []) reg name: status, compare_mask				7 test runs
	otp_ctrl_parallel_lc_req	104748202703932755739704757651960696887772254513618948881588602438444271557293	15146	UVM_INFO @ 2096034553 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	67549548846370297263956239761222235801911735958757970921103114603398608518645	42578	UVM_INFO @ 8344059567 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_req	107582335274816537756295207258794754242588981314417868586575696424243050367471	4999	UVM_INFO @ 603644190 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	15545703250197942766449123372094032292407955573151540898948481569879808234591	8415	UVM_INFO @ 4927853675 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_req	72073653928994000705194437115461527952914716239726305217097946721726054079294	7730	UVM_INFO @ 529263621 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	12077297832334904690586388688446988398401941748731266889525535292639962447899	23363	UVM_INFO @ 1294644631 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	8650707295594053022178319786816068958684527440295770508293962046814147204297	17738	UVM_INFO @ 17908106592 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_WARNING (uvm_reg_field.svh:1191) [RegModel] Trying to predict value of field 'err_code' while register 'otp_ctrl_core_reg_block.err_code_*' is being accessed				5 test runs
	otp_ctrl_stress_all_with_rand_reset	107965791829579413832586365615572648191091937085675536939441779154462633643269	182	UVM_INFO @ 395151460 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 395401460 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 395526460 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 395901460 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
	otp_ctrl_stress_all_with_rand_reset	77373193595711074595039416290722391618730672419855481778365200150123186361694	1308	UVM_INFO @ 5083135985 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 5084802655 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 5124136067 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 5125636070 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
	otp_ctrl_stress_all_with_rand_reset	36623343788007661419433949349754300284175240040754240486432785850244072283092	261	UVM_INFO @ 224293420 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 224543416 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 224626748 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 224710080 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
	otp_ctrl_stress_all_with_rand_reset	93113718950452330285825725027613975593994972919204344113466306287297983185729	11427	UVM_INFO @ 3452569188 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 3452727084 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 3452766558 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 3452911296 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
	otp_ctrl_stress_all_with_rand_reset	5642764089971294234274555719349402928765093859457514347143614303467166261555	888	UVM_INFO @ 1045649069 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 1046689069 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 1047089069 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 1047289069 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_ERROR (cip_base_scoreboard.sv:632) [scoreboard] Check failed item.d_data == exp_data (* [] vs []) d_data mismatch when d_error =				4 test runs
	otp_ctrl_stress_all_with_rand_reset	77679416671752501807945196597152959829734127658034192063832527045732994177037	91	UVM_INFO @ 31508142 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	37661163054339497097174869290513354163577711314551464419420961855378118855605	1571	UVM_INFO @ 255626295 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	112234208224062191213147090523756510945074581927315465942760111470082389131312	3123	UVM_INFO @ 1230851262 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	96934513986087025409611503555500312964193078523731728985661970097881648525718	15381	UVM_INFO @ 1766553927 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [] vs []) dai addr ed* rdata* readout mismatch				2 test runs
	otp_ctrl_low_freq_read	1817556003197114354385296573489877587421257851302874613928038365424518312935	89	UVM_INFO @ 62666371586 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	43100928551221578912399601211981071051203915168824594939664091165312179098283	90	UVM_INFO @ 68817297698 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue				2 test runs
	otp_ctrl_sec_cm	40930768554852308127275455698970114971167095180911463083742227645825128268010	2354	UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_sec_cm	30383203360439370248872376577707879370067125645520111228153014655531525450160	2820	UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:465) [otp_ctrl_common_vseq] wait timeout occurred!				1 test run
	otp_ctrl_csr_mem_rw_with_rand_reset	27080462185667191179853206066433180427569376925360752457057498357039293955514	95	UVM_INFO @ 10174558754 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [] vs []) dai addr f rdata* readout mismatch				1 test run
	otp_ctrl_stress_all_with_rand_reset	9159035769777485985036093832273557112735788535805928129429493662045119459791	45439	UVM_INFO @ 10442628425 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1286) [otp_ctrl_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.				1 test run
	otp_ctrl_stress_all_with_rand_reset	44914826094921820948535915162838093124889424749775813892666312565637138499948	2140	UVM_INFO @ 1945296740 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1365) [otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [] vs [*]) fatal error fatal_check_error does not trigger!				1 test run
	otp_ctrl_init_fail	85662866207705484800074962782927737557419294920351786500781981849160522898216	1914	UVM_INFO @ 221080882 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---