Simulation Results: otp_ctrl

 
19/06/2026 15:00:30 DVSim: v1.49.0 sha: c0022c1 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 85.85 %
  • code
  • 81.00 %
  • assert
  • 94.89 %
  • func
  • 81.66 %
  • line
  • 88.48 %
  • branch
  • 86.59 %
  • cond
  • 88.53 %
  • toggle
  • 88.58 %
  • FSM
  • 52.84 %
Validation stages
V1
84.62%
V2
70.65%
V2S
71.21%
V3
11.88%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
otp_ctrl_wake_up 2.440s 864.753us 1 1 100.00
smoke 8 10 80.00
otp_ctrl_smoke 16.260s 6710.939us 8 10 80.00
csr_hw_reset 1 1 100.00
otp_ctrl_csr_hw_reset 2.060s 273.007us 1 1 100.00
csr_rw 5 5 100.00
otp_ctrl_csr_rw 2.300s 101.003us 5 5 100.00
csr_bit_bash 1 1 100.00
otp_ctrl_csr_bit_bash 3.850s 217.706us 1 1 100.00
csr_aliasing 1 1 100.00
otp_ctrl_csr_aliasing 6.740s 144.607us 1 1 100.00
csr_mem_rw_with_rand_reset 3 5 60.00
otp_ctrl_csr_mem_rw_with_rand_reset 3.040s 129.556us 3 5 60.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
otp_ctrl_csr_rw 2.300s 101.003us 5 5 100.00
otp_ctrl_csr_aliasing 6.740s 144.607us 1 1 100.00
mem_walk 1 1 100.00
otp_ctrl_mem_walk 2.020s 80.955us 1 1 100.00
mem_partial_access 1 1 100.00
otp_ctrl_mem_partial_access 2.040s 636.916us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
dai_access_partition_walk 0 1 0.00
otp_ctrl_partition_walk 133.630s 8057.179us 0 1 0.00
init_fail 201 300 67.00
otp_ctrl_init_fail 49.920s 10001.743us 201 300 67.00
partition_check 27 60 45.00
otp_ctrl_background_chks 22.110s 3884.393us 5 10 50.00
otp_ctrl_check_fail 38.470s 9638.303us 22 50 44.00
regwen_during_otp_init 20 30 66.67
otp_ctrl_regwen 11.200s 461.557us 20 30 66.67
partition_lock 8 30 26.67
otp_ctrl_dai_lock 27.440s 5587.972us 8 30 26.67
interface_key_check 6 10 60.00
otp_ctrl_parallel_key_req 34.010s 21259.103us 6 10 60.00
lc_interactions 183 210 87.14
otp_ctrl_parallel_lc_req 19.100s 2774.560us 4 10 40.00
otp_ctrl_parallel_lc_esc 62.590s 28667.697us 179 200 89.50
otp_dai_errors 23 25 92.00
otp_ctrl_dai_errs 94.490s 33672.640us 23 25 92.00
otp_macro_errors 4 10 40.00
otp_ctrl_macro_errs 26.480s 1226.141us 4 10 40.00
test_access 3 10 30.00
otp_ctrl_test_access 16.380s 1469.551us 3 10 30.00
stress_all 0 10 0.00
otp_ctrl_stress_all 256.290s 173570.205us 0 10 0.00
intr_test 10 10 100.00
otp_ctrl_intr_test 2.460s 723.314us 10 10 100.00
alert_test 10 10 100.00
otp_ctrl_alert_test 3.390s 204.729us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
otp_ctrl_tl_errors 7.760s 408.946us 25 25 100.00
tl_d_illegal_access 25 25 100.00
otp_ctrl_tl_errors 7.760s 408.946us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
otp_ctrl_csr_hw_reset 2.060s 273.007us 1 1 100.00
otp_ctrl_csr_rw 2.300s 101.003us 5 5 100.00
otp_ctrl_csr_aliasing 6.740s 144.607us 1 1 100.00
otp_ctrl_same_csr_outstanding 4.110s 2474.970us 5 5 100.00
tl_d_partial_access 12 12 100.00
otp_ctrl_csr_hw_reset 2.060s 273.007us 1 1 100.00
otp_ctrl_csr_rw 2.300s 101.003us 5 5 100.00
otp_ctrl_csr_aliasing 6.740s 144.607us 1 1 100.00
otp_ctrl_same_csr_outstanding 4.110s 2474.970us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 3 5 60.00
otp_ctrl_sec_cm 451.880s 200000.000us 3 5 60.00
tl_intg_err 28 30 93.33
otp_ctrl_sec_cm 451.880s 200000.000us 3 5 60.00
otp_ctrl_tl_intg_err 40.300s 24026.606us 25 25 100.00
prim_count_check 3 5 60.00
otp_ctrl_sec_cm 451.880s 200000.000us 3 5 60.00
prim_fsm_check 3 5 60.00
otp_ctrl_sec_cm 451.880s 200000.000us 3 5 60.00
sec_cm_bus_integrity 25 25 100.00
otp_ctrl_tl_intg_err 40.300s 24026.606us 25 25 100.00
sec_cm_secret_mem_scramble 8 10 80.00
otp_ctrl_smoke 16.260s 6710.939us 8 10 80.00
sec_cm_part_mem_digest 8 10 80.00
otp_ctrl_smoke 16.260s 6710.939us 8 10 80.00
sec_cm_dai_fsm_sparse 3 5 60.00
otp_ctrl_sec_cm 451.880s 200000.000us 3 5 60.00
sec_cm_kdi_fsm_sparse 3 5 60.00
otp_ctrl_sec_cm 451.880s 200000.000us 3 5 60.00
sec_cm_lci_fsm_sparse 3 5 60.00
otp_ctrl_sec_cm 451.880s 200000.000us 3 5 60.00
sec_cm_part_fsm_sparse 3 5 60.00
otp_ctrl_sec_cm 451.880s 200000.000us 3 5 60.00
sec_cm_scrmbl_fsm_sparse 3 5 60.00
otp_ctrl_sec_cm 451.880s 200000.000us 3 5 60.00
sec_cm_timer_fsm_sparse 3 5 60.00
otp_ctrl_sec_cm 451.880s 200000.000us 3 5 60.00
sec_cm_dai_ctr_redun 3 5 60.00
otp_ctrl_sec_cm 451.880s 200000.000us 3 5 60.00
sec_cm_kdi_seed_ctr_redun 3 5 60.00
otp_ctrl_sec_cm 451.880s 200000.000us 3 5 60.00
sec_cm_kdi_entropy_ctr_redun 3 5 60.00
otp_ctrl_sec_cm 451.880s 200000.000us 3 5 60.00
sec_cm_lci_ctr_redun 3 5 60.00
otp_ctrl_sec_cm 451.880s 200000.000us 3 5 60.00
sec_cm_part_ctr_redun 3 5 60.00
otp_ctrl_sec_cm 451.880s 200000.000us 3 5 60.00
sec_cm_scrmbl_ctr_redun 3 5 60.00
otp_ctrl_sec_cm 451.880s 200000.000us 3 5 60.00
sec_cm_timer_integ_ctr_redun 3 5 60.00
otp_ctrl_sec_cm 451.880s 200000.000us 3 5 60.00
sec_cm_timer_cnsty_ctr_redun 3 5 60.00
otp_ctrl_sec_cm 451.880s 200000.000us 3 5 60.00
sec_cm_timer_lfsr_redun 3 5 60.00
otp_ctrl_sec_cm 451.880s 200000.000us 3 5 60.00
sec_cm_dai_fsm_local_esc 182 205 88.78
otp_ctrl_parallel_lc_esc 62.590s 28667.697us 179 200 89.50
otp_ctrl_sec_cm 451.880s 200000.000us 3 5 60.00
sec_cm_lci_fsm_local_esc 179 200 89.50
otp_ctrl_parallel_lc_esc 62.590s 28667.697us 179 200 89.50
sec_cm_kdi_fsm_local_esc 179 200 89.50
otp_ctrl_parallel_lc_esc 62.590s 28667.697us 179 200 89.50
sec_cm_part_fsm_local_esc 183 210 87.14
otp_ctrl_parallel_lc_esc 62.590s 28667.697us 179 200 89.50
otp_ctrl_macro_errs 26.480s 1226.141us 4 10 40.00
sec_cm_scrmbl_fsm_local_esc 179 200 89.50
otp_ctrl_parallel_lc_esc 62.590s 28667.697us 179 200 89.50
sec_cm_timer_fsm_local_esc 182 205 88.78
otp_ctrl_parallel_lc_esc 62.590s 28667.697us 179 200 89.50
otp_ctrl_sec_cm 451.880s 200000.000us 3 5 60.00
sec_cm_dai_fsm_global_esc 182 205 88.78
otp_ctrl_parallel_lc_esc 62.590s 28667.697us 179 200 89.50
otp_ctrl_sec_cm 451.880s 200000.000us 3 5 60.00
sec_cm_lci_fsm_global_esc 179 200 89.50
otp_ctrl_parallel_lc_esc 62.590s 28667.697us 179 200 89.50
sec_cm_kdi_fsm_global_esc 179 200 89.50
otp_ctrl_parallel_lc_esc 62.590s 28667.697us 179 200 89.50
sec_cm_part_fsm_global_esc 183 210 87.14
otp_ctrl_parallel_lc_esc 62.590s 28667.697us 179 200 89.50
otp_ctrl_macro_errs 26.480s 1226.141us 4 10 40.00
sec_cm_scrmbl_fsm_global_esc 179 200 89.50
otp_ctrl_parallel_lc_esc 62.590s 28667.697us 179 200 89.50
sec_cm_timer_fsm_global_esc 182 205 88.78
otp_ctrl_parallel_lc_esc 62.590s 28667.697us 179 200 89.50
otp_ctrl_sec_cm 451.880s 200000.000us 3 5 60.00
sec_cm_part_data_reg_integrity 201 300 67.00
otp_ctrl_init_fail 49.920s 10001.743us 201 300 67.00
sec_cm_part_data_reg_bkgn_chk 22 50 44.00
otp_ctrl_check_fail 38.470s 9638.303us 22 50 44.00
sec_cm_part_mem_regren 8 30 26.67
otp_ctrl_dai_lock 27.440s 5587.972us 8 30 26.67
sec_cm_part_mem_sw_unreadable 8 30 26.67
otp_ctrl_dai_lock 27.440s 5587.972us 8 30 26.67
sec_cm_part_mem_sw_unwritable 8 30 26.67
otp_ctrl_dai_lock 27.440s 5587.972us 8 30 26.67
sec_cm_lc_part_mem_sw_noaccess 8 30 26.67
otp_ctrl_dai_lock 27.440s 5587.972us 8 30 26.67
sec_cm_access_ctrl_mubi 8 30 26.67
otp_ctrl_dai_lock 27.440s 5587.972us 8 30 26.67
sec_cm_token_valid_ctrl_mubi 8 10 80.00
otp_ctrl_smoke 16.260s 6710.939us 8 10 80.00
sec_cm_lc_ctrl_intersig_mubi 8 30 26.67
otp_ctrl_dai_lock 27.440s 5587.972us 8 30 26.67
sec_cm_test_bus_lc_gated 8 10 80.00
otp_ctrl_smoke 16.260s 6710.939us 8 10 80.00
sec_cm_test_tl_lc_gate_fsm_sparse 3 5 60.00
otp_ctrl_sec_cm 451.880s 200000.000us 3 5 60.00
sec_cm_direct_access_config_regwen 20 30 66.67
otp_ctrl_regwen 11.200s 461.557us 20 30 66.67
sec_cm_check_trigger_config_regwen 8 10 80.00
otp_ctrl_smoke 16.260s 6710.939us 8 10 80.00
sec_cm_check_config_regwen 8 10 80.00
otp_ctrl_smoke 16.260s 6710.939us 8 10 80.00
sec_cm_macro_mem_integrity 4 10 40.00
otp_ctrl_macro_errs 26.480s 1226.141us 4 10 40.00
Testpoint Test Max Runtime Sim Time Pass Total %
otp_ctrl_low_freq_read 0 1 0.00
otp_ctrl_low_freq_read 109.300s 69031.850us 0 1 0.00
stress_all_with_rand_reset 12 100 12.00
otp_ctrl_stress_all_with_rand_reset 3600.124s 0.000us 12 100 12.00

Error Messages

   Test seed line log context
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: * 110 test runs
otp_ctrl_init_fail 34347795343580936977055419764936727775638382531114520229938142069232374062613 889
UVM_INFO @ 177184352 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 65547699313953957529911028642229283211242103159582205465593688182654433293325 3140
UVM_INFO @ 1352714078 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 65184901017807313505556262576013439955195389519809890718104903578549399325112 3020
UVM_INFO @ 1449377240 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 88645139055005481399439587287725979023662214382526237359165013520664195741730 840
UVM_INFO @ 194249883 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 11411876872241212952609677133904526849161817842913091963653494894009953127072 1001
UVM_INFO @ 48842564 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 44348974375252116296827717495065177788754699706575031466657241997084490958161 4236
UVM_INFO @ 103619109 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 18200226513743960134911670532118057786884907651049056614861093563001521971136 531
UVM_INFO @ 88908048 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 77231823910353175479600449409111456135058346000003726503874907811299679760043 5796
UVM_INFO @ 487811308 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 67304137779153927809651266133056734231819700524331546513772125069804303043403 1948
UVM_INFO @ 160569859 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 86328310129940618993527052602779482973983896684177774719499601077029608333590 717
UVM_INFO @ 55661666 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 8954605212953486634348022151596691359317418892927920618543962975498118608160 6942
UVM_INFO @ 282859278 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 66073659026779605510190673283838875879275470038781120294040141778111765313944 3282
UVM_INFO @ 164923075 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 35091829681213647998439076930328469264309431649855521029681883809913372651326 829
UVM_INFO @ 147976341 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 43486081008133468952899811018463530581316303804061724372241342125649908520269 2260
UVM_INFO @ 312097754 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 98157777093446115678027793210867006149228150546597348019588832564414950387953 901
UVM_INFO @ 101341685 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 16350719635778484451253254948214587859858705545922983424600077959420404721218 1949
UVM_INFO @ 1200758659 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 37029618403924982841768027816075884039503736749033290114120303375767600156452 307
UVM_INFO @ 196934508 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 22752812346741918135449278235313437319117698055094022867308381744672711243080 941
UVM_INFO @ 73556567 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 18859081052209642912278255872743418267984175865153182194353933070428382101891 301
UVM_INFO @ 39227790 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 21488672912472580345805632463489862916654148104492920510589226810397083649160 9656
UVM_INFO @ 733997860 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 10635635191168308708174605298652839035219611525252812891556990545238434835848 1523
UVM_INFO @ 226167319 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 86571406360441790330895694523045972312220235043893001644731216513040828362324 1580
UVM_INFO @ 113094122 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 81340278131255820816953422682376010020656613823359180711071198317108249968512 677
UVM_INFO @ 81513137 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 94500359804512406691195755036700322275720951427475618161076904571279249735312 788
UVM_INFO @ 44781171 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 22879658310241655867021626495353429764739300409293143283360160179856053829304 833
UVM_INFO @ 148223652 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 111246856905279990453955895302684821851177920899215429440655930187271008902008 969
UVM_INFO @ 753499294 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 65305581032954367237296045942692539478500399364259322406929263516138330491220 1197
UVM_INFO @ 71205516 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 67101323756779384871592505282508074329557179456813838251403205568372598844736 2329
UVM_INFO @ 133859086 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 10887459390516822234948424651440011480139327398126078732327609384998334793275 1613
UVM_INFO @ 236851845 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 68549281928054532890307947149483488145958022698556193725726676868168506794896 1689
UVM_INFO @ 1021110219 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 87564788537173459068298217365955251114212328742157344576888582282795795686526 1427
UVM_INFO @ 65618503 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 16504014384432836919522440959824834395803882712732494748178377608410157656979 675
UVM_INFO @ 43520169 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 112535816047605789872682518270646097254985143976811947416116779844181675179640 741
UVM_INFO @ 42510671 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 79749716925379716998866487602488273719190876379170053427370521746096775445410 845
UVM_INFO @ 48356032 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 7871924367290049490123818343557808208276358381178807868700237919023296171686 815
UVM_INFO @ 45471510 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 60106052516281220025357138209330207710123409061138805390944014809680133648992 351
UVM_INFO @ 139531257 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 19827447678650959670927441505210181738921153068798036674165957486810131927163 1265
UVM_INFO @ 63356695 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 6390685488083833157964678382882431905263279360010671766149769382015027559563 465
UVM_INFO @ 38328330 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 21279999915838487682677427213571231383005455700222792817671937583110772717664 409
UVM_INFO @ 153249511 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 107284234841312403791111492488237074958465704130942833110224414110941470964440 525
UVM_INFO @ 268113327 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 50615690938104286485281017454141706304690911172008333968222899714271271623814 431
UVM_INFO @ 627553730 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 27962885223870935368332477762374749513943024663173618559714545393720306186585 593
UVM_INFO @ 164428221 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 96212160846556433270136880569750016365521900209845086332892355925385149092391 469
UVM_INFO @ 38624223 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 114529043478771162030350940656521804954872713994703516246725729629821785161109 183
UVM_INFO @ 539466259 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 44389912039950613178854959384073557234748679950898063649492209852555127286130 947
UVM_INFO @ 226999981 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 40590556692302235023296150826947181876771999435430417919707100411465104702573 451
UVM_INFO @ 75023410 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 4004336120959345407422601222963876547390912741333883249941383661965679057486 617
UVM_INFO @ 78798803 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 2869329091736364480992065996093228654586780730824287869597619155835031605599 1119
UVM_INFO @ 48375882 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 86698395295401289912421102263177537042181587037814038174716300378500526878334 1815
UVM_INFO @ 1407041618 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 104536719956470747860803197617091822253740922163725043498673059213654930849864 1647
UVM_INFO @ 130829985 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 54848264084296884641947125172409082544824669319368376019886460083906621605076 1047
UVM_INFO @ 67064701 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 35811126170440568544784731852742043695343597976768192134120180891535323889182 1513
UVM_INFO @ 131401295 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 115209055296665204178895295833235777490975718935187678018632292313889904878464 509
UVM_INFO @ 623519038 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 64776235202680413519329289646779799587220998090004030441789775834249136086315 515
UVM_INFO @ 58637953 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 52260534267920428321164592630936615892691173142513022252260261430604934514306 1709
UVM_INFO @ 954590773 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 34265176764982491761229172830819455379844086543487702710278180799026437411612 1269
UVM_INFO @ 55177833 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 26778562426694651231065103064291818069219435680322571457721395066359279617950 1697
UVM_INFO @ 66839218 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 25781489500446886475509716395134490035331675670624018665571048428989559115617 2513
UVM_INFO @ 309721886 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 6157227601709536139436438521160507730482937133662404044829064905023590597882 183
UVM_INFO @ 34779168 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 58484593019435087073075020885229346725985067045269434741641548804260348541530 2059
UVM_INFO @ 84901135 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 80831718674082759595291236935549441272053020245699173436390838025645526044701 1983
UVM_INFO @ 335275349 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 43644435851017404084352277778264459157496799387408851513478598137498207411355 717
UVM_INFO @ 226429172 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 3731592606288348730855642018152558730426079392879872709842167139775012487676 1033
UVM_INFO @ 63515663 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 25329098922503653352458592249132886535490924092658969157272342413802093436573 1607
UVM_INFO @ 62854445 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 107044570032352535765734727737497174582001283479089271528793991255266688315494 199
UVM_INFO @ 52095939 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 99501351485592353610593917327763644965989596602349813227398348180506013649399 2445
UVM_INFO @ 105078026 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 39050547868359455054636599106775214807050050905916538825480683646917826004239 1605
UVM_INFO @ 233952148 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 81928313253934166923210861264887892760796809211354751836085182681047750091207 3301
UVM_INFO @ 213763020 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 24184547333757296074671143022121435283435351726409940165788060047278577684883 947
UVM_INFO @ 54588528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 2058487830828879655137223523833248739643766785206092053803379654764340137569 99
UVM_INFO @ 854333506 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 34024319226253516852978539786677176345172876275219761820423764308826410441293 2493
UVM_INFO @ 73207735 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 25437620637962729015632392657632685949272839800047816309433777665460442191261 183
UVM_INFO @ 135662311 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 61561032749516692395602403045538931078360443876608681843421340498801843745905 1599
UVM_INFO @ 61176740 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 78985555330137960067636192124797564330272035352406745885271572854807302781281 139
UVM_INFO @ 217557502 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 3904391688548827363451176296191816143316024490426529299416898509816765527283 783
UVM_INFO @ 51955542 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 114011155238631386772833959125624739811099780739899343976799835721569629639498 99
UVM_INFO @ 32746671 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 73180162468315650762637155348684815762451988277668154881164899882917237060390 755
UVM_INFO @ 90208137 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 61721280620064460363495635741945253579758062760015489841720020855383951957266 1043
UVM_INFO @ 50777234 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 44729022438212096086825596914843193407034810146364129375833457121667767611448 781
UVM_INFO @ 46629369 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 28411643301362441297142256287396038471055571651586905946234407989350733594231 1137
UVM_INFO @ 88241574 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 45640683028865616594146460788608007535419706675008308411564449549265685696607 831
UVM_INFO @ 172013832 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 17913219526169543349369220634252320652121020365504469093491691281540090870103 1591
UVM_INFO @ 220784344 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 11711681400740171309728289548410460105426172156449090829118574155377773617832 409
UVM_INFO @ 956726041 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 18583734096837109952927928600847106589605185563296204855397562270115720204225 183
UVM_INFO @ 80892533 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 43079019471510618743943344509215628223590997350777811247620548280550565056509 283
UVM_INFO @ 46047541 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 57174547182629052924505562794054247920383743982168476820780946031424917829553 141
UVM_INFO @ 132198711 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 114746417612071275365186363525533691297864564352478188405696259703863102125265 923
UVM_INFO @ 740081118 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 4454607044135327355580715259455762073364873124218715964645305779274138381857 199
UVM_INFO @ 686783356 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 58645657425620796988341441247336824691793055084935013494358252996817966687094 291
UVM_INFO @ 47493741 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 110792911459423566356203076100431757994425257347330441877821524172468428927024 1181
UVM_INFO @ 72912220 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 30252636537325807015035657357124779673463024872663149130742880928118233669122 2347
UVM_INFO @ 87595817 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 96831410763342497280097198622228893599663231479840190046193227325277701077814 285
UVM_INFO @ 145526713 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 107935368293732799181569773717070245096750825289519150278559240315912713768603 1157
UVM_INFO @ 67705522 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 110912003989484458549521596809646466653926930672153380105627857054925838314114 493
UVM_INFO @ 78145920 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 60892943108691526634730300400307266299034330256580461298318133903830395006944 1729
UVM_INFO @ 77389637 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 17896687568420932494180721397292607347280392092850849698876557745469328457980 141
UVM_INFO @ 92427494 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 40234329212744163366373994458163671169623185442568329574188234246458385295225 839
UVM_INFO @ 67755493 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 111838154511240294641784828420284741072567257342791063546518545991867653814023 283
UVM_INFO @ 35330714 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 61193354072413401381749280525796239038095714574434352046697723973424085938676 2877
UVM_INFO @ 163391958 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 30404976049275445644675414820159232374192964575138069442592978634717860769025 821
UVM_INFO @ 52809430 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 52735747650147100648245598224362601717664033353968775519879680092182341707841 1249
UVM_INFO @ 100752127 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 86912851328845954354852878574758767389395403672004593176110339606642673939964 1135
UVM_INFO @ 118239448 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 29419619777186185486220711899871979746592804215355673572979474217275363351309 1051
UVM_INFO @ 144709160 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 32406252094914960672248422886898234707732054117388656711856918604245799139634 877
UVM_INFO @ 115029920 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 55424053987306853499817635595268270288671186682721666310661403000881275543600 141
UVM_INFO @ 63204581 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 108794027202474160714298052379470387829776169424409455404608285334202868501428 1109
UVM_INFO @ 116964735 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 31919776307347787334495146979259290472373438873532780541324887430716809590478 1065
UVM_INFO @ 86885311 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 74438052560254718179027432871538282074281437173276470326806182206659237124380 1013
UVM_INFO @ 136010167 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 50458298734027635208168920683169758425751430923941789238535704525991029185568 1629
UVM_INFO @ 68949889 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 71228371219678832942263601646336147276943412548098353321533716382591065991819 801
UVM_INFO @ 85195701 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.err_code_* 76 test runs
otp_ctrl_check_fail 110263354269856464549151542398931631665279265699365227354646442832428739708855 6839
UVM_INFO @ 1150588984 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 37413715709593300462820102187296719134838947262463767279783251946790825671374 14833
UVM_INFO @ 7326159387 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 37365375837674876292946747643390509983263565912746675566567745795896546120504 3227
UVM_INFO @ 1564793265 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 104484594625857608825829840068237356207026846579628176208884135383029078252343 6483
UVM_INFO @ 2063195570 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 99159641859842892593347535576588369740201671320765403728785728994418472758182 406
UVM_INFO @ 254910101 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 39359544660913203892748586004358990559367244735035628754930721737605781365742 17853
UVM_INFO @ 1322955882 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 60742464044236570827594325492008783047510983200820925653603463315071835029616 3143
UVM_INFO @ 2817406098 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 97031305689856462557958999093319175204700302360114403832648799131404964277100 7573
UVM_INFO @ 924657476 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 7472295543391446795994298914250928030260719511875096830996262096584055780460 8308
UVM_INFO @ 3359502102 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 41469190964798345007149188010726479693014182680230497887366104027307382731902 3402
UVM_INFO @ 1428396709 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 105711310214880393346792594788977886158240863868325694230423872874271086998578 328
UVM_INFO @ 207484847 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 185822050498673314966874256890228131006436170700255277232588595814352780495 1860
UVM_INFO @ 324761585 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 39398679625001662005158269003879411927324572934200461842996423012817829964558 17865
UVM_INFO @ 15637389659 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 97236052696207848198250544275098378455578275901216876385732562656743969005944 5811
UVM_INFO @ 999565062 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 8619102605790540700333096090225585780576795209379128430171040168499171755540 8860
UVM_INFO @ 5211141106 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 17828105838623825789416313234850077885487819761967561334392807258764287907648 1728
UVM_INFO @ 2311524819 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 110795114174265845020309419815472199300522913342471444747795093302025280263200 940
UVM_INFO @ 52032060 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 43007518555157359661285131075694271438959077756083921868850134318038080780321 2441
UVM_INFO @ 344760869 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 101509302851142701411748519284766620450990152550722229401693372846888949259179 7989
UVM_INFO @ 4292829147 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 19107421299761611066115185325317752925066621864425991638250777952099120304705 625
UVM_INFO @ 253118306 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 96279113588348489145719603311284992563747337322717505737372148616495323823683 3538
UVM_INFO @ 106801560 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 64420568352540226243131466190465808316172510929422738670426256697096800600061 4609
UVM_INFO @ 688948200 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 103601683365145905919488902802376035478106100901387788947281291966398342083350 544
UVM_INFO @ 163584346 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 86222495738725214129602744609304138409387830990707501767172085596941223846048 12750
UVM_INFO @ 7374747652 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 100128083909235696649030923797539940183924411838391172461609032257760066965346 1916
UVM_INFO @ 761948676 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 68463153454389676632047853053398628189849983755745099891899786741032979719861 21106
UVM_INFO @ 3949087156 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 74430534428822496080070966176795836102210820747959717338057852024469083678876 3600
UVM_INFO @ 1066303755 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 48095986821547831388872593827726487901892161357541585482137889823907541245126 6843
UVM_INFO @ 1077254067 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 64191197924164629601086182874105160253693781583095827767981941367239656521657 1060
UVM_INFO @ 92769138 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 105841452782118967160347634443906117844097510058722497522006857281272861625791 482
UVM_INFO @ 917966992 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 11126970082778853404993994551758040094018551348193927117693194740150825010922 2545
UVM_INFO @ 486956827 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 45177858700621004781311194544066006625956045760195373808793261519741946828619 5529
UVM_INFO @ 1780672839 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 43808030183484218920049657319761625659988448864520428876289965279089713048296 7054
UVM_INFO @ 4712893526 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 48525118421533022497836887736754204877281442690268824687471737669403607260603 31938
UVM_INFO @ 12862423493 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 62022063461736780487222821562913217045783438871525892511983381076973349716973 1810
UVM_INFO @ 151302839 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 16165309853703165961388843113037793268609925518493364203904834493655746077102 14593
UVM_INFO @ 13979544632 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 25316663950911624176626687516629369395987819981636371976212276594651371781412 2370
UVM_INFO @ 391387686 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 53181419111951537527933568244731662200916290137575677421911440797501740865444 6092
UVM_INFO @ 1528463386 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 37873458210008363833537783063227336006417592444669032476349930021567936040634 10045
UVM_INFO @ 412829447 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 37132051628626589755837829980796986048770828779756354398456328652488034455440 15283
UVM_INFO @ 10634059736 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 27664223771752005444672906717798826107986428178941301154401161801747560793639 5500
UVM_INFO @ 9262332595 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 31997945273306355277372614212201682493076581635106919956095648094754446780759 618
UVM_INFO @ 175949997 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 4367839122903675736707205910453283578327222669527196050592658056968248507172 1930
UVM_INFO @ 80531487 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 89456568629976257204943552990641195792943314049664747137963754986220918457746 1394
UVM_INFO @ 137144901 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 66814007869366726708464790838095441962942081609525808044838090717579341528951 4839
UVM_INFO @ 1655969262 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 37152687912266029535312574977177282808547480613771771737868406468971092380778 2022
UVM_INFO @ 131663099 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 114613517886589801362881557243659802156090758462818880935853946447068785375884 11516
UVM_INFO @ 17002970969 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 77247546723099545443545573217434243583412662333258815273147640694314902146725 17248
UVM_INFO @ 55179814502 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 45845835573076863097042534988462294221013109306053552822504805335700264449101 1456
UVM_INFO @ 214573478 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 103165915122745591479707336440751643409306069103278904982650165545979260025232 3408
UVM_INFO @ 470704329 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 46442206705684459948293257569082549276930481818955784098376160307438949886576 16104
UVM_INFO @ 639531954 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 40250544451092666052858222144561370550570757295631805514554887492000040568202 4909
UVM_INFO @ 1890172070 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 104762127547544949953575242237620481099409353084255217446688063068777304028989 2078
UVM_INFO @ 211789765 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 73512091796424024481719087972913149640360502044214688193831878555389800986130 512
UVM_INFO @ 160485472 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 8242232886246898991835474424402492332574171885264985045569875236364212721319 2888
UVM_INFO @ 124230626 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 13153958622121677590106484516313193432478263206544306830870163819084024382722 1176
UVM_INFO @ 187578616 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 16078425208137965542341129563270975352645155091480350210626943706441172430287 1174
UVM_INFO @ 437588974 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 26467230252859047912120588022942708149035964200945399672127069697556649714755 12586
UVM_INFO @ 1759657016 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 51365863637955068966601693457039272518575899261540940031412536259727669371229 1220
UVM_INFO @ 90174974 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 57579948890356846021043894935572627397091092720811162926803659309858864131455 3091
UVM_INFO @ 1034078628 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 84089678979974599611885559786461318236712498251072800690509718812047235543079 9154
UVM_INFO @ 965785411 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 62304971596642187179492600786813324882731246718055822847855342481838022864437 1488
UVM_INFO @ 221706018 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 53563846720863705332553125925329728813285921209656048103856429965067053877914 884
UVM_INFO @ 162910015 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 21765508452286781305490059578149269397476783103735473926207769134765231298785 2272
UVM_INFO @ 261459993 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 104459922904423859938238401637962374713602914993043026297628161556004066629288 560
UVM_INFO @ 180743140 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 33700992472426033153416039130078103585556813071965097858047754859621347581384 2509
UVM_INFO @ 376527904 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 49869064358655313968672390713011335063520765177183969664259305331993625723385 3763
UVM_INFO @ 498396490 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 90735939844425172571689128204558329507283670180440264805708168508373181443994 3983
UVM_INFO @ 371542177 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 80594140319620740206016220445737594873611054097910619525521370674612860105251 1410
UVM_INFO @ 476692213 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 20776974541676241458385325010752054710977003445082934606741424414789521903949 478
UVM_INFO @ 188810878 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 104652134888564277614919881278418575082178877072377206752595909107853510930766 444
UVM_INFO @ 1208174658 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 69112909107901292490496234601479381217897064724336027635567788760585127192925 2850
UVM_INFO @ 79577680 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 113286995689099313969493105322628457201709956105808110147134085071986637603327 3204
UVM_INFO @ 342276450 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 10922249836607049641693307681420920734293476712519831961857780271489697136266 858
UVM_INFO @ 1339691982 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 72318026751729305101503755487661968573022989387013296243213048727374784617996 514
UVM_INFO @ 261089672 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 53658576438173404512513046262693914943921109330721444668867737247354726663972 1532
UVM_INFO @ 308669599 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.intr_state 32 test runs
otp_ctrl_background_chks 45125265604142285955654054482846384485393784768480374725511670996465258593695 8550
UVM_INFO @ 846706123 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 5240487900488874409661468020070616691135862588964108483280623658663351046416 3879
UVM_INFO @ 7182645294 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 26069972012152047525468590444566479762420383960511629887722509285336758232162 7626
UVM_INFO @ 2515151746 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 89230501734735781602513096780842728285136313384094383995941641517139605988614 9506
UVM_INFO @ 1469550542 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 114596399297137706521946048779200732381107817929813165867103753236061613511281 3767
UVM_INFO @ 243138660 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 56851554267870832065649643557033475411888457651078603774306932699785986915007 3970
UVM_INFO @ 3175912830 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 100686453407663321090477754578263202075530256322895999701937811968851505807473 1026
UVM_INFO @ 735502514 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 45695585886901003826439381326857084649913465042270563289188341579722984741449 126
UVM_INFO @ 62428066 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 105669429436682195825442441399804355469092839707580917022785607541289941271964 5542
UVM_INFO @ 1992108394 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 59771824275431280937170762598265343719286562833671640304812022034055355621311 14948
UVM_INFO @ 5208842790 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 49898721166479943928660394850389316838042820948267667047555166125287736681677 2511
UVM_INFO @ 232971542 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 100779854358078711612896724136686818330847436178929842837264080331028138599193 4840
UVM_INFO @ 24474392949 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 16191792913498613394262763911466585375249040951638670268304407361964079383141 5492
UVM_INFO @ 1726795158 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 87119543283628226917947919774683910280685615442218703302309634213945964409426 176
UVM_INFO @ 110616866 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 876513895089637016046341346800815973135541862207842595180840317860192666546 10843
UVM_INFO @ 1523213155 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 64269135043069377318485192208180985194265418324770240456922957823171529437704 27414
UVM_INFO @ 23036363343 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 103190864822657809763718462374385410909123945014687820344976619987154898067505 2740
UVM_INFO @ 1352145641 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 39884298194970131336359917570710054625045614839767130064797929110352310427481 14119
UVM_INFO @ 2751867977 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 109132728664879749927135380545613464971684494045721242178544768032112903735228 6520
UVM_INFO @ 7681710623 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 62732016740669230936852331506177485657883532859722686875285375966421667517012 1707
UVM_INFO @ 4449448283 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 86127009165687366302586170540653324396317278247567671400383813395410469958969 6627
UVM_INFO @ 3901172196 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 42178052121956238031959293814327180020158065774200111899392084617243245800213 14581
UVM_INFO @ 528734538 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 71553192135929801377926770926330653908952309026971254229744007790594733430187 196
UVM_INFO @ 46352063 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 110750552965579600486886524644532671751508997537068451648450801042962366931163 696
UVM_INFO @ 170321915 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 114325417239116787971829622330097069294266058034138472816809721016227632681442 2614
UVM_INFO @ 287568962 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 17367451519892644975450814611620873678039727772667104759637408168133316913994 7677
UVM_INFO @ 1947918772 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 52788442944476048857403015050884397204764206681085702227239940710564061564137 3829
UVM_INFO @ 1119730992 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 62661936345995221737287688897424478679810474352757475852435849469017426060698 200
UVM_INFO @ 40353776 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 97071247685400050308579747150614829744859961396264124001030760676455061457966 32651
UVM_INFO @ 2755428137 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 108585118106599934011330595789715444973776638887140707717639464716895844278169 394
UVM_INFO @ 88007512 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 101876737106345847935131559317162008327405522156461432883429051518413222444072 2890
UVM_INFO @ 850275699 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 19154993672646306784032735204966549137177290069929779642100028830157058829265 1018
UVM_INFO @ 188778072 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_* 28 test runs
otp_ctrl_macro_errs 74748447162809614391889420129263845425709107949805554082969795457800150331252 10949
UVM_INFO @ 4236340400 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 38890841878073021772923707315325471472857603286769588450289229393253836848544 1727
UVM_INFO @ 1993363583 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 97202484680463646832266467803930075714965845617544377316832806080431411128378 6601
UVM_INFO @ 4564942963 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 73104087334486160441938217405274770412300128793716412713908843946522734692205 2068
UVM_INFO @ 298565112 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 70591083886596370196107946611434087601464964603923051377545534560246816504347 320
UVM_INFO @ 214280994 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 12915126568178445991726765333305386853812949827289287460513807370904246854871 3806
UVM_INFO @ 2015434963 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 16061645775001601549006322516190558751333957468739235425629945946831157741986 876
UVM_INFO @ 95151722 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 28377709297301261114044510395864033597303442157709030073833205788829488502581 18516
UVM_INFO @ 12550462887 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 72987113839537199933386328897459696611934020308496946274562007174115152054365 1460
UVM_INFO @ 81909707 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 114928096854611584754993745639277220873274989907661587183811079752016657880313 19175
UVM_INFO @ 770145693 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 50581479687295260949201897679799886806776844534141926853043545969092024818705 53116
UVM_INFO @ 3425968631 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 48333932890646052180636655214895132610558249834050956372833393875043473669803 1182
UVM_INFO @ 1244551484 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 85333847383044957729554953599038530669661051865117018346812963016238319538448 8794
UVM_INFO @ 4414836802 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 51114332060562060971511180967957425630586806103341315669693639232486628175516 5955
UVM_INFO @ 1997553010 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 85851629944644660416965090498182619147912881043170396126767148740590892468724 7337
UVM_INFO @ 1677235121 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 56710193705153638254578255945362163042434221120930272233995573400732818481069 6335
UVM_INFO @ 1865650087 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 17465902023876131340167102622100676704915236488412231441664887586372383129420 520
UVM_INFO @ 103249528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 34282544985225415514706265118515997822776725115272702262945265497977486244 192
UVM_INFO @ 858519847 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 105509506901333085877966966775093509001520918123549739599452858730936245379100 14585
UVM_INFO @ 1194731950 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 57308341201369886761994215492553732543186024702240208691978608623050216212615 2753
UVM_INFO @ 423710358 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 69405016615451118168885728298343209016598073053739572181535918625047687185908 2471
UVM_INFO @ 6065077596 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 75954050073270510833915884299771420898630512638040072231906954662410677888130 2710
UVM_INFO @ 199816214 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 114594852373973607446757187009821325695596126804335835139827112126482316997063 19609
UVM_INFO @ 621974222 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 87140381724812862126586338756554440160467205015436304714803012409067280399649 1870
UVM_INFO @ 494381853 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 87617438178981967969773769487995458850415632359913870864859924508110761670056 17455
UVM_INFO @ 70175820289 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 65064102647460835961282482914058603687307992174783211921545773443458910592230 12776
UVM_INFO @ 1383785022 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 107337409716745028396822142139673641107565937490201676745839871537719474917282 180
UVM_INFO @ 144245260 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 87247366227600992796042927569070161491241423087926303681512550125707661527943 14715
UVM_INFO @ 1350886896 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:2213) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) d_data mismatch when d_error = * 22 test runs
otp_ctrl_stress_all_with_rand_reset 43089980594882530833110861788667349058280915791142530376377080356073345367768 91
UVM_INFO @ 115330367 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_csr_mem_rw_with_rand_reset 90104249083812776403968564157682527623321529791765204624300331085962449874182 91
UVM_INFO @ 124658922 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 62544100629879595994674465584628392191785343601221575638247221690659687132370 91
UVM_INFO @ 33455395 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 76729875896784551883670513223614427062436697725228307877771669486693040830459 91
UVM_INFO @ 32096200 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 34606219219147292437685196801946452597642448558926298993067948566393307278973 25917
UVM_INFO @ 2897581550 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 53414968706313786392729373606841575770329233557474664799883447932935796342089 91
UVM_INFO @ 32671723 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 77632997623260689767036129325768128802624295869131527555231421499151982853841 8573
UVM_INFO @ 5804641163 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 68053237900357498199694654383252009549791010248581144227491781861603539372509 22779
UVM_INFO @ 9883357309 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 46833401007079648989435022928221864921488895475538477055331784830207479428462 7697
UVM_INFO @ 1436690431 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 102150447688638168530815609577556911676955514407466961656870399472057796905155 29989
UVM_INFO @ 14061086411 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 38766479750071005540869662560553644058549107471413924854744167450879096811700 1471
UVM_INFO @ 192678223 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 19247423585429073998753875351512013723545601549414430654547736964567927096507 10163
UVM_INFO @ 10958741572 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 46716417470296221233867377052641533078453729775926270238175940980802209357588 1681
UVM_INFO @ 506087732 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 111768133546367143051864468533998235405516581909868967647200702783473645063414 91
UVM_INFO @ 120197625 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 47618998699012236881444824901395538757223185062898951958197117259669674405545 38012
UVM_INFO @ 17411961504 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 115043019716937692219210771403265584528686244890064106045571651848320589555769 12358
UVM_INFO @ 2051489937 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 37354595036727680236933958186870188523718410400940042442864378446403535735677 91
UVM_INFO @ 60015349 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 103571675909632866540844146155317145061940818024004347077518569543439547864799 782
UVM_INFO @ 1847286443 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 109752298564015852862646216440645682940932410804336254569785812172426983063808 5955
UVM_INFO @ 3478676019 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 68385396221657359357771580990303979266510434379675872212476420787031891945148 1062
UVM_INFO @ 3153650163 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 56409919628317102668822295349597200262009843310523252471920579658152356580083 21457
UVM_INFO @ 525765355 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 90753607899254037261531197165037480115892632501015175656918901909824853474943 91
UVM_INFO @ 61206460 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:671) [scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (* [*] vs * [*]) Interrupt_pin: OtpErr 12 test runs
otp_ctrl_parallel_key_req 98908035356735741322011700716731450362460256158900294558833100315235869041348 11731
UVM_INFO @ 1453329589 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 35123148113509963631102430231673257850835913346972592550330512364841232054418 5545
UVM_INFO @ 181847187 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 77130335018563704109550558649930855694329459173111964947763135066769688562411 5261
UVM_INFO @ 1474749572 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 73240624292566008185584396905495344694756670814679281750942407906073018349682 8753
UVM_INFO @ 2624726931 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 62165974696198628749447200954473570093463627069792474734044492088446648426063 13746
UVM_INFO @ 16807150292 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 69818325332258051005511579357849779091260496867285520772237768311382414384456 5880
UVM_INFO @ 579251789 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 75187021979951321221448899825512785653391537994689808002776104994285052240991 11633
UVM_INFO @ 1022727196 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 112348963187361577823578068185503788719512420769398416864752200032388644550029 14634
UVM_INFO @ 717797489 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 99144511243037587828919082566480690813770064492869740510183109167424237228772 9946
UVM_INFO @ 705018857 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 51542698206451611005676189167816626105487805069170732834043207646296472842213 10864
UVM_INFO @ 15078985405 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 40429516795477114793607336588573805047031618633491568215807480290395881300998 9874
UVM_INFO @ 1496391537 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 26119039965695658555576374558884642424399465954575086651397449784514182776977 5388
UVM_INFO @ 11171630754 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:958) [scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (* [*] vs * [*]) reg name: status, compare_mask * 8 test runs
otp_ctrl_stress_all 42574464287478875414960630559353064936889873517949918233948305396333140207109 7375
UVM_INFO @ 381739389 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 111125299900204404701381519107421642519666589710069380025614553404226593293010 8127
UVM_INFO @ 322426906 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 104419100522426631551246804252418802868460839165510305874893408474220929808367 4481
UVM_INFO @ 339474315 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 40839138257645236423819630059306976988155005078150981839326697512332518807603 4474
UVM_INFO @ 439399217 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 8020190991099221333352617407901067675012127317114407257369028328715680585587 17485
UVM_INFO @ 2774560086 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 59252143364731603193524143439892153731452668259688641444090685168619100586541 7659
UVM_INFO @ 1349702753 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 29503661510622014526725152619719150467270102065694181689571564882253242184314 9102
UVM_INFO @ 437244836 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 71288032896908546100706951172474352615160778727854398310182366098214166563166 16337
UVM_INFO @ 5587972450 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_scoreboard.sv:632) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) d_data mismatch when d_error = * 8 test runs
otp_ctrl_csr_mem_rw_with_rand_reset 33765043580555413207495172846705559262306909515831606564344877188350806080262 91
UVM_INFO @ 124691678 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 89611913480575505324618002677018310743159709186125636689425676326561588819930 35939
UVM_INFO @ 24351488723 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 26318384520502931367693698719870611713274972874786309645341454974209272055152 610
UVM_INFO @ 324261500 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 7602822343179516777592230416700074330829856674885090898695964096757154499278 9419
UVM_INFO @ 4488460863 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 54309787184925722661069825259304539144005064668608246985846584504910459631512 14246
UVM_INFO @ 23015710765 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 53454869928533666513500820287915847836769068413235298377995882645587451244354 10282
UVM_INFO @ 936886481 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 10379452399521986507847887485097074846598760595265340765695734626214146218034 407
UVM_INFO @ 92791003 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 57432896942276028430300875066164641929591461552907737297345102180613642351968 91
UVM_INFO @ 31368231 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_WARNING (uvm_reg_field.svh:1191) [RegModel] Trying to predict value of field 'err_code' while register 'otp_ctrl_core_reg_block.err_code_*' is being accessed 6 test runs
otp_ctrl_stress_all 94061191849453859553820344034873307683196665114488720164279189326887252722024 2071
UVM_INFO @ 1318530488 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 1318601918 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 1318887638 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 1318959068 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
otp_ctrl_stress_all 103938241082355114654592592480997731677038369677972342120134449199382770260151 2263
UVM_INFO @ 8145206991 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 8147206995 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 8149373666 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 8149540333 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
otp_ctrl_stress_all 23046507190626338398619486715591665550280509611641168615304604765649471450463 10483
UVM_INFO @ 998197895 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 998317895 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 998377895 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 998447895 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
otp_ctrl_stress_all 4367658529763506886560457652501080558443193862087154816729179985563585538748 3575
UVM_INFO @ 1550009585 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 1550489585 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 1550649585 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 1550849585 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
otp_ctrl_stress_all_with_rand_reset 34941658894641339741066700080103048286154707737151699189033464324201061962240 497
UVM_INFO @ 652562460 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 652922460 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 653002460 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 653122460 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
otp_ctrl_stress_all_with_rand_reset 20646511481781389583196332288676980284068369604413276750927499839768649379029 2868
UVM_INFO @ 2415456587 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 2415498254 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 2417914940 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 2418248276 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr *ed* rdata* readout mismatch 3 test runs
otp_ctrl_low_freq_read 17040689222298531928315828041752501256169611867498465475825854948564232840995 89
UVM_INFO @ 69031850101 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 66832583022049344085390308694229203188773060912220421205509983457682089714924 22615
UVM_INFO @ 47684807155 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 22033539032453639145602157611768862712653912302381005860364267491890258457512 90
UVM_INFO @ 62882659703 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue 2 test runs
otp_ctrl_sec_cm 51730447196251063300842562253238358447914590884482625868549982354733270793785 2826
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_sec_cm 63473780557735053138932045546913357353828198003947546511679885360614174545968 2817
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Job timed out after * minutes 2 test runs
otp_ctrl_stress_all_with_rand_reset 114999092804920934567662629984435896089441619116024038630443084408495135421773 None
otp_ctrl_stress_all_with_rand_reset 9361133699212030904654730875111473171461700353193304445332561853945099379241 None
Offending '(cio_test_en_o == *)' 2 test runs
otp_ctrl_stress_all_with_rand_reset 61509634540730709982186170374853481805019225436730983229637628685276963484236 2465
UVM_ERROR @ 414245395 ps: (otp_ctrl_if.sv:389) [ASSERT FAILED] CioTestEnOWithDftOff_A
UVM_INFO @ 414245395 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 3847531775747281283422046949342085553548627019973301769353000146192203076836 158
UVM_ERROR @ 9591595749 ps: (otp_ctrl_if.sv:389) [ASSERT FAILED] CioTestEnOWithDftOff_A
UVM_INFO @ 9591595749 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_partition_walk_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr *ed* rdata* readout mismatch 1 test run
otp_ctrl_partition_walk 13460029173027618743224524098321172875062038123846782893878010611817052729369 112653
UVM_INFO @ 8057179204 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr *dc rdata* readout mismatch 1 test run
otp_ctrl_stress_all_with_rand_reset 81536177253325617892471948749192559077595017284882037602671653572388533442516 97
UVM_INFO @ 16286588834 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:465) [otp_ctrl_common_vseq] wait timeout occurred! 1 test run
otp_ctrl_stress_all_with_rand_reset 34355324111127215895641814964214394116905817168137842673468351989710967227258 105
UVM_INFO @ 10095386379 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1286) [otp_ctrl_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. 1 test run
otp_ctrl_stress_all_with_rand_reset 54314618831523057813617917779563313915825516012625051459016864103265339081243 8177
UVM_INFO @ 18046803945 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:465) [otp_ctrl_init_fail_vseq] wait timeout occurred! 1 test run
otp_ctrl_init_fail 17520539582846860948979441327223098757960754127360300974417570766607267839525 88
UVM_INFO @ 10001743127 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---