| V1 |
|
100.00% |
| V2 |
|
98.84% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| xbar_smoke | 20 | 20 | 100.00 | |||
| xbar_smoke | 19.960s | 596.944us | 20 | 20 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| xbar_base_random_sequence | 20 | 20 | 100.00 | |||
| xbar_random | 187.020s | 4616.753us | 20 | 20 | 100.00 | |
| xbar_random_delay | 120 | 120 | 100.00 | |||
| xbar_smoke_zero_delays | 7.130s | 56.321us | 20 | 20 | 100.00 | |
| xbar_smoke_large_delays | 239.060s | 25119.922us | 20 | 20 | 100.00 | |
| xbar_smoke_slow_rsp | 323.400s | 41282.912us | 20 | 20 | 100.00 | |
| xbar_random_zero_delays | 85.870s | 642.917us | 20 | 20 | 100.00 | |
| xbar_random_large_delays | 1385.460s | 147355.942us | 20 | 20 | 100.00 | |
| xbar_random_slow_rsp | 1791.160s | 281073.714us | 20 | 20 | 100.00 | |
| xbar_unmapped_address | 40 | 40 | 100.00 | |||
| xbar_unmapped_addr | 151.410s | 3461.428us | 20 | 20 | 100.00 | |
| xbar_error_and_unmapped_addr | 122.980s | 18939.857us | 20 | 20 | 100.00 | |
| xbar_error_cases | 40 | 40 | 100.00 | |||
| xbar_error_random | 167.560s | 14881.441us | 20 | 20 | 100.00 | |
| xbar_error_and_unmapped_addr | 122.980s | 18939.857us | 20 | 20 | 100.00 | |
| xbar_all_access_same_device | 65 | 70 | 92.86 | |||
| xbar_access_same_device | 289.400s | 33058.613us | 20 | 20 | 100.00 | |
| xbar_access_same_device_slow_rsp | 3349.550s | 397534.341us | 45 | 50 | 90.00 | |
| xbar_all_hosts_use_same_source_id | 20 | 20 | 100.00 | |||
| xbar_same_source | 138.000s | 5437.571us | 20 | 20 | 100.00 | |
| xbar_stress_all | 70 | 70 | 100.00 | |||
| xbar_stress_all | 1839.890s | 348079.070us | 20 | 20 | 100.00 | |
| xbar_stress_all_with_error | 1212.630s | 56255.250us | 50 | 50 | 100.00 | |
| xbar_stress_with_reset | 70 | 70 | 100.00 | |||
| xbar_stress_all_with_rand_reset | 1848.190s | 11203.235us | 20 | 20 | 100.00 | |
| xbar_stress_all_with_reset_error | 1196.810s | 4901.303us | 50 | 50 | 100.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue | 5 test runs | |||
| xbar_access_same_device_slow_rsp | 93496213286173647790606608709271009090487927257160639033047573341088473907960 | 159 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 100020477763536709799782219259396923472972912288801748886059546796503117210164 | 137 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 65561765446878786315918177721218454492094406360501985317430633982285541862497 | 137 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 70339892783874091392993090593546492561126421339507279877297273956322751219534 | 123 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 79723419167846992623971427947758283188320475048531939956394120555426247551444 | 167 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|