Simulation Results: aes/gcm_masked

 
26/06/2026 15:00:32 DVSim: v1.49.0 sha: 9b639d2 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 97.23 %
  • code
  • 98.02 %
  • assert
  • 98.57 %
  • func
  • 95.11 %
  • block
  • 98.06 %
  • line
  • 99.07 %
  • branch
  • 94.96 %
  • toggle
  • 98.05 %
  • FSM
  • 100.00 %
Validation stages
V1
100.00%
V2
97.18%
V2S
92.74%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 3.000s 61.511us 1 1 100.00
smoke 10 10 100.00
aes_smoke 5.000s 150.756us 10 10 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 2.000s 66.780us 1 1 100.00
csr_rw 5 5 100.00
aes_csr_rw 2.000s 87.190us 5 5 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 5.000s 433.075us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 3.000s 496.129us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
aes_csr_mem_rw_with_rand_reset 2.000s 78.029us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
aes_csr_rw 2.000s 87.190us 5 5 100.00
aes_csr_aliasing 3.000s 496.129us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 70 70 100.00
aes_smoke 5.000s 150.756us 10 10 100.00
aes_config_error 8.000s 868.950us 50 50 100.00
aes_stress 6.000s 93.063us 10 10 100.00
key_length 70 70 100.00
aes_smoke 5.000s 150.756us 10 10 100.00
aes_config_error 8.000s 868.950us 50 50 100.00
aes_stress 6.000s 93.063us 10 10 100.00
back2back 35 35 100.00
aes_stress 6.000s 93.063us 10 10 100.00
aes_b2b 42.000s 701.583us 25 25 100.00
backpressure 10 10 100.00
aes_stress 6.000s 93.063us 10 10 100.00
multi_message 91 95 95.79
aes_smoke 5.000s 150.756us 10 10 100.00
aes_config_error 8.000s 868.950us 50 50 100.00
aes_stress 6.000s 93.063us 10 10 100.00
aes_alert_reset 3601.000s 0.000us 21 25 84.00
failure_test 81 85 95.29
aes_man_cfg_err 3.000s 141.210us 10 10 100.00
aes_config_error 8.000s 868.950us 50 50 100.00
aes_alert_reset 3601.000s 0.000us 21 25 84.00
trigger_clear_test 10 10 100.00
aes_clear 6.000s 155.858us 10 10 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 11.000s 352.207us 1 1 100.00
nist_test_vectors_gcm 1 1 100.00
aes_nist_vectors_gcm 10.000s 228.746us 1 1 100.00
reset_recovery 21 25 84.00
aes_alert_reset 3601.000s 0.000us 21 25 84.00
stress 10 10 100.00
aes_stress 6.000s 93.063us 10 10 100.00
sideload 20 20 100.00
aes_stress 6.000s 93.063us 10 10 100.00
aes_sideload 88.000s 4223.870us 10 10 100.00
deinitialization 10 10 100.00
aes_deinit 8.000s 283.665us 10 10 100.00
stress_all 5 10 50.00
aes_stress_all 10800.000s 0.000us 5 10 50.00
gcm_save_and_restore 100 100 100.00
aes_gcm_save_restore 10.000s 581.530us 100 100 100.00
alert_test 10 10 100.00
aes_alert_test 5.000s 89.359us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
aes_tl_errors 5.000s 1213.749us 25 25 100.00
tl_d_illegal_access 25 25 100.00
aes_tl_errors 5.000s 1213.749us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
aes_csr_hw_reset 2.000s 66.780us 1 1 100.00
aes_csr_rw 2.000s 87.190us 5 5 100.00
aes_csr_aliasing 3.000s 496.129us 1 1 100.00
aes_same_csr_outstanding 3.000s 145.356us 5 5 100.00
tl_d_partial_access 12 12 100.00
aes_csr_hw_reset 2.000s 66.780us 1 1 100.00
aes_csr_rw 2.000s 87.190us 5 5 100.00
aes_csr_aliasing 3.000s 496.129us 1 1 100.00
aes_same_csr_outstanding 3.000s 145.356us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 6 10 60.00
aes_reseed 9.000s 211.408us 6 10 60.00
fault_inject 595 660 90.15
aes_fi 3601.000s 0.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 268 300 89.33
aes_cipher_fi 61.000s 0.000us 327 350 93.43
shadow_reg_update_error 20 20 100.00
aes_shadow_reg_errors 3.000s 121.934us 20 20 100.00
shadow_reg_read_clear_staged_value 20 20 100.00
aes_shadow_reg_errors 3.000s 121.934us 20 20 100.00
shadow_reg_storage_error 20 20 100.00
aes_shadow_reg_errors 3.000s 121.934us 20 20 100.00
shadowed_reset_glitch 20 20 100.00
aes_shadow_reg_errors 3.000s 121.934us 20 20 100.00
shadow_reg_update_error_with_csr_rw 17 20 85.00
aes_shadow_reg_errors_with_csr_rw 7.000s 1024.363us 17 20 85.00
tl_intg_err 30 30 100.00
aes_sec_cm 11.000s 927.900us 5 5 100.00
aes_tl_intg_err 4.000s 331.716us 25 25 100.00
sec_cm_bus_integrity 25 25 100.00
aes_tl_intg_err 4.000s 331.716us 25 25 100.00
sec_cm_lc_escalate_en_intersig_mubi 21 25 84.00
aes_alert_reset 3601.000s 0.000us 21 25 84.00
sec_cm_main_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 121.934us 20 20 100.00
sec_cm_gcm_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 121.934us 20 20 100.00
sec_cm_main_config_sparse 132 145 91.03
aes_smoke 5.000s 150.756us 10 10 100.00
aes_stress 6.000s 93.063us 10 10 100.00
aes_alert_reset 3601.000s 0.000us 21 25 84.00
aes_core_fi 75.000s 10004.975us 91 100 91.00
sec_cm_gcm_config_sparse 251 260 96.54
aes_gcm_save_restore 10.000s 581.530us 100 100 100.00
aes_config_error 8.000s 868.950us 50 50 100.00
aes_stress 6.000s 93.063us 10 10 100.00
aes_core_fi 75.000s 10004.975us 91 100 91.00
sec_cm_aux_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 121.934us 20 20 100.00
sec_cm_aux_config_regwen 20 20 100.00
aes_readability 3.000s 263.961us 10 10 100.00
aes_stress 6.000s 93.063us 10 10 100.00
sec_cm_key_sideload 20 20 100.00
aes_stress 6.000s 93.063us 10 10 100.00
aes_sideload 88.000s 4223.870us 10 10 100.00
sec_cm_key_sw_unreadable 10 10 100.00
aes_readability 3.000s 263.961us 10 10 100.00
sec_cm_data_reg_sw_unreadable 10 10 100.00
aes_readability 3.000s 263.961us 10 10 100.00
sec_cm_key_sec_wipe 10 10 100.00
aes_readability 3.000s 263.961us 10 10 100.00
sec_cm_iv_config_sec_wipe 10 10 100.00
aes_readability 3.000s 263.961us 10 10 100.00
sec_cm_data_reg_sec_wipe 10 10 100.00
aes_readability 3.000s 263.961us 10 10 100.00
sec_cm_data_reg_key_sca 10 10 100.00
aes_stress 6.000s 93.063us 10 10 100.00
sec_cm_key_masking 10 10 100.00
aes_stress 6.000s 93.063us 10 10 100.00
sec_cm_main_fsm_sparse 0 10 0.00
aes_fi 3601.000s 0.000us 0 10 0.00
sec_cm_main_fsm_redun 620 685 90.51
aes_fi 3601.000s 0.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 268 300 89.33
aes_cipher_fi 61.000s 0.000us 327 350 93.43
aes_ctr_fi 8.000s 580.740us 25 25 100.00
sec_cm_cipher_fsm_sparse 0 10 0.00
aes_fi 3601.000s 0.000us 0 10 0.00
sec_cm_cipher_fsm_redun 595 660 90.15
aes_fi 3601.000s 0.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 268 300 89.33
aes_cipher_fi 61.000s 0.000us 327 350 93.43
sec_cm_cipher_ctr_redun 327 350 93.43
aes_cipher_fi 61.000s 0.000us 327 350 93.43
sec_cm_ctr_fsm_sparse 0 10 0.00
aes_fi 3601.000s 0.000us 0 10 0.00
sec_cm_ctr_fsm_redun 293 335 87.46
aes_fi 3601.000s 0.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 268 300 89.33
aes_ctr_fi 8.000s 580.740us 25 25 100.00
sec_cm_ghash_fsm_sparse 0 10 0.00
aes_fi 3601.000s 0.000us 0 10 0.00
sec_cm_ctrl_sparse 620 685 90.51
aes_fi 3601.000s 0.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 268 300 89.33
aes_cipher_fi 61.000s 0.000us 327 350 93.43
aes_ctr_fi 8.000s 580.740us 25 25 100.00
sec_cm_main_fsm_global_esc 21 25 84.00
aes_alert_reset 3601.000s 0.000us 21 25 84.00
sec_cm_main_fsm_local_esc 620 685 90.51
aes_fi 3601.000s 0.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 268 300 89.33
aes_cipher_fi 61.000s 0.000us 327 350 93.43
aes_ctr_fi 8.000s 580.740us 25 25 100.00
sec_cm_cipher_fsm_local_esc 620 685 90.51
aes_fi 3601.000s 0.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 268 300 89.33
aes_cipher_fi 61.000s 0.000us 327 350 93.43
aes_ctr_fi 8.000s 580.740us 25 25 100.00
sec_cm_ctr_fsm_local_esc 293 335 87.46
aes_fi 3601.000s 0.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 268 300 89.33
aes_ctr_fi 8.000s 580.740us 25 25 100.00
sec_cm_ghash_fsm_local_esc 90 100 90.00
aes_ghash_fi 6.000s 421.521us 90 90 100.00
aes_fi 3601.000s 0.000us 0 10 0.00
sec_cm_data_reg_local_esc 595 660 90.15
aes_fi 3601.000s 0.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 268 300 89.33
aes_cipher_fi 61.000s 0.000us 327 350 93.43
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 10 0.00
aes_stress_all_with_rand_reset 18.000s 390.109us 0 10 0.00

Error Messages

   Test seed line log context
Job timed out after * minutes 30 test runs
aes_fi 106026586049490747493374517121262431180101449288294762293879036554943161940871 None
aes_fi 114752020231768548411530958946232091784251714858140531004946551243557991724906 None
aes_control_fi 25460996541623460699375184231285331624666879997476841678119233210892613269789 None
aes_fi 33122548255192544234540848468176237801094769440019823247869551972934394182961 None
aes_alert_reset 18647170510971786467071279656159199323634263785326579131649550595103421986632 None
aes_fi 18856549383878514946004077889723081795250614872212548821627431507814984166481 None
aes_stress_all 326299076515062058257707454411128425320281931850050489789477458195575894583 None
aes_fi 53502391556220282422913451347099253403709275604037633364028009075438601243358 None
aes_control_fi 5274673674347378079850580175338909474295284876464933353586034635442737887835 None
aes_alert_reset 87188096515842038237613917714434000229945104882675639881832380344328253911537 None
aes_cipher_fi 30253635549452959573335900648115681949809751077699905141437267000050701246687 None
aes_cipher_fi 92491111440255859643181098914798872171477211317979316226270282658393776034450 None
aes_control_fi 56332530683901760484131543274496595725514212625110517422880427125609692154348 None
aes_control_fi 49006644041653073345307886012105638490840523187980201593398111402671067137664 None
aes_control_fi 78168365767596376756381599641726650773261410905777810683615322419788795758724 None
aes_control_fi 41646615974057467736632917715969317220007436046052404493052765777682079453458 None
aes_control_fi 45242640041137043300270289217528386775731705434383945183148249326631976013077 None
aes_control_fi 44438478389561349985606488576932803870305763783473522302048582728925785396851 None
aes_control_fi 74739970349890124315035515004026652500676330128802931122023262087317888176546 None
aes_cipher_fi 45826005657545753581575811908269127859748544940922638532746799549236940025425 None
aes_cipher_fi 101819108231646453177290149565330082228656988297573236825671737569391687520886 None
aes_control_fi 60671386430767963022922055749289198719326907401842946029598453402805167562231 None
aes_control_fi 42054920971979104759607103665699491331976407178371573772157726061167390480768 None
aes_control_fi 33075335531122425214607281756259585058117847794513433501566015581515960640945 None
aes_cipher_fi 66047830296637752093470133375075615773900036041160277279026262398118866664817 None
aes_cipher_fi 95970806954284640984721369043272004487112313117170403750917930613998578877612 None
aes_cipher_fi 50721772425034642672621030837543261376057091260061221318619946405764011700394 None
aes_control_fi 68818846771373173531420586829989307717621390909316477355415061521647812453699 None
aes_control_fi 50317138007527231214111138228970669040570271326300105819935728988257575774507 None
aes_cipher_fi 26479016164948442086315580219156065753330227581546054604536324918207877733687 None
UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred! 17 test runs
aes_control_fi 3610427750151805309058642372971924665731368720051915926942704072887071836796 148
UVM_INFO @ 10322002548 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 23227399341080111838100616525312154932861015702094384638276252645999331116756 150
UVM_INFO @ 10017569951 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 60296703059249707747073404350479593872468698852896769280357172804773424358296 151
UVM_INFO @ 10017377864 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 24587695373328633791302359621246527566211317254635404454478140606203120176049 152
UVM_INFO @ 10046188901 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 15768029395286660504308356604964761823285668715692597774059657110976266025011 143
UVM_INFO @ 10024418066 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 50903393789684297955514813767050130310705510360838303060315868907559836140314 144
UVM_INFO @ 10010437777 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 88531169616564760319030128743688907536738375988935449462489381504902533403004 143
UVM_INFO @ 10014608697 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 50625388333306637682189173107905514680210577790010796674435166148245555745819 141
UVM_INFO @ 10017498577 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 109500854587705984824660792583536731253410176034254837782625494024322580611728 152
UVM_INFO @ 10007596103 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 111179287271265308137672611417972733132461688194218396477524971492258202673963 146
UVM_INFO @ 10083909543 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 40369080037713999044194577508186844106165349863234342792146606007921169351744 154
UVM_INFO @ 10060293603 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 103995614361235319925080020542922097247222774532698393968368495161834765958028 148
UVM_INFO @ 10010374610 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 48892795765847555875706891719354006123963223103457784141398381389835698371546 151
UVM_INFO @ 10022687594 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 94850251950816949988518330293017307746177496269740319907479896481557785236740 147
UVM_INFO @ 10020977327 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 12232888849091138242133595516708701555539129709151202261240890032727959788646 146
UVM_INFO @ 10008649439 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 64919413404096838199456549019719137460502756122027669761504971223315540329761 147
UVM_INFO @ 10011435950 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 112428614077172045471352644095059611836274972024133013645401461909907993171914 140
UVM_INFO @ 10013990986 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred! 15 test runs
aes_cipher_fi 12071152875915238272572671548762440491715200941786027251919516477479002429324 150
UVM_INFO @ 10023537263 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 27917246501677043392845351297149650546741831081824194760892700616484611265363 154
UVM_INFO @ 10025575857 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 15889449527364847623659077527953958403096405224347158059656367649055409567616 160
UVM_INFO @ 10014615374 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 81955832822099243660923070064995399435742444379658651579108593812021400476579 150
UVM_INFO @ 10056736906 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 27485748592373047079659265161611564988306876652318214238999288611907536646226 146
UVM_INFO @ 10016285585 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 15000322226590206469017767221761755568248050703468007698968693366499430015611 157
UVM_INFO @ 10011720330 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 50721534276274125659319419898245832568654915754759530879438993201966060025136 142
UVM_INFO @ 10014590982 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 67333812817920836790682883026452913252727056901313876919827564783382079620321 147
UVM_INFO @ 10032134666 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 15980241643173400487166052390469645456236285243838408311450675888533504120548 161
UVM_INFO @ 10006916010 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 45007831699558605842336476968991091602390464399399161431027346744360757756924 144
UVM_INFO @ 10010792281 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 115773300705126281555172030224890197217280709466461756307397111964481655285506 152
UVM_INFO @ 10009589955 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 71887828495862748896079772266316375618574085244457494554693896261795328381608 152
UVM_INFO @ 10018878578 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 72698088784189777177082180615962357161399523985681241661858413968672403969424 154
UVM_INFO @ 10045267375 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 96219161482609233122803678263685947820245735447785549948889962932114789499927 144
UVM_INFO @ 10010676223 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 101176042836356083053259933783930211124452287563469511047511771662230697215758 158
UVM_INFO @ 10009330910 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_core_fi_vseq.sv:70) [aes_core_fi_vseq] wait timeout occurred! 9 test runs
aes_core_fi 62221081436364650910111303686775720745121856644295399516111709814658681574964 152
UVM_INFO @ 10029222344 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 38495726919395749659021532261060834970802183182856766263211846901418735249346 151
UVM_INFO @ 10006245776 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 58710675232382945373224817657537508782273077307085229614215725846693068193085 148
UVM_INFO @ 10003991114 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 42100752784293492936190885701852964896810216584942778662066852466857385731654 142
UVM_INFO @ 10027417325 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 12594693531302154580761469706024975207758019765012879153450338610203568107165 151
UVM_INFO @ 10053521213 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 108449980797726320468898657710421681632869837031249484364166564536451810857218 157
UVM_INFO @ 10021484374 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 78089277659064078296016300946788792841847074684872755631878140442514074052979 150
UVM_INFO @ 10004414480 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 26023044808249825101327254112993180038553141860698102551509993271207267153342 144
UVM_INFO @ 10011650827 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 57385592551926135448946348037222625158802275029454221746134797718995391385207 160
UVM_INFO @ 10004975101 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'parent_sequence' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues 8 test runs
aes_reseed 24410430486258228981957336585654327474857115944069119195683021099027662413451 12700
UVM_INFO @ 315727288 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 109215591402812206987746144124230425324758162256896743369645201149541976351473 240
UVM_INFO @ 1004742696 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_reseed 62608562362670956712349509368912956890264661576269826704865207245012098114556 12963
UVM_INFO @ 41886007 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_reseed 10282181983205407448742832483953259337700167256501736298502652922821032089571 15859
UVM_INFO @ 211355750 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 41349432248168455123653723749928205621943861602228980676051566631560446336030 2592
UVM_INFO @ 76061836 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 55338888101961189404988328465085569623718422763060641293725094069165631728061 6573
UVM_INFO @ 55391042 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_reseed 8860428310823412017884942200681577480267507912836098390780289996897957090213 7316
UVM_INFO @ 101867609 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 56180756480570411817117917780005265902634654461327091111050657754752934112397 188
UVM_INFO @ 102634587 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_scoreboard.sv:926) scoreboard [scoreboard] 5 test runs
aes_fi 6065039309800402962772314358514577407542866134791844903013121150019064444353 5574
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 3
----| Expected corrupted: 0
aes_stress_all 33055453763402626594095442205353783681618374439451138049425539910475639810563 32793
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 2
----| Seen: 1
----| Expected corrupted: 0
aes_fi 1465833293433814066486169665263215247286990429185214136883473716512999809016 22856
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 4
----| Expected corrupted: 0
aes_fi 93673370765589305397916943376097813235346362526599303054733811966407427128938 28637
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 5
----| Expected corrupted: 0
aes_fi 49802951745988337765421693606327110797732654930569200258263388937005528006451 6946
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 3
----| Expected corrupted: 0
UVM_FATAL (aes_base_vseq.sv:87) [aes_stress_all_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) 4 test runs
aes_stress_all_with_rand_reset 113280694321511413501013024840822733003832695210920067857588071740657668668541 112
UVM_INFO @ 2007228 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 89186795134100659462172027028231337882738156471018023335082745664247523766625 553
UVM_INFO @ 390108880 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 15187186991129018151660056309710470857375449520956967505639262622920594407594 112
UVM_INFO @ 7545906 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 111109746377688812400477255362735683089163731624944047596347665924239090843780 112
UVM_INFO @ 11285397 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1220) [aes_common_vseq] Check failed (vseq_done) 4 test runs
aes_stress_all_with_rand_reset 83360687134916802640230130324306385998765064589972807452505439399834592944063 305
UVM_INFO @ 1138244342 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 19560473029978548221497747147218136086152508768040656527806891510447292101424 271
UVM_INFO @ 377559478 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 111140321417086900496964202396343570176416537836061829573079599172546737923161 157
UVM_INFO @ 26328200 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 27369578731335991848541542725404955358768210979464349663757372707915251220082 206
UVM_INFO @ 243794531 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1381) [aes_common_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_fault does not trigger! 2 test runs
aes_shadow_reg_errors_with_csr_rw 46020896104527730129117404159029346309149332460897518092961575610785941960393 109
UVM_INFO @ 44357987 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_shadow_reg_errors_with_csr_rw 35464596103481415349715071907635854439968232522932580382393907438334291418303 109
UVM_INFO @ 51726758 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue 2 test runs
aes_fi 83017376872822721546603829069044774028641827246888175457130699821152862978743 3162094
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_alert_reset 92444200900649855120376738241469378128878489996893248580863837828118918080044 3931851
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_scoreboard.sv:785) scoreboard [scoreboard] # * 1 test run
aes_stress_all 79856498211243869986593133996789987038091230928589372295137961299251174507299 10799
TEST FAILED MESSAGES DID NOT MATCH
0 a0 96 96 0
1 00 ab ab 0
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_gcm_masked-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_ip_aes_*/rtl/aes_cipher_core.sv,876): Assertion AesSecCmKeyMaskingStateShare has failed (* cycles, starting * PS) 1 test run
aes_shadow_reg_errors_with_csr_rw 93907183153517799010941192259067338819669745336812833813541599563914726243502 112
(SecAllowForcingMasks && force_masks_i) || dec_key_gen_o == SP2V_HIGH)
|
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_gcm_masked-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_cipher_core.sv,876): (time 141883402 PS) Assertion tb.dut.u_aes_core.u_aes_cipher_core.gen_sec_cm_key_masking_svas.gen_sec_cm_key_masking_share_svas[0].AesSecCmKeyMaskingStateShare has failed (2 cycles, starting 141857761 PS)
UVM_ERROR @ 141883402 ps: (aes_cipher_core.sv:876) [ASSERT FAILED] AesSecCmKeyMaskingStateShare
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_gcm_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_*/rtl/aes_core.sv,1112): Assertion AesModeValid has failed 1 test run
aes_alert_reset 113215137501774798427175803613848540971721877754071953047963251028779424332469 781
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_gcm_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_control_fsm.sv,1180): (time 16556289 PS) Assertion tb.dut.u_aes_core.u_aes_control.gen_fsm[2].gen_fsm_n.u_aes_control_fsm_i.u_aes_control_fsm.AesModeValid has failed
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_gcm_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_control_fsm.sv,1180): (time 16556289 PS) Assertion tb.dut.u_aes_core.u_aes_control.gen_fsm[1].gen_fsm_p.u_aes_control_fsm_i.u_aes_control_fsm.AesModeValid has failed
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_gcm_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_control_fsm.sv,1180): (time 16556289 PS) Assertion tb.dut.u_aes_core.u_aes_control.gen_fsm[0].gen_fsm_p.u_aes_control_fsm_i.u_aes_control_fsm.AesModeValid has failed
UVM_ERROR @ 16556289 ps: (aes_core.sv:1112) [ASSERT FAILED] AesModeValid
UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=5) 1 test run
aes_control_fi 102056949250800645261176913088959439499641294240472098850263194429861457906671 139
UVM_INFO @ 10075727529 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---