Simulation Results

Simulation Results: otp_ctrl

26/06/2026 15:00:32 DVSim: v1.49.0 sha: 9b639d2 json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
85.19 %

code
80.93 %

assert
94.89 %

func
79.76 %

line
88.48 %

branch
86.66 %

cond
88.52 %

toggle
88.79 %

FSM
52.19 %

Validation stages

V1		76.92%
V2		71.71%
V2S		71.97%
V3		7.92%

20/26 passed

76.92 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
wake_up				1	1	100.00
	otp_ctrl_wake_up	2.270s	842.895us	1	1	100.00
smoke				6	10	60.00
	otp_ctrl_smoke	18.430s	11145.199us	6	10	60.00
csr_hw_reset				1	1	100.00
	otp_ctrl_csr_hw_reset	2.930s	215.047us	1	1	100.00
csr_rw				5	5	100.00
	otp_ctrl_csr_rw	3.010s	645.067us	5	5	100.00
csr_bit_bash				1	1	100.00
	otp_ctrl_csr_bit_bash	8.590s	1564.394us	1	1	100.00
csr_aliasing				1	1	100.00
	otp_ctrl_csr_aliasing	9.840s	359.986us	1	1	100.00
csr_mem_rw_with_rand_reset				3	5	60.00
	otp_ctrl_csr_mem_rw_with_rand_reset	3.900s	265.834us	3	5	60.00
regwen_csr_and_corresponding_lockable_csr				6	6	100.00
	otp_ctrl_csr_rw	3.010s	645.067us	5	5	100.00
	otp_ctrl_csr_aliasing	9.840s	359.986us	1	1	100.00
mem_walk				1	1	100.00
	otp_ctrl_mem_walk	1.970s	611.198us	1	1	100.00
mem_partial_access				1	1	100.00
	otp_ctrl_mem_partial_access	2.040s	155.533us	1	1	100.00

540/753 passed

71.71 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
dai_access_partition_walk				0	1	0.00
	otp_ctrl_partition_walk	126.280s	5571.517us	0	1	0.00
init_fail				204	300	68.00
	otp_ctrl_init_fail	52.750s	10013.150us	204	300	68.00
partition_check				24	60	40.00
	otp_ctrl_background_chks	16.620s	1094.808us	2	10	20.00
	otp_ctrl_check_fail	53.590s	21462.404us	22	50	44.00
regwen_during_otp_init				20	30	66.67
	otp_ctrl_regwen	13.970s	4990.125us	20	30	66.67
partition_lock				12	30	40.00
	otp_ctrl_dai_lock	57.500s	10110.204us	12	30	40.00
interface_key_check				6	10	60.00
	otp_ctrl_parallel_key_req	34.780s	3107.218us	6	10	60.00
lc_interactions				187	210	89.05
	otp_ctrl_parallel_lc_req	21.950s	3620.876us	8	10	80.00
	otp_ctrl_parallel_lc_esc	50.530s	10007.651us	179	200	89.50
otp_dai_errors				18	25	72.00
	otp_ctrl_dai_errs	77.740s	12436.730us	18	25	72.00
otp_macro_errors				3	10	30.00
	otp_ctrl_macro_errs	51.870s	23586.846us	3	10	30.00
test_access				7	10	70.00
	otp_ctrl_test_access	17.790s	3408.892us	7	10	70.00
stress_all				2	10	20.00
	otp_ctrl_stress_all	158.640s	21367.720us	2	10	20.00
intr_test				10	10	100.00
	otp_ctrl_intr_test	3.080s	667.249us	10	10	100.00
alert_test				10	10	100.00
	otp_ctrl_alert_test	3.380s	936.719us	10	10	100.00
tl_d_oob_addr_access				25	25	100.00
	otp_ctrl_tl_errors	7.000s	780.425us	25	25	100.00
tl_d_illegal_access				25	25	100.00
	otp_ctrl_tl_errors	7.000s	780.425us	25	25	100.00
tl_d_outstanding_access				12	12	100.00
	otp_ctrl_csr_hw_reset	2.930s	215.047us	1	1	100.00
	otp_ctrl_csr_rw	3.010s	645.067us	5	5	100.00
	otp_ctrl_csr_aliasing	9.840s	359.986us	1	1	100.00
	otp_ctrl_same_csr_outstanding	5.170s	1582.165us	5	5	100.00
tl_d_partial_access				12	12	100.00
	otp_ctrl_csr_hw_reset	2.930s	215.047us	1	1	100.00
	otp_ctrl_csr_rw	3.010s	645.067us	5	5	100.00
	otp_ctrl_csr_aliasing	9.840s	359.986us	1	1	100.00
	otp_ctrl_same_csr_outstanding	5.170s	1582.165us	5	5	100.00

V2S

475/660 passed

71.97 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
sec_cm_additional_check				4	5	80.00
	otp_ctrl_sec_cm	369.690s	200000.000us	4	5	80.00
tl_intg_err				29	30	96.67
	otp_ctrl_sec_cm	369.690s	200000.000us	4	5	80.00
	otp_ctrl_tl_intg_err	45.250s	24077.843us	25	25	100.00
prim_count_check				4	5	80.00
	otp_ctrl_sec_cm	369.690s	200000.000us	4	5	80.00
prim_fsm_check				4	5	80.00
	otp_ctrl_sec_cm	369.690s	200000.000us	4	5	80.00
sec_cm_bus_integrity				25	25	100.00
	otp_ctrl_tl_intg_err	45.250s	24077.843us	25	25	100.00
sec_cm_secret_mem_scramble				6	10	60.00
	otp_ctrl_smoke	18.430s	11145.199us	6	10	60.00
sec_cm_part_mem_digest				6	10	60.00
	otp_ctrl_smoke	18.430s	11145.199us	6	10	60.00
sec_cm_dai_fsm_sparse				4	5	80.00
	otp_ctrl_sec_cm	369.690s	200000.000us	4	5	80.00
sec_cm_kdi_fsm_sparse				4	5	80.00
	otp_ctrl_sec_cm	369.690s	200000.000us	4	5	80.00
sec_cm_lci_fsm_sparse				4	5	80.00
	otp_ctrl_sec_cm	369.690s	200000.000us	4	5	80.00
sec_cm_part_fsm_sparse				4	5	80.00
	otp_ctrl_sec_cm	369.690s	200000.000us	4	5	80.00
sec_cm_scrmbl_fsm_sparse				4	5	80.00
	otp_ctrl_sec_cm	369.690s	200000.000us	4	5	80.00
sec_cm_timer_fsm_sparse				4	5	80.00
	otp_ctrl_sec_cm	369.690s	200000.000us	4	5	80.00
sec_cm_dai_ctr_redun				4	5	80.00
	otp_ctrl_sec_cm	369.690s	200000.000us	4	5	80.00
sec_cm_kdi_seed_ctr_redun				4	5	80.00
	otp_ctrl_sec_cm	369.690s	200000.000us	4	5	80.00
sec_cm_kdi_entropy_ctr_redun				4	5	80.00
	otp_ctrl_sec_cm	369.690s	200000.000us	4	5	80.00
sec_cm_lci_ctr_redun				4	5	80.00
	otp_ctrl_sec_cm	369.690s	200000.000us	4	5	80.00
sec_cm_part_ctr_redun				4	5	80.00
	otp_ctrl_sec_cm	369.690s	200000.000us	4	5	80.00
sec_cm_scrmbl_ctr_redun				4	5	80.00
	otp_ctrl_sec_cm	369.690s	200000.000us	4	5	80.00
sec_cm_timer_integ_ctr_redun				4	5	80.00
	otp_ctrl_sec_cm	369.690s	200000.000us	4	5	80.00
sec_cm_timer_cnsty_ctr_redun				4	5	80.00
	otp_ctrl_sec_cm	369.690s	200000.000us	4	5	80.00
sec_cm_timer_lfsr_redun				4	5	80.00
	otp_ctrl_sec_cm	369.690s	200000.000us	4	5	80.00
sec_cm_dai_fsm_local_esc				183	205	89.27
	otp_ctrl_parallel_lc_esc	50.530s	10007.651us	179	200	89.50
	otp_ctrl_sec_cm	369.690s	200000.000us	4	5	80.00
sec_cm_lci_fsm_local_esc				179	200	89.50
	otp_ctrl_parallel_lc_esc	50.530s	10007.651us	179	200	89.50
sec_cm_kdi_fsm_local_esc				179	200	89.50
	otp_ctrl_parallel_lc_esc	50.530s	10007.651us	179	200	89.50
sec_cm_part_fsm_local_esc				182	210	86.67
	otp_ctrl_parallel_lc_esc	50.530s	10007.651us	179	200	89.50
	otp_ctrl_macro_errs	51.870s	23586.846us	3	10	30.00
sec_cm_scrmbl_fsm_local_esc				179	200	89.50
	otp_ctrl_parallel_lc_esc	50.530s	10007.651us	179	200	89.50
sec_cm_timer_fsm_local_esc				183	205	89.27
	otp_ctrl_parallel_lc_esc	50.530s	10007.651us	179	200	89.50
	otp_ctrl_sec_cm	369.690s	200000.000us	4	5	80.00
sec_cm_dai_fsm_global_esc				183	205	89.27
	otp_ctrl_parallel_lc_esc	50.530s	10007.651us	179	200	89.50
	otp_ctrl_sec_cm	369.690s	200000.000us	4	5	80.00
sec_cm_lci_fsm_global_esc				179	200	89.50
	otp_ctrl_parallel_lc_esc	50.530s	10007.651us	179	200	89.50
sec_cm_kdi_fsm_global_esc				179	200	89.50
	otp_ctrl_parallel_lc_esc	50.530s	10007.651us	179	200	89.50
sec_cm_part_fsm_global_esc				182	210	86.67
	otp_ctrl_parallel_lc_esc	50.530s	10007.651us	179	200	89.50
	otp_ctrl_macro_errs	51.870s	23586.846us	3	10	30.00
sec_cm_scrmbl_fsm_global_esc				179	200	89.50
	otp_ctrl_parallel_lc_esc	50.530s	10007.651us	179	200	89.50
sec_cm_timer_fsm_global_esc				183	205	89.27
	otp_ctrl_parallel_lc_esc	50.530s	10007.651us	179	200	89.50
	otp_ctrl_sec_cm	369.690s	200000.000us	4	5	80.00
sec_cm_part_data_reg_integrity				204	300	68.00
	otp_ctrl_init_fail	52.750s	10013.150us	204	300	68.00
sec_cm_part_data_reg_bkgn_chk				22	50	44.00
	otp_ctrl_check_fail	53.590s	21462.404us	22	50	44.00
sec_cm_part_mem_regren				12	30	40.00
	otp_ctrl_dai_lock	57.500s	10110.204us	12	30	40.00
sec_cm_part_mem_sw_unreadable				12	30	40.00
	otp_ctrl_dai_lock	57.500s	10110.204us	12	30	40.00
sec_cm_part_mem_sw_unwritable				12	30	40.00
	otp_ctrl_dai_lock	57.500s	10110.204us	12	30	40.00
sec_cm_lc_part_mem_sw_noaccess				12	30	40.00
	otp_ctrl_dai_lock	57.500s	10110.204us	12	30	40.00
sec_cm_access_ctrl_mubi				12	30	40.00
	otp_ctrl_dai_lock	57.500s	10110.204us	12	30	40.00
sec_cm_token_valid_ctrl_mubi				6	10	60.00
	otp_ctrl_smoke	18.430s	11145.199us	6	10	60.00
sec_cm_lc_ctrl_intersig_mubi				12	30	40.00
	otp_ctrl_dai_lock	57.500s	10110.204us	12	30	40.00
sec_cm_test_bus_lc_gated				6	10	60.00
	otp_ctrl_smoke	18.430s	11145.199us	6	10	60.00
sec_cm_test_tl_lc_gate_fsm_sparse				4	5	80.00
	otp_ctrl_sec_cm	369.690s	200000.000us	4	5	80.00
sec_cm_direct_access_config_regwen				20	30	66.67
	otp_ctrl_regwen	13.970s	4990.125us	20	30	66.67
sec_cm_check_trigger_config_regwen				6	10	60.00
	otp_ctrl_smoke	18.430s	11145.199us	6	10	60.00
sec_cm_check_config_regwen				6	10	60.00
	otp_ctrl_smoke	18.430s	11145.199us	6	10	60.00
sec_cm_macro_mem_integrity				3	10	30.00
	otp_ctrl_macro_errs	51.870s	23586.846us	3	10	30.00

8/101 passed

7.92 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
otp_ctrl_low_freq_read				0	1	0.00
	otp_ctrl_low_freq_read	125.630s	62656.152us	0	1	0.00
stress_all_with_rand_reset				8	100	8.00
	otp_ctrl_stress_all_with_rand_reset	151.740s	48638.304us	8	100	8.00

Error Messages

	Test	seed	line	log context
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_] Check failed obs == exp ( [] vs []) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value:				110 test runs
	otp_ctrl_smoke	39699930709286927875824408470188421320623262017345308075012080085603121764963	1122	UVM_INFO @ 62122265 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_partition_walk	11518334425657655618617428181647375568877350786096266872232536035372349499966	160055	UVM_INFO @ 5571516577 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	8548531136261393821138055222514288444922503213993162823432413423775171376991	2746	UVM_INFO @ 93569623 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	21528914707162885230110462338071584736956052807024330256406005478640504467355	225	UVM_INFO @ 553476497 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	21178364770255892408386405420055164937569126955975307750030964076750911807033	225	UVM_INFO @ 54143817 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_smoke	88377188533989820152436780077208653551654432428305274676667802239493855821518	1352	UVM_INFO @ 264685237 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	74095849155232733292494155002212719084891437670778129873380043783511306607366	372	UVM_INFO @ 39477631 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_smoke	96702022645606588707930794096749329907199890035975768558326856157600303696651	7616	UVM_INFO @ 4162768445 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_smoke	67724104410764507733400303067307826228346003916971303692316148465529376771113	3302	UVM_INFO @ 109228004 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	89564062395207466613677895757061853151783307873359335770574532533005042320343	1405	UVM_INFO @ 52941878 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	2926238216047800460562186827729548764301954719701613598133767501394945825897	468	UVM_INFO @ 94526621 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	77498541378185813880751111291906136006352647006505568586183096196024262939302	3040	UVM_INFO @ 88510828 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	80241451374008083101891310309566278872431636672391452950450465728367703062766	3200	UVM_INFO @ 1666987079 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	51602213505465301322109641356971935493341581570552690723302650681782892358022	3922	UVM_INFO @ 406700121 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	112462320973585771911739193933661043347870714621366298438401578006585303866815	139	UVM_INFO @ 136348635 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	14680214047746617265310771140241128027297002264246761030934403263841570723306	570	UVM_INFO @ 1052400117 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	70042042306720826002832361213177980277711054166388910973923324435158403020615	183	UVM_INFO @ 36982105 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	77779880431369800274265338936812842452046011764618079845779405896892068030352	393	UVM_INFO @ 55669167 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	83451198282319114693781908162187763112687559554209242010043985951160731827277	241	UVM_INFO @ 170914569 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	20296182054498192418546909867249694137805877558352968413406503019900369142028	1058	UVM_INFO @ 120840718 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	88422766247777883791737941172821756448143932238621216035029295314995671691244	1344	UVM_INFO @ 140104214 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	49598712729224913653785726070578802870905282992542402014100515425223264018681	3338	UVM_INFO @ 198570875 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	36104875938941990367130296138308358648256350889729462108045636430230101180180	891	UVM_INFO @ 724362574 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	99146627593511090680355302808454769838198398505614767670159790990446126944752	141	UVM_INFO @ 842352895 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	101439544769437950804597572679151981336072786209349988268185990779908983459063	2431	UVM_INFO @ 139806299 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	55603075865639293238611414151857376583291287961017149489800691375290445755263	1665	UVM_INFO @ 1104736681 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	26681768198367877654880311361460281446380448975872212847044036539748884584479	1077	UVM_INFO @ 83315209 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	38136626238009921939581052249878874686111639824865686255712736252919531099393	1527	UVM_INFO @ 230998052 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	27616060220075928663143289997279903247069333523222638626993377190684817357025	351	UVM_INFO @ 703381883 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	94582130890411582819846853755733772875689258252058811730720677920768653451316	99	UVM_INFO @ 63065489 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	52662419885342310785380679515426728048938915589404832049177944081224238608750	1613	UVM_INFO @ 1160478609 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	54912003489073613187799143380359398082348622058794741842108823135145454512219	1831	UVM_INFO @ 139116020 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	105229718818673746531560723710440976325353000923580916027785881011856642992166	181	UVM_INFO @ 243832442 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	111784647478824055421131331621861271752687443601336865292663454918844399368611	1219	UVM_INFO @ 101871407 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	109020718780874881882672559838894031017335326516330434875805127402585142672583	367	UVM_INFO @ 197344235 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	114232875099302275014909371635708555447634932440315603323393633240490469805457	859	UVM_INFO @ 159911523 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	32360793325449191006991918051518376299924801457995677522741272235329129952396	2133	UVM_INFO @ 1064421798 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	6414254713778916832956006972794316218795843519379784733079231584582685190154	857	UVM_INFO @ 78761989 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	7652578611759914241584598539908423858799991498505318757662484653390492045415	331	UVM_INFO @ 580070199 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	13577572070248481358687289777894476269434415961358900265255145932841646257155	557	UVM_INFO @ 42395061 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	53683436668037008114478637999693996253335821852165822977949814751457094708432	1159	UVM_INFO @ 194318476 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	48944857651924779835513098072006643516949978624045219985824708357214548839661	99	UVM_INFO @ 42746767 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	63577812595264976464018132926789026447428430430720524201494736630941665184853	307	UVM_INFO @ 120455515 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	14689268078210129892719886886960576646763575655209571234484678533181607780794	2299	UVM_INFO @ 155695229 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	69663574573968670205915485153175691727362388520267098934921509201612306623772	535	UVM_INFO @ 83309507 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	81714446999424471756781209092737882256624772646113932515454138060161736576639	985	UVM_INFO @ 259176981 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	31972153212021204500736698355584218458035372356675549422909104513942018645645	243	UVM_INFO @ 62522118 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	85833931046109586260178014174457442525374360917680898469444293196426024072469	1069	UVM_INFO @ 228847749 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	87287744319234734964004655429079872366278625054471281288808970107726892167967	1167	UVM_INFO @ 98783156 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	29897683066702212536217508045706690894631029933036834582169271609547569960296	1301	UVM_INFO @ 1231709518 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	35866593184463813904655276470901970525433768730523501266202628633379913423518	407	UVM_INFO @ 73608620 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	100414943735592005662398440216184156235138089374763315162222184720472806797076	1819	UVM_INFO @ 65494066 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	63048127768033052859661391547848268537852078418798012262010079737288643117984	391	UVM_INFO @ 886748880 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	7780576650387869508418746935987390997149220583946558899995710410739412620828	2123	UVM_INFO @ 1070440699 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	18676590270006518910062026215027570699519007429977021144289518759218827212044	309	UVM_INFO @ 137940224 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	40550522316264900852882134410525851627390958036863446495240670304556008797068	309	UVM_INFO @ 181637633 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	40659132681152262816512465626235379761450268658670841605181529917275041587002	199	UVM_INFO @ 33239966 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	84095101530419553302135771049198002972212855928852940713867827284048303591328	465	UVM_INFO @ 38507908 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	110164237442785788369872783358491320453099217051620352876400426185222967207979	929	UVM_INFO @ 187163307 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	13484362340038542869420283907406053301696577582292418940384465325150677893483	99	UVM_INFO @ 32015683 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	70799285886362688781422623338462774066660158127186794313461178676799333785564	1633	UVM_INFO @ 1061081014 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	15353558768655410779078674339996747160436094188147638097437824231738735478299	1931	UVM_INFO @ 995505396 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	79450896268561861369771747200244728012837927024307320658420761769499039085345	793	UVM_INFO @ 138735377 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	39761909573010691015139405337775343944877550567972133959004609532989243824263	1313	UVM_INFO @ 105499914 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	38744631979253984694018478741350878048928115429033817668039968897740377849111	493	UVM_INFO @ 39886502 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	38841314507724590210318673108396010046594853396124393661835035697823630304006	1167	UVM_INFO @ 801359739 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	13351962826548162552168801929253490879637209508871717278191098239565753554710	2545	UVM_INFO @ 72356461 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	26685588403630140564189295229607296012957392253440123494618255375830588621406	791	UVM_INFO @ 44143085 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	76313744508559197514619974753023465760925185497908682563482672839966635121324	1985	UVM_INFO @ 138246394 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	28079245909299670944698223262230393999935068021823491089986242196470619132767	633	UVM_INFO @ 103037241 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	82189789472937105593690299511604538593474300645050366473604220869984085418053	1089	UVM_INFO @ 75585087 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	6964443368553304400323753985172895640115120911964741480747517414263970643001	515	UVM_INFO @ 40021329 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	2554741228641366830696644330552269910533936992463067039081855157406449152345	141	UVM_INFO @ 656384348 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	75208880717170231794964081714103361608262365411607615135607376681619436883010	1093	UVM_INFO @ 790935368 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	15131999759019667882244784830425871000193537807644880312689145820936728316764	483	UVM_INFO @ 186085653 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	85899183399081581150752779774321161189409122284283937931075046965190772068251	1907	UVM_INFO @ 66383276 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	64392789394079265539734788835181368756327684937277934202681814332102069381391	2269	UVM_INFO @ 267113109 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	15683974356217512580116594555693022952667660673596676088220086528459979712434	1531	UVM_INFO @ 1352021801 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	100487045415972552646519545587327036573023054910363108193798716472901160490358	677	UVM_INFO @ 167129569 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	4022349455010704291281492304325434025126040212284315480947077864686937402754	477	UVM_INFO @ 128935065 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	51789865106177452132921369699427118266356170487148529591430312563378284365416	633	UVM_INFO @ 73312359 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	18479827146383370988472326590047116978885936317978617347258779490283478028798	1071	UVM_INFO @ 273029529 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	18497480177951024091680603994523297773906431868520144497244963109981323353254	1487	UVM_INFO @ 254528867 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	32375043267212875334501873620036315536957807310467107552018700030516897144354	99	UVM_INFO @ 62225070 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	84481452276922674523204404634388926298142142228399342045975339462612831493837	2215	UVM_INFO @ 143242657 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	48014844728354806024051758890162944346678558533552930730894834560174536085168	267	UVM_INFO @ 132215748 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	31656280066050706560345898248355155459888084199121856089624337957282243763321	99	UVM_INFO @ 40108293 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	98647028885786187129291352679061663666831489481919275320848163299445516159190	183	UVM_INFO @ 35064715 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	106725721240341314368434910044420360296824067802936265318350638453368020645396	593	UVM_INFO @ 68572019 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	95064167636858384267016005090154296803731005851234012316100173397276406689648	717	UVM_INFO @ 694380734 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	8556507618291754959746774352767089316334095984639255618432907677057646343774	141	UVM_INFO @ 126772688 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	57588437192918760385616809405845553281283346612205466782070363738370610873081	1181	UVM_INFO @ 99301632 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	1024578189417305761541345655319311485627930558902351321378994873941446261307	99	UVM_INFO @ 42674074 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	77354606638996003249949033780118977713040666227607984804478935500003310909312	349	UVM_INFO @ 64272398 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	38334085753980625949123591897192568007053805257448170813148886148314707857562	431	UVM_INFO @ 129471534 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	88834240934204359495177184323266258935487686732982354778885072261677568945381	513	UVM_INFO @ 84181579 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	87406602886165694856431577813590830580573013028658304663385493475976595918599	323	UVM_INFO @ 93668458 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	38995985434756748772955394972884502842128994593100598335674149698235861741785	531	UVM_INFO @ 208796381 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	53707627207095239410981232082575664294158389464321545213843003916969413571135	367	UVM_INFO @ 38588884 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	55675039140871759628918961410905637591631114182935889835941038910580870389313	265	UVM_INFO @ 58999014 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	6743121650909389051694231023633521964113849878531523966683087862663129984971	1989	UVM_INFO @ 245542155 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	61957023883354465281151071197650482032885357476500106103704865940407835527181	609	UVM_INFO @ 72018829 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	30263654006448916919367017366084734943895269006914261240891140256059356038142	1289	UVM_INFO @ 145387033 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	55720248603380808665843722814814525578855589455513755054371479092214312272935	601	UVM_INFO @ 132365447 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	15886083869493276742541006846900658682971337074214831618449501855548183733075	351	UVM_INFO @ 83744822 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	5592007002136048620108324021333353954447753403660308712914270130101579340595	1097	UVM_INFO @ 73675144 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	80492253265325508710962429704315108977824851395367692890316461601804278381093	265	UVM_INFO @ 72955662 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	86990891735625023694612596340978587886767971594770009007897377739327710160855	1461	UVM_INFO @ 1096748015 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	106082718519202330371588676481044504420517679731170222808374040405802938941761	141	UVM_INFO @ 573815879 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	105321417298238401790866821460118719092121010395835473777908724960536566089061	1813	UVM_INFO @ 979391556 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs []) reg name: otp_ctrl_core_reg_block.err_code_				75 test runs
	otp_ctrl_background_chks	80738982605272096561291807868708056743103166015715889949474698545607338236502	1050	UVM_INFO @ 214121036 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	5021404498291122640074000548880874747462862996717024822768862505558631543475	5139	UVM_INFO @ 310292393 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_req	35550669023125667203041764009859048646095633709086559098287784694590645882034	2196	UVM_INFO @ 65305099 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	84102781593090964310995428938451634130263081199288098800473326689703012084200	1044	UVM_INFO @ 118135878 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_key_req	102485147745772770169625394907476520573783454220187217580941422807171593440276	4274	UVM_INFO @ 1656184492 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_background_chks	18995406432115348110196943351764179614287777810347359220917719825253634533903	1836	UVM_INFO @ 687631537 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	64785055377841775118183154875929704807700778868266697578060922113623179648520	6499	UVM_INFO @ 470045719 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_errs	90302787649535278708235698671841939622067870634922601687034798734745550058501	9410	UVM_INFO @ 788497510 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_key_req	100657281756642272636497111468803694042477111968042112628323088776622659738358	2956	UVM_INFO @ 1232898326 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	4273049650031985037349189675026166037752778409517696243941652959712531405486	906	UVM_INFO @ 66334532 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_key_req	100970916186183355636542779639750848781474214542335077498800186993736177391576	832	UVM_INFO @ 430923852 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	89443007178815040431785327112990521526711600780244101252796992499712810654317	68325	UVM_INFO @ 48638303790 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	35025427440998769109837916816205692403256575587705614083992286076595044172543	3040	UVM_INFO @ 626312993 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	37244192467100520039061513882317598999654809712577363820122372171153823122747	538	UVM_INFO @ 79569028 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_background_chks	92470150619085826172151689478254377491145085708717269957280470105117780057624	2955	UVM_INFO @ 305601880 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	29286747301219891051777298623571276057061087061480660760500748836579343862445	2368	UVM_INFO @ 116850010 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	102096122234086214330440811183801563644927593339527561820256441206995000408505	1116	UVM_INFO @ 161766592 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_background_chks	42358817692650541452782344551754937639302788708442931408964607038974661907090	674	UVM_INFO @ 259418055 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	104566537696418897836711076389092984939213131071063079383139650411865142945473	5303	UVM_INFO @ 712324598 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_errs	23586833614188669645762841315529478583242915047078711131206073033270687536489	2590	UVM_INFO @ 414726517 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	48114429689000529520702832238348238608431434706340737050079403861061054407889	4660	UVM_INFO @ 811506422 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	5785412473639418014445882554099068249295196432832387550281842847966934840871	8919	UVM_INFO @ 5455973579 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	52222105148839050744095918138649224949028195307125666297642680445650652954605	211	UVM_INFO @ 112021285 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_errs	8169139868425036137968625741950393229538214555464823659978286104184321114413	4106	UVM_INFO @ 375940591 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	90126891949362522209698114595079735416805726644663129257132972011597474084607	446	UVM_INFO @ 69373528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	21610559787418481271616501382197265069280877658659479102840052105742532404282	2106	UVM_INFO @ 100261524 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	81246234174946471490524555755025654489270826795326364106954415802187314686725	1204	UVM_INFO @ 793530253 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	35953844109380919215430964007711388300448008184468250134197323369270884590192	260	UVM_INFO @ 134568819 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	79715399148482333792821286594802333034704885741952564903217324569014478836648	2736	UVM_INFO @ 197148203 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	91351938319636167923487531195943939942919837723103943420537068772403076548000	6477	UVM_INFO @ 2936949103 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	7184255303409479655098783424876545333733446158705191877524349383519283725330	1628	UVM_INFO @ 2197265909 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	90467883401435069955170976371522511869638865023345353917830238839767837405863	9019	UVM_INFO @ 716212508 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	20753265172684921252921096445537709134144055225915475619549426155084793406732	1786	UVM_INFO @ 638212539 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	78689691239910005825099365152354578222678778969532801867541108416401966005031	344	UVM_INFO @ 406501382 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	57976505224982990984656657515543872758638474082847984566647362309927690347923	3604	UVM_INFO @ 528709140 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	24655070986745585032753861452591455561472207113334102553896982327246086699061	3721	UVM_INFO @ 147074350 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_errs	99615739481032770024976489093671397861193324305417030485990831095111199048304	6330	UVM_INFO @ 407390594 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	58394929366792697105286844905664369750036986693745687614463363631977035170202	2836	UVM_INFO @ 211087106 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	112196842792782649817208216281817740968974368005997236773940984054174360823319	22203	UVM_INFO @ 20093665809 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	57943537960296171042611152174468201976477747028317803729304948372107406064595	18723	UVM_INFO @ 20505158188 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	31177694789922038987581126228191937850357864018760383682818616679853393391228	3629	UVM_INFO @ 651659868 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	58859108218612131899097109869186326300182046964752209854096904385891615253682	5043	UVM_INFO @ 1749801793 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	320754046418922491461710874496913776713307185294162832700787579011650985505	3084	UVM_INFO @ 321454230 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	43445598286548998690800369297048577575461717999849276758418358554930401196926	17813	UVM_INFO @ 1787540745 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	77172613196112253100382680754526623206989502319667741076950362328482598868689	2590	UVM_INFO @ 6706358329 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	115474181903027305766277303022822333245498410203936591731642199235467818131971	16773	UVM_INFO @ 15019782328 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	88265785193948558208920041706247174343131568615623479372008028899714609777004	15884	UVM_INFO @ 21462403600 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	111421439406052308030058726949668226843282095204721781053472254335792228850209	1896	UVM_INFO @ 68188454 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	81256903166314750366180460943012178332243924142212531820393990427098891296008	2976	UVM_INFO @ 100093612 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	94929662906720550275613427910379850519503578650182600936798699676655400015627	1324	UVM_INFO @ 162375222 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	63118002587279120415476373774601756753602172303871228065244081363617654064417	3364	UVM_INFO @ 836745216 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	35177879316402272809759600392860019101924720103785914636225379471109751772957	1522	UVM_INFO @ 102934663 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	32185354963612954057855523008349437235677028648203112467763975744983369488830	3392	UVM_INFO @ 9832736860 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	104000484363797276108866927350137483735076491853987360395359767382213491682228	1592	UVM_INFO @ 240172258 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	63236677906105304356606063785096608467409555112228738875159547226874663376739	496	UVM_INFO @ 142868325 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	16373877506712209673003151641700266121680865649790853259970127298915352640812	12490	UVM_INFO @ 5446019697 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	70175964825345265119196167228534661867081123772416442493544141815876684361225	536	UVM_INFO @ 77500744 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	92304583200141059095207908688878742802022301911942972243889463038870048471579	6092	UVM_INFO @ 4938810148 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	68226780230404668661557199315813347687348114814948249481800119720769209010024	903	UVM_INFO @ 345233592 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	24723144301024180950357343954683511392611031636357461121650615220928102383947	570	UVM_INFO @ 151708423 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	40909208716919186951140677316171381774599333770302538726464671210013572076139	8638	UVM_INFO @ 1015737145 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	114763139877500594525564340115239072814862963453318162689610079344139899784024	1293	UVM_INFO @ 10685319107 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	4122086404147030010003433920734286078112857185985455776376534598929966146633	1940	UVM_INFO @ 72746788 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	87736464501708452171152481889277867005738034335874526773326990790800125768575	752	UVM_INFO @ 166561203 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	107324866172204003002002847162737892436559879402796535916471022032016668465743	3134	UVM_INFO @ 581768663 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	86672751665190076205402088335838973922846933269213908858029741555205573649148	1932	UVM_INFO @ 251536834 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	44589835707770243689468469880127960551357370865547127695026359736645813553464	1350	UVM_INFO @ 74919336 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	58780435825697646405884311730095690955447388696837652907707859176225121177088	576	UVM_INFO @ 246781122 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	90344726680478532112374159518326589841237329259287741854393807243183459768351	614	UVM_INFO @ 342704835 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	93882274422433305731990983654307564122122893988988251763306739512441947274903	1402	UVM_INFO @ 53158829 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	107693243367126960444162355740468837030320616286959146010446802734070709946333	160	UVM_INFO @ 588144476 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	64183742425757022936471099703812918581098592870154858281847475353962120589348	902	UVM_INFO @ 300362962 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	30083902187508294054972236952631959989343824558903087799493608795824689095374	1396	UVM_INFO @ 532642413 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	2861880293181038269276455540027806628609191379942176159144452649473478257980	918	UVM_INFO @ 100593870 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	13188313549930095186560535862121401251671128423383489250085899694714830599419	1304	UVM_INFO @ 96121642 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs [*]) reg name: otp_ctrl_core_reg_block.intr_state				35 test runs
	otp_ctrl_stress_all_with_rand_reset	38267203712221859109842420406316352635742799513182383973926088548784581860694	1689	UVM_INFO @ 415849346 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	79972217366192924808324365608653987842542616651723114383103177122788647216731	4400	UVM_INFO @ 1340486263 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_background_chks	26328450177043198928859417675461273429896829781391065343550695452109200888350	9669	UVM_INFO @ 4151326287 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	38929879723596957808634914537779344375960522785446108232488210392047052325813	9717	UVM_INFO @ 3323979357 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_errs	73359705085878563789643554031194532342178559983664756102869902506253844273492	5024	UVM_INFO @ 161630087 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_errs	11004013615559622113431318277379696283158786063293895181934005358477775503414	10292	UVM_INFO @ 1419352806 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	100396408278363575661815909771673070017112362857239475040735281376689392296590	13236	UVM_INFO @ 2285726326 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_req	13793769762378212914036624408105442707061078402710686539753559537365693720895	4309	UVM_INFO @ 185568276 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	27810035186852921180853857835554864108131495273773943867626655092186532501809	9343	UVM_INFO @ 1843184768 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_key_req	35943474615771712343060418514071686470086938773282571308519691150590627600028	8115	UVM_INFO @ 767910066 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	17233651358098365905972517533340286608755831326220618905819930374162124193694	2930	UVM_INFO @ 7953804992 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	23065701054600434159965041260251971349067056636944903504640196290194557861768	518	UVM_INFO @ 187547960 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	115714788912178891503670575062506237675733871659814334405652605572876126828809	1767	UVM_INFO @ 1089446804 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	38694588026906994732751853010195116519020917185885995790949617315225012881036	414	UVM_INFO @ 90202073 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	56153298561987151432155750370126618074624142400844368269282157032733540906219	14350	UVM_INFO @ 19327576144 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	53922052263833282694402499810736050802795171761506145550409385430017022489014	7010	UVM_INFO @ 1433939773 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	84857194563654909673351199297704852848622005017744621304137673927682927685896	5656	UVM_INFO @ 506689675 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	57225113141450219509060244339323992463487865036278141034654631842560812714261	2738	UVM_INFO @ 2133532630 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	32699870203516920276440463631646176938454924907823069181142522335361050588187	3584	UVM_INFO @ 2522287661 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	5804523559498482934010677537278518765987954949625371776041005192447166950943	6488	UVM_INFO @ 1165156898 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	82626436418078843498908057136235812519332596076775603181107139699651333120884	182	UVM_INFO @ 727223049 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	25834463776644182085117754284237359291777646403761394992075075263133613293385	4628	UVM_INFO @ 1177122602 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	87547376810181875672867338144322381617982564220778667661498621024145130152813	1220	UVM_INFO @ 17302009247 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	106409392821570592714451437081746802591607356285514495614187757006454191103795	7885	UVM_INFO @ 28162754213 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	50125207819443289009987338132191709487102990393232765490391807825309199542355	5067	UVM_INFO @ 3572853335 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	10895906016098556379202867682221663785808844266238427790771780786670694929411	3601	UVM_INFO @ 16375176157 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	46260756663907108261608074126217952555930993047525687452725217962865079852781	1611	UVM_INFO @ 2931657718 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	113467442084271296974253165028805209812153731844234307850392378188794888010819	3368	UVM_INFO @ 2558300739 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	81166747157615028006545458171529045875541550626110061756636341204549810010965	5071	UVM_INFO @ 3548390211 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	97502615946234986179478758812152737461578425051789264597726259718569080864283	576	UVM_INFO @ 147623986 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	86672672568683686738265730782597111662024421575386595095863429102059342411446	12813	UVM_INFO @ 1140024314 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	3926448953828556880417359606229395673014463779410038113261468376641416255741	170	UVM_INFO @ 79912868 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	78190401272926351896269376091012808597688189307637047202900493379135842434278	193	UVM_INFO @ 9450960166 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	85134724919550995657535154614376420597146497249247189773984567755835494233916	8070	UVM_INFO @ 6185545802 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	93971375707256722497466929602763608516100830249734232563133513867650426894179	3301	UVM_INFO @ 512339357 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs []) reg name: otp_ctrl_core_reg_block.direct_access_rdata_				31 test runs
	otp_ctrl_check_fail	92249156923381287343446621816739046556775384067718510265542421720930439517024	1338	UVM_INFO @ 3692869105 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	96918405649016405883229730954601487327615387104730360441644908713670307641232	8515	UVM_INFO @ 3779639728 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	90104741851476611310587394666767857942303101650384852777966858786585066900302	18122	UVM_INFO @ 2615085249 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	74913594739323439071237076195036477449259656320951798431260276464544387612688	462	UVM_INFO @ 116533675 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	72865000300049722363802829738540916702644845644647386378668599001087753060866	2708	UVM_INFO @ 1139435171 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	74681095711781325746054576161337285104640299206527233893971550231765897622691	2442	UVM_INFO @ 87577196 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	51760026418473402088686110857675956899190528490375731384653259179844016771623	646	UVM_INFO @ 168443569 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	95767801986339844215831595023170881165926669904139444461107950985635710382205	440	UVM_INFO @ 1065348238 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	105999087038106357764703065185126482087515494498019038010455963545991702428577	10157	UVM_INFO @ 1256436978 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	88305158736459282993479337871791813668084250307730618523642290907461320084292	4214	UVM_INFO @ 1460141781 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	41457010041478728904214623096709788923726365394407071892629705290519129192342	2643	UVM_INFO @ 519561357 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	92066446625682290523032447376972705461306908556641658087096669246388851987559	3736	UVM_INFO @ 1065189274 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	18267335879381950360177559946352908949660088964195380420955187252689155739410	3024	UVM_INFO @ 195739568 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	34336477908297563475478831213847359563555779746981496774255885437484946952189	17773	UVM_INFO @ 2974297940 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	30144187706583727257306807891921735909648469253791153680772784381701825847114	272	UVM_INFO @ 88293364 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	114926384400298457347503604011189451386395756698213338755602929963185896378855	962	UVM_INFO @ 253591563 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	64615112200293768214256340761005572649751224295567173757844585379414318568569	650	UVM_INFO @ 135550260 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	20485172749571602207765423842138305168881493576278118607519679473786784495326	3527	UVM_INFO @ 417748842 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	54828688562971361660951370189738511039437801861852863552096051333944650156621	4327	UVM_INFO @ 384798604 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	42330310103417588244909253367799701434075948977629708385171831913006165164584	3460	UVM_INFO @ 1642749152 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	74842606007084827931140214746978882141707679685466838599971570278794588251667	260	UVM_INFO @ 83988133 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	15120831225052240655005394946598802498775716609515735750747590875918525504059	4221	UVM_INFO @ 300235971 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	12376468082113766743816615469729600452147804633236976840985257031122535853283	9274	UVM_INFO @ 840939876 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	44827750409673519434112080931543733167136840263337971606965671034069557198459	3146	UVM_INFO @ 321736283 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	37673036711883878072204159280737857979170582017005217139522815681155000667444	3693	UVM_INFO @ 2161981373 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	2354476782591588092800677118621173154682424333241319650405063667661864832674	8127	UVM_INFO @ 867724939 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	19630425386646956515797764171153447351325295705694070869961780406243569271372	10347	UVM_INFO @ 593281786 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	27765627506850432647240830647916039313723606256882630710577369624894760821581	3974	UVM_INFO @ 10255556936 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	84707493767056583809330841300934119187657110566369721809686339846358676940327	168	UVM_INFO @ 665383134 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	52228972725014914277331905676473639757883640744678699224717217922422463529571	244	UVM_INFO @ 53472214 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	56692971442994921875252207542774033121043764290359599407743212279719445208848	168	UVM_INFO @ 91726536 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:2213) [scoreboard] Check failed item.d_data == exp_data (* [] vs []) d_data mismatch when d_error =				21 test runs
	otp_ctrl_stress_all_with_rand_reset	60128641525761479329857306089142931110884019860846871593332190724414157413531	156	UVM_INFO @ 580154060 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	60135879736067829228966923934967017458789227860884100002692688509393340524480	159	UVM_INFO @ 13067929017 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	24012544191561811281155923499959815273387438030112424924482899331640311417749	23380	UVM_INFO @ 911886587 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	61174465398917615729815535216127480319890041114822450531977321475923531227926	91	UVM_INFO @ 37230208 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	49054858224863708796973834831613622215375032458187192183540795647114297029612	91	UVM_INFO @ 499672324 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	14435276551193868981708815971231247616121573907160825227479371705613499279779	25251	UVM_INFO @ 5621259626 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	97931306126649989520246995938261160760282745863312436270999035150655735811205	91	UVM_INFO @ 495600491 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	8500226129587110340977305434283255599779163710245410122597214240050461585902	3921	UVM_INFO @ 661487646 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	2342325018998740923835721360345306543297748556583541201311965983646386643518	8197	UVM_INFO @ 1116887935 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	6825032273533261010849324216327710972078423701996045131234023716697393312194	4440	UVM_INFO @ 3019474033 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	82165444231467118489881538797923926720401643607416592512962010567832395990377	40932	UVM_INFO @ 1536737485 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	33863513733629007399758363050205660128197490557783197399574799433798679835634	713	UVM_INFO @ 460785835 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	81435089535029370837850624937977562260192219366483348726270944876454866983767	5233	UVM_INFO @ 4066835177 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	31087496969380743496246542216552219389826869744974464515559059136567252887090	91	UVM_INFO @ 36993954 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	28012687681282789490807246151150019031936405124693103800181370127034059052854	91	UVM_INFO @ 61399518 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	39279993071222934098838708061413585711381297617861220418699872068000000626534	92	UVM_INFO @ 111132656 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	21175237015912892651303090869568104599627899695633614796386337328544859419391	2149	UVM_INFO @ 963804150 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	32516165247699323143369887085208650639241623243583684681585995801980000994933	1421	UVM_INFO @ 1363695506 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	27900346494976114974946930109211701902108505670357179576852891364694444820445	6037	UVM_INFO @ 26027215954 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	4707003692046803114790644336394784670831978859201284193637920869814280958477	38261	UVM_INFO @ 2989460993 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	8891335060031721017242195133878986463928729587987725941814228004839830102266	91	UVM_INFO @ 60264338 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:671) [scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (* [] vs [*]) Interrupt_pin: OtpErr				12 test runs
	otp_ctrl_background_chks	32605154804167695094040236892488635193740981210822695120342583206288890378474	7897	UVM_INFO @ 701322800 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_background_chks	38842099631336783319106879679445842203637691485372579289231031025360062980206	13441	UVM_INFO @ 443621703 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	82831008211471300509746590968058263586572718487955696499572216830083361487526	43898	UVM_INFO @ 1058089308 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_background_chks	6326374264060265079982096035643852517092766901630927136454621420837576338784	12771	UVM_INFO @ 1127182062 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	109537894043810806995946962430255042442619149275190909881270423852940147388712	11111	UVM_INFO @ 318118738 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	98519755867846502351847893561735973611561425924577680470990821547619599493035	38790	UVM_INFO @ 47222730136 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	65998019728755748216793716177833698004691748273295345857222147919227009220279	50774	UVM_INFO @ 4207033047 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	43559786331605324762846098498079926424550567253210785761474969759803595992579	3951	UVM_INFO @ 2016027150 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_errs	79776412534954543885303725802719926711375500490237374172149587061111406772978	8742	UVM_INFO @ 1434642656 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	66571618148430891906978922116121794943307209301326991993415001256344679080230	7527	UVM_INFO @ 1942914955 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	33567573900270702861593559440996182678042110852603664509391213254682603813702	17551	UVM_INFO @ 25554348241 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	95296033627996074520699419307943411475046308663983506722803255982566291650598	650	UVM_INFO @ 296397109 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (cip_base_scoreboard.sv:632) [scoreboard] Check failed item.d_data == exp_data (* [] vs []) d_data mismatch when d_error =				10 test runs
	otp_ctrl_csr_mem_rw_with_rand_reset	51894211412207893499540569367440722021964076971650021073609854961638877095210	97	UVM_INFO @ 143188487 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	112731843001634654763245767207970150586633651367967925280763024144825519000894	11733	UVM_INFO @ 902844727 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_csr_mem_rw_with_rand_reset	1163279190656467719051981319678578900307093378832914719316506283176946631572	97	UVM_INFO @ 137785550 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	15665175116444994901356096483432120824782239707689683616825651853964395647587	7990	UVM_INFO @ 2773297228 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	50800533735246534420780748613315792626901694313529613526422514093694972334393	386	UVM_INFO @ 288743227 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	38302360885042104395294944192754319435914967757743787077562214535971229230749	91	UVM_INFO @ 34186017 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	97502086198177688684471868347207755120376250685503614720917730363679068167812	149	UVM_INFO @ 2299688464 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	107711410548760949728314857234523773414543606098371460068383221847687699171217	12241	UVM_INFO @ 711852990 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	109141717694726833850994737680256962620547319205395089480510866737776840764254	91	UVM_INFO @ 119762486 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	51061694679941663105855035301295160085955445002988247838892337892200069214681	91	UVM_INFO @ 125357600 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_WARNING (uvm_reg_field.svh:1191) [RegModel] Trying to predict value of field 'err_code' while register 'otp_ctrl_core_reg_block.err_code_*' is being accessed				4 test runs
	otp_ctrl_stress_all_with_rand_reset	108953629306504986985258024861452842861684673802619609716343938195357797692190	3820	UVM_INFO @ 1037209115 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 1037249115 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 1037829115 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 1037869115 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
	otp_ctrl_stress_all_with_rand_reset	83645404931403109023199881130759008155313090100363107844581923506316059394120	27311	UVM_INFO @ 21884455425 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 21884535425 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 21884675425 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 21884835425 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
	otp_ctrl_stress_all_with_rand_reset	52953871150504761021993276880719005664163052103997285476706196513147906220984	1801	UVM_INFO @ 5256879911 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 5258546581 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 5260546585 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 5262046588 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
	otp_ctrl_stress_all_with_rand_reset	32823113465824160063414558837596951662464980622741888341209779274487124796699	6814	UVM_INFO @ 33992238972 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 33995072311 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 33996072313 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 33997405649 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [] vs []) dai addr ed* rdata* readout mismatch				3 test runs
	otp_ctrl_low_freq_read	12366610452049751447995412664847186436516924015003457900228545869365751317353	89	UVM_INFO @ 62656152256 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	20526187033962080992335855942669721221375762755512889855332721261357567923219	90	UVM_INFO @ 62558529459 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	61427795659122161439996002515520234121058670619610742452959566627395248323039	90	UVM_INFO @ 68781423603 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:958) [scoreboard] Check failed (csr.get_mirrored_value() \| status_mask) == (item.d_data \| status_mask) (* [] vs []) reg name: status, compare_mask				2 test runs
	otp_ctrl_dai_lock	9261133398349252281260009675019263213418757289061003077244357483853358005695	3739	UVM_INFO @ 648523592 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	100877974882694187698427832708677058473689374308540469960459805181622118551229	6833	UVM_INFO @ 351870195 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs [*]) reg name: otp_ctrl_core_reg_block.direct_access_regwen				2 test runs
	otp_ctrl_stress_all_with_rand_reset	14925113978996530740792314732722923857230513318287879024415921312138718109000	741	UVM_INFO @ 315970978 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	41305131621114347891457873921140641176713943237488129230315108625268815042066	6478	UVM_INFO @ 4108758994 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue				1 test run
	otp_ctrl_sec_cm	75937137080338960980184171792460463764118847792395721033656298524479033410737	2835	UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1286) [otp_ctrl_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.				1 test run
	otp_ctrl_stress_all_with_rand_reset	58962769532917176293345026418877043041425875320210709405684050560426136468188	90673	UVM_INFO @ 26491640613 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
Offending '(cio_test_en_o == *)'				1 test run
	otp_ctrl_stress_all_with_rand_reset	23193451961723398243713144565181372025553258072067797446976018509910312771481	16576	UVM_ERROR @ 27050506309 ps: (otp_ctrl_if.sv:389) [ASSERT FAILED] CioTestEnOWithDftOff_A UVM_INFO @ 27050506309 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [] vs []) dai addr bc rdata* readout mismatch				1 test run
	otp_ctrl_stress_all_with_rand_reset	16999164719695735423190215080524318510368643329916287647935652629442648766446	100	UVM_INFO @ 13706209743 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [] vs []) dai addr f* rdata* readout mismatch				1 test run
	otp_ctrl_stress_all_with_rand_reset	4768996667173756242317342030481181977546531620329117467416098499469547398101	1401	UVM_INFO @ 3138920638 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:465) [otp_ctrl_common_vseq] wait timeout occurred!				1 test run
	otp_ctrl_stress_all_with_rand_reset	79350877903422963758675388722617453338558383604398540226056162653052301388037	651	UVM_INFO @ 10170552450 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:465) [otp_ctrl_parallel_lc_esc_vseq] wait timeout occurred!				1 test run
	otp_ctrl_parallel_lc_esc	37444941763970160081817379336109006134500696006486646419036194721979496346894	88	UVM_INFO @ 10007651486 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:465) [otp_ctrl_init_fail_vseq] wait timeout occurred!				1 test run
	otp_ctrl_init_fail	50148645043575632426584210270678468139521236743278663653545528150615774024066	88	UVM_INFO @ 10013150455 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---