| V1 |
|
100.00% |
| V2 |
|
96.55% |
| V2S |
|
93.16% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| wake_up | 1 | 1 | 100.00 | |||
| aes_wake_up | 5.000s | 760.738us | 1 | 1 | 100.00 | |
| smoke | 10 | 10 | 100.00 | |||
| aes_smoke | 7.000s | 389.512us | 10 | 10 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| aes_csr_hw_reset | 2.000s | 126.189us | 1 | 1 | 100.00 | |
| csr_rw | 5 | 5 | 100.00 | |||
| aes_csr_rw | 2.000s | 60.984us | 5 | 5 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| aes_csr_bit_bash | 5.000s | 381.816us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| aes_csr_aliasing | 3.000s | 140.688us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 5 | 5 | 100.00 | |||
| aes_csr_mem_rw_with_rand_reset | 3.000s | 83.873us | 5 | 5 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 6 | 6 | 100.00 | |||
| aes_csr_rw | 2.000s | 60.984us | 5 | 5 | 100.00 | |
| aes_csr_aliasing | 3.000s | 140.688us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| algorithm | 70 | 70 | 100.00 | |||
| aes_smoke | 7.000s | 389.512us | 10 | 10 | 100.00 | |
| aes_config_error | 16.000s | 555.653us | 50 | 50 | 100.00 | |
| aes_stress | 17.000s | 2197.219us | 10 | 10 | 100.00 | |
| key_length | 70 | 70 | 100.00 | |||
| aes_smoke | 7.000s | 389.512us | 10 | 10 | 100.00 | |
| aes_config_error | 16.000s | 555.653us | 50 | 50 | 100.00 | |
| aes_stress | 17.000s | 2197.219us | 10 | 10 | 100.00 | |
| back2back | 35 | 35 | 100.00 | |||
| aes_stress | 17.000s | 2197.219us | 10 | 10 | 100.00 | |
| aes_b2b | 36.000s | 484.654us | 25 | 25 | 100.00 | |
| backpressure | 10 | 10 | 100.00 | |||
| aes_stress | 17.000s | 2197.219us | 10 | 10 | 100.00 | |
| multi_message | 92 | 95 | 96.84 | |||
| aes_smoke | 7.000s | 389.512us | 10 | 10 | 100.00 | |
| aes_config_error | 16.000s | 555.653us | 50 | 50 | 100.00 | |
| aes_stress | 17.000s | 2197.219us | 10 | 10 | 100.00 | |
| aes_alert_reset | 3601.000s | 0.000us | 22 | 25 | 88.00 | |
| failure_test | 82 | 85 | 96.47 | |||
| aes_man_cfg_err | 3.000s | 77.163us | 10 | 10 | 100.00 | |
| aes_config_error | 16.000s | 555.653us | 50 | 50 | 100.00 | |
| aes_alert_reset | 3601.000s | 0.000us | 22 | 25 | 88.00 | |
| trigger_clear_test | 10 | 10 | 100.00 | |||
| aes_clear | 7.000s | 190.251us | 10 | 10 | 100.00 | |
| nist_test_vectors | 1 | 1 | 100.00 | |||
| aes_nist_vectors | 10.000s | 706.106us | 1 | 1 | 100.00 | |
| nist_test_vectors_gcm | 1 | 1 | 100.00 | |||
| aes_nist_vectors_gcm | 11.000s | 465.351us | 1 | 1 | 100.00 | |
| reset_recovery | 22 | 25 | 88.00 | |||
| aes_alert_reset | 3601.000s | 0.000us | 22 | 25 | 88.00 | |
| stress | 10 | 10 | 100.00 | |||
| aes_stress | 17.000s | 2197.219us | 10 | 10 | 100.00 | |
| sideload | 20 | 20 | 100.00 | |||
| aes_stress | 17.000s | 2197.219us | 10 | 10 | 100.00 | |
| aes_sideload | 9.000s | 541.597us | 10 | 10 | 100.00 | |
| deinitialization | 10 | 10 | 100.00 | |||
| aes_deinit | 8.000s | 287.330us | 10 | 10 | 100.00 | |
| stress_all | 2 | 10 | 20.00 | |||
| aes_stress_all | 10806.000s | 0.000us | 2 | 10 | 20.00 | |
| gcm_save_and_restore | 100 | 100 | 100.00 | |||
| aes_gcm_save_restore | 17.000s | 660.775us | 100 | 100 | 100.00 | |
| alert_test | 10 | 10 | 100.00 | |||
| aes_alert_test | 3.000s | 166.343us | 10 | 10 | 100.00 | |
| tl_d_oob_addr_access | 25 | 25 | 100.00 | |||
| aes_tl_errors | 5.000s | 867.009us | 25 | 25 | 100.00 | |
| tl_d_illegal_access | 25 | 25 | 100.00 | |||
| aes_tl_errors | 5.000s | 867.009us | 25 | 25 | 100.00 | |
| tl_d_outstanding_access | 12 | 12 | 100.00 | |||
| aes_csr_hw_reset | 2.000s | 126.189us | 1 | 1 | 100.00 | |
| aes_csr_rw | 2.000s | 60.984us | 5 | 5 | 100.00 | |
| aes_csr_aliasing | 3.000s | 140.688us | 1 | 1 | 100.00 | |
| aes_same_csr_outstanding | 3.000s | 103.180us | 5 | 5 | 100.00 | |
| tl_d_partial_access | 12 | 12 | 100.00 | |||
| aes_csr_hw_reset | 2.000s | 126.189us | 1 | 1 | 100.00 | |
| aes_csr_rw | 2.000s | 60.984us | 5 | 5 | 100.00 | |
| aes_csr_aliasing | 3.000s | 140.688us | 1 | 1 | 100.00 | |
| aes_same_csr_outstanding | 3.000s | 103.180us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| reseeding | 6 | 10 | 60.00 | |||
| aes_reseed | 9.000s | 97.031us | 6 | 10 | 60.00 | |
| fault_inject | 597 | 660 | 90.45 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 270 | 300 | 90.00 | |
| aes_cipher_fi | 61.000s | 0.000us | 327 | 350 | 93.43 | |
| shadow_reg_update_error | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 107.523us | 20 | 20 | 100.00 | |
| shadow_reg_read_clear_staged_value | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 107.523us | 20 | 20 | 100.00 | |
| shadow_reg_storage_error | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 107.523us | 20 | 20 | 100.00 | |
| shadowed_reset_glitch | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 107.523us | 20 | 20 | 100.00 | |
| shadow_reg_update_error_with_csr_rw | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors_with_csr_rw | 4.000s | 267.053us | 20 | 20 | 100.00 | |
| tl_intg_err | 30 | 30 | 100.00 | |||
| aes_sec_cm | 10.000s | 1605.288us | 5 | 5 | 100.00 | |
| aes_tl_intg_err | 5.000s | 180.821us | 25 | 25 | 100.00 | |
| sec_cm_bus_integrity | 25 | 25 | 100.00 | |||
| aes_tl_intg_err | 5.000s | 180.821us | 25 | 25 | 100.00 | |
| sec_cm_lc_escalate_en_intersig_mubi | 22 | 25 | 88.00 | |||
| aes_alert_reset | 3601.000s | 0.000us | 22 | 25 | 88.00 | |
| sec_cm_main_config_shadow | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 107.523us | 20 | 20 | 100.00 | |
| sec_cm_gcm_config_shadow | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 107.523us | 20 | 20 | 100.00 | |
| sec_cm_main_config_sparse | 132 | 145 | 91.03 | |||
| aes_smoke | 7.000s | 389.512us | 10 | 10 | 100.00 | |
| aes_stress | 17.000s | 2197.219us | 10 | 10 | 100.00 | |
| aes_alert_reset | 3601.000s | 0.000us | 22 | 25 | 88.00 | |
| aes_core_fi | 3600.000s | 0.000us | 90 | 100 | 90.00 | |
| sec_cm_gcm_config_sparse | 250 | 260 | 96.15 | |||
| aes_gcm_save_restore | 17.000s | 660.775us | 100 | 100 | 100.00 | |
| aes_config_error | 16.000s | 555.653us | 50 | 50 | 100.00 | |
| aes_stress | 17.000s | 2197.219us | 10 | 10 | 100.00 | |
| aes_core_fi | 3600.000s | 0.000us | 90 | 100 | 90.00 | |
| sec_cm_aux_config_shadow | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 107.523us | 20 | 20 | 100.00 | |
| sec_cm_aux_config_regwen | 20 | 20 | 100.00 | |||
| aes_readability | 3.000s | 85.936us | 10 | 10 | 100.00 | |
| aes_stress | 17.000s | 2197.219us | 10 | 10 | 100.00 | |
| sec_cm_key_sideload | 20 | 20 | 100.00 | |||
| aes_stress | 17.000s | 2197.219us | 10 | 10 | 100.00 | |
| aes_sideload | 9.000s | 541.597us | 10 | 10 | 100.00 | |
| sec_cm_key_sw_unreadable | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 85.936us | 10 | 10 | 100.00 | |
| sec_cm_data_reg_sw_unreadable | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 85.936us | 10 | 10 | 100.00 | |
| sec_cm_key_sec_wipe | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 85.936us | 10 | 10 | 100.00 | |
| sec_cm_iv_config_sec_wipe | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 85.936us | 10 | 10 | 100.00 | |
| sec_cm_data_reg_sec_wipe | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 85.936us | 10 | 10 | 100.00 | |
| sec_cm_data_reg_key_sca | 10 | 10 | 100.00 | |||
| aes_stress | 17.000s | 2197.219us | 10 | 10 | 100.00 | |
| sec_cm_key_masking | 10 | 10 | 100.00 | |||
| aes_stress | 17.000s | 2197.219us | 10 | 10 | 100.00 | |
| sec_cm_main_fsm_sparse | 0 | 10 | 0.00 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| sec_cm_main_fsm_redun | 622 | 685 | 90.80 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 270 | 300 | 90.00 | |
| aes_cipher_fi | 61.000s | 0.000us | 327 | 350 | 93.43 | |
| aes_ctr_fi | 6.000s | 59.153us | 25 | 25 | 100.00 | |
| sec_cm_cipher_fsm_sparse | 0 | 10 | 0.00 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| sec_cm_cipher_fsm_redun | 597 | 660 | 90.45 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 270 | 300 | 90.00 | |
| aes_cipher_fi | 61.000s | 0.000us | 327 | 350 | 93.43 | |
| sec_cm_cipher_ctr_redun | 327 | 350 | 93.43 | |||
| aes_cipher_fi | 61.000s | 0.000us | 327 | 350 | 93.43 | |
| sec_cm_ctr_fsm_sparse | 0 | 10 | 0.00 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| sec_cm_ctr_fsm_redun | 295 | 335 | 88.06 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 270 | 300 | 90.00 | |
| aes_ctr_fi | 6.000s | 59.153us | 25 | 25 | 100.00 | |
| sec_cm_ghash_fsm_sparse | 0 | 10 | 0.00 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| sec_cm_ctrl_sparse | 622 | 685 | 90.80 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 270 | 300 | 90.00 | |
| aes_cipher_fi | 61.000s | 0.000us | 327 | 350 | 93.43 | |
| aes_ctr_fi | 6.000s | 59.153us | 25 | 25 | 100.00 | |
| sec_cm_main_fsm_global_esc | 22 | 25 | 88.00 | |||
| aes_alert_reset | 3601.000s | 0.000us | 22 | 25 | 88.00 | |
| sec_cm_main_fsm_local_esc | 622 | 685 | 90.80 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 270 | 300 | 90.00 | |
| aes_cipher_fi | 61.000s | 0.000us | 327 | 350 | 93.43 | |
| aes_ctr_fi | 6.000s | 59.153us | 25 | 25 | 100.00 | |
| sec_cm_cipher_fsm_local_esc | 622 | 685 | 90.80 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 270 | 300 | 90.00 | |
| aes_cipher_fi | 61.000s | 0.000us | 327 | 350 | 93.43 | |
| aes_ctr_fi | 6.000s | 59.153us | 25 | 25 | 100.00 | |
| sec_cm_ctr_fsm_local_esc | 295 | 335 | 88.06 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 270 | 300 | 90.00 | |
| aes_ctr_fi | 6.000s | 59.153us | 25 | 25 | 100.00 | |
| sec_cm_ghash_fsm_local_esc | 90 | 100 | 90.00 | |||
| aes_ghash_fi | 9.000s | 83.676us | 90 | 90 | 100.00 | |
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| sec_cm_data_reg_local_esc | 597 | 660 | 90.45 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 270 | 300 | 90.00 | |
| aes_cipher_fi | 61.000s | 0.000us | 327 | 350 | 93.43 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 0 | 10 | 0.00 | |||
| aes_stress_all_with_rand_reset | 41.000s | 6730.173us | 0 | 10 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| Job timed out after * minutes | 23 test runs | |||
| aes_stress_all | 60334896446480629825542274159536004292166869507251298602593989455539989640112 | None | ||
| aes_fi | 106569315561298484663065668026768590188458995451480621388283654188811595010218 | None | ||
| aes_stress_all | 76258429272707394405148354443561861663233481315295787108950746616511746737139 | None | ||
| aes_alert_reset | 11678589025118027782987804131733991358328196380308581938119652572818549859151 | None | ||
| aes_fi | 50222387334682776516884698295199445370029296186867797125380016424517681218576 | None | ||
| aes_control_fi | 48494883504707422508683457838160248764336199607515284113508057784557774237689 | None | ||
| aes_alert_reset | 93758202513115803331158412882232131936004221591440123601083372237800071472336 | None | ||
| aes_control_fi | 54770366100553775944483405159663855148551665608237578058226766538524964915117 | None | ||
| aes_control_fi | 41631839577214056256316320337407910165541927562522914617343552724697019001752 | None | ||
| aes_core_fi | 85173050983781512725524924541961743850966416791833474510142241248000832042832 | None | ||
| aes_control_fi | 33024952516042093921424779331805251058901299934166375690477475721571024288920 | None | ||
| aes_control_fi | 2913712981316920293634081552918753335296629859361904465065925838850571874383 | None | ||
| aes_control_fi | 28655534097100593869358187419372664149627119779846646004628517883261645527249 | None | ||
| aes_control_fi | 51514801229829669419300267687662711355496378700621385084472967353433418306454 | None | ||
| aes_control_fi | 40924589383505132890667063713622574412320406651139976563525496662083803545552 | None | ||
| aes_cipher_fi | 15364920543393832852469048317224509100439252351221878370363487179166307884390 | None | ||
| aes_control_fi | 76804633591790399911921473858103522217607475635232504637442421102816618951276 | None | ||
| aes_control_fi | 61263082149083096717766406551351149151652816414441543088057453797198630563880 | None | ||
| aes_control_fi | 15190432381783397472421274742875051372152415119502457261225376592354395239718 | None | ||
| aes_cipher_fi | 40765276856221967191087697531078754658243958091627610099790617332755340353880 | None | ||
| aes_control_fi | 62138744343838912694911199138368571970051403045977181190705729866292751863002 | None | ||
| aes_cipher_fi | 97941841454597037544957323032900380982476755374867642614209372406794847081508 | None | ||
| aes_control_fi | 2492829511851642175890464091966253216002922098581295434515721435795815027758 | None | ||
| UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred! | 17 test runs | |||
| aes_cipher_fi | 46535112002129210617703219080647571537475156032003525219340952682528161962285 | 142 |
UVM_INFO @ 10015009560 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 42271758624549308855068545568809381277139602006638866524092822953967675218141 | 144 |
UVM_INFO @ 10012669988 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 41471266127261174254278414706522962623427510605972395051724255990480513666619 | 146 |
UVM_INFO @ 10061692229 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 47705990849894076687384684381539036021806629788502085965445752274434506329936 | 147 |
UVM_INFO @ 10012098496 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 94728864905429918822090005375288804225066504282715533615131746714882151802641 | 157 |
UVM_INFO @ 10014170637 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 59424396239121136712583174522909109037721152817581770602998895311182783913519 | 149 |
UVM_INFO @ 10009429358 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 81145261040753567594106606048842445014976565847135897505011252292909772003389 | 149 |
UVM_INFO @ 10008317308 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 68403295873466886266956863969003977616629986485785331239411650015820726343021 | 158 |
UVM_INFO @ 10024469865 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 34101627208321160838835240355877210128077480715151541610302131336419262120756 | 148 |
UVM_INFO @ 10068860868 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 53615661377609047626138069624465655458360640331359032125557389635670367974595 | 147 |
UVM_INFO @ 10047867077 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 7845010416002274465575551364686110531107126669783424614292028952881764983495 | 146 |
UVM_INFO @ 10006420088 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 52434935100798434610306119048238975175005609836980961323014411298892629729302 | 155 |
UVM_INFO @ 10017662296 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 24819486210283718131845819536576353842319466020003657830906159649113727065555 | 147 |
UVM_INFO @ 10016381664 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 76962742811191052846558672321030740649823668219983657388329969694745522276983 | 151 |
UVM_INFO @ 10007217624 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 31249671748819021221394766728824699672113685453431402885154953196489362123724 | 151 |
UVM_INFO @ 10006902886 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 71901995211683209149177330126944600669755784799648269388782898228126017854 | 144 |
UVM_INFO @ 10011032558 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 25057894281714457647879172578787683508506049352463763069836128862008566950284 | 144 |
UVM_INFO @ 10134276551 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred! | 17 test runs | |||
| aes_control_fi | 81517745676214860516884953482473009706553069384649938306279910926002796701415 | 154 |
UVM_INFO @ 10008760333 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 36351740127433355367912142229648730184364930871311545068784566934565382177752 | 144 |
UVM_INFO @ 10009482481 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 15086736641789095309074114083878499556095629993720421457212885243110295312336 | 150 |
UVM_INFO @ 10015418306 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 30567915649093399990594925592574482024977222638650907398450841380864929325128 | 154 |
UVM_INFO @ 10046354562 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 98667778875893431271972647655724317651713182789766636322551026868113391939361 | 150 |
UVM_INFO @ 10045750118 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 86510064088732112230566175276600403298819653695329822349769600887217089029601 | 152 |
UVM_INFO @ 10010913411 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 48543207859717487595394119413749129612504263316211010589753710333188425890291 | 147 |
UVM_INFO @ 10006484942 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 83262419140002087972349946476707496595854914229364244096181897138411937989481 | 143 |
UVM_INFO @ 10008663684 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 23967746881689066068244913239284562082744896704574699730930240750502683436527 | 150 |
UVM_INFO @ 10047669541 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 91452995099699327749798944059343953041655316967054888909806875666909616210154 | 146 |
UVM_INFO @ 10027364916 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 99136145192946044905480682120629427692552318355055959835765618956042148802838 | 144 |
UVM_INFO @ 10010877516 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 76001976716985841553270527714025898999209614643090146151930996769986047808175 | 146 |
UVM_INFO @ 10009491779 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 77785257535310805196526554125025308577705683339937068874283405843111429426635 | 141 |
UVM_INFO @ 10006934975 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 78160967154522599153354907272786086337865303033309526882336053935898089004270 | 146 |
UVM_INFO @ 10005970543 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 105643430238908117494035546560427629557619880456283575847967038401050244087322 | 147 |
UVM_INFO @ 10022637549 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 26744913624870649245713093458947518827548442577616780666120084213562023498874 | 149 |
UVM_INFO @ 10023310767 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 27077914872567732390095599164800993130517771625563848468659533863099582369472 | 157 |
UVM_INFO @ 10014011948 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'parent_sequence' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues | 10 test runs | |||
| aes_reseed | 43753766570253647689350029544666297970552468099782585571323263947188139868873 | 11000 |
UVM_INFO @ 44594285 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_reseed | 39201231157328527553891122005766639392743791827190260562237497076725730168004 | 27874 |
UVM_INFO @ 97031314 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all | 87537576818590389073650277137543567627547233802821974207180827447476266746749 | 27824 |
UVM_INFO @ 370664831 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_reseed | 18768745003591791650476575664179854352757133304295956445785924813974003320527 | 1507 |
UVM_INFO @ 23588118 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all | 3245706154577594433253695380698286928936010242697724909073108081856283906827 | 16243 |
UVM_INFO @ 275390405 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 105830948503093147033423728809960231056757958880324348172663031058854044334777 | 199 |
UVM_INFO @ 491573177 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 49089397492409070580553133002939561597238918905777662507952696657499898275989 | 577 |
UVM_INFO @ 599143572 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all | 28118950555928244979314115607747769319742423931551477380638158813843027785894 | 24067 |
UVM_INFO @ 1853451753 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 51852479164324099216716718616623640969362997590879042902971348620269428368678 | 433 |
UVM_INFO @ 307615712 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_reseed | 52842621120817735198463975177783969478139009965724733971850082765127599234431 | 6331 |
UVM_INFO @ 1432458706 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_scoreboard.sv:926) scoreboard [scoreboard] | 8 test runs | |||
| aes_fi | 27525709058844258954119355165666546309571259891920782053545012068205369981368 | 25636 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 5
----| Seen: 4
----| Expected corrupted: 0
|
|
| aes_fi | 34138814453782848729245671884653176729572846353494930690320313426841284900028 | 19384 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 3
----| Expected corrupted: 0
|
|
| aes_fi | 24732616219261008431815796634184505287876598013243696987909595292047994873043 | 10173 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 3
----| Expected corrupted: 0
|
|
| aes_fi | 35631284324290168468211854882576065356752719804491263211912836781602234948988 | 17368 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 5
----| Expected corrupted: 0
|
|
| aes_fi | 50825356413603119279039694227467205500737680976165224164971081442039030703773 | 17751 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 4
----| Expected corrupted: 0
|
|
| aes_fi | 112456933312097982848849973558078251654745775022489583311204145157687506550929 | 10324 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 5
----| Expected corrupted: 0
|
|
| aes_fi | 108950372254574555525997757402642918830157458076214570395784544726784372654281 | 10678 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 2
----| Expected corrupted: 0
|
|
| aes_fi | 41880953796633850548631375066727552267956937353104383975734473791208551539321 | 23565 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 3
----| Expected corrupted: 0
|
|
| UVM_FATAL (aes_core_fi_vseq.sv:70) [aes_core_fi_vseq] wait timeout occurred! | 6 test runs | |||
| aes_core_fi | 15954720049559177235820315758164684662456345427637898270242199399669593985133 | 152 |
UVM_INFO @ 10012255269 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 17566542819450499137812034085751494188897808496718453380577283589459157385497 | 140 |
UVM_INFO @ 10013464898 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 98595286622289152115245093013817696816228098908663106738283084137091103279633 | 148 |
UVM_INFO @ 10021619107 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 71874860282899312263788324835576022914285596481991727095307109284675952955731 | 146 |
UVM_INFO @ 10019909672 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 67776564839925120705062109698121151229191628342219998212700696628293196504251 | 150 |
UVM_INFO @ 10053075289 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 38010803473279893310812963912473291973830305755812171654547811911650726273437 | 143 |
UVM_INFO @ 10064098006 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (cip_base_vseq.sv:1220) [aes_common_vseq] Check failed (vseq_done) | 4 test runs | |||
| aes_stress_all_with_rand_reset | 14939597688389785076500413953553113573562216967456847611973993115210176772158 | 138 |
UVM_INFO @ 4564528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 94752008915480731613989353118362623065177408486586968704145273698932577952363 | 172 |
UVM_INFO @ 97126716 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 99753294593856479993755695719233309201875485404640136614907050163094659199304 | 852 |
UVM_INFO @ 6730172985 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 93592428420861866328172807887223902662536103052459420562667030626353095687609 | 138 |
UVM_INFO @ 20874421 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=9) | 2 test runs | |||
| aes_core_fi | 68483734576783938487108114195041740066341928737835148649887901134178804503243 | 143 |
UVM_INFO @ 10024870041 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 14546072104318720289913039950616585983100492642067223727123137639231646713797 | 140 |
UVM_INFO @ 10034798211 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_scoreboard.sv:785) scoreboard [scoreboard] # * | 2 test runs | |||
| aes_stress_all | 52769308253019090575197372772529426227299189665092932215578713063293170837115 | 16111 |
TEST FAILED MESSAGES DID NOT MATCH
0 f2 89 89 0
1 00 31 31 0
|
|
| aes_stress_all | 65928349913095599112575977013691837116734474742856223227821168260946018947576 | 34384 |
TEST FAILED MESSAGES DID NOT MATCH
0 81 b8 b8 0
1 00 fe fe 0
|
|
| UVM_FATAL (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue | 2 test runs | |||
| aes_alert_reset | 49534874364904837438452789429233885504287940140629931414837355162097315382271 | 859096 |
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 26031054908444424527820348545055513542993745405336511802828228201319782490543 | 146 |
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=4) | 2 test runs | |||
| aes_cipher_fi | 9542141031954910743882744492402548679558177508412020387225035703432368006899 | 138 |
UVM_INFO @ 10013669766 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 104853168674228250635488008475641131090072201265878042210374775617827908258559 | 136 |
UVM_INFO @ 10077709768 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_base_vseq.sv:322) virtual_sequencer [aes_stress_vseq] Expected GCM phase GCM_TEXT, got GCM_INIT | 1 test run | |||
| aes_stress_all_with_rand_reset | 112518513967556209937068460875116947322440964792401113815568093384115698586288 | 439 |
UVM_INFO @ 823228937 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_reseed_vseq.sv:28) [aes_reseed_vseq] Check failed request_seen == *'b* (* [*] vs * [*]) | 1 test run | |||
| aes_stress_all | 100104289207813261585896164272748753993736633046868920037757605118595422953339 | 962 |
UVM_INFO @ 4167796848 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_base_vseq.sv:104) [aes_stress_all_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) | 1 test run | |||
| aes_stress_all_with_rand_reset | 43237878275427317439855742134032488143062298650640543523525538505529637824218 | 112 |
UVM_INFO @ 5133619 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_base_vseq.sv:87) [aes_stress_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) | 1 test run | |||
| aes_stress_all_with_rand_reset | 105956429908274634264780521911509398974327949177480424485297835066791501054725 | 114 |
UVM_INFO @ 63269125 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3) | 1 test run | |||
| aes_cipher_fi | 11261285977741101607105818475391294025673752590954330447980031828403457970928 | 137 |
UVM_INFO @ 10027084727 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|