| V1 |
|
98.11% |
| V2 |
|
92.99% |
| V2S |
|
80.00% |
| V3 |
|
35.00% |
| unmapped |
|
100.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 40 | 40 | 100.00 | |||
| gpio_smoke | 2.190s | 562.832us | 10 | 10 | 100.00 | |
| gpio_smoke_no_pullup_pulldown | 1.980s | 99.802us | 10 | 10 | 100.00 | |
| gpio_smoke_en_cdc_prim | 2.090s | 183.847us | 10 | 10 | 100.00 | |
| gpio_smoke_no_pullup_pulldown_en_cdc_prim | 1.740s | 65.821us | 10 | 10 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| gpio_csr_hw_reset | 1.040s | 15.098us | 1 | 1 | 100.00 | |
| csr_rw | 4 | 5 | 80.00 | |||
| gpio_csr_rw | 1.080s | 24.424us | 4 | 5 | 80.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| gpio_csr_bit_bash | 3.760s | 116.884us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| gpio_csr_aliasing | 1.680s | 124.363us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 5 | 5 | 100.00 | |||
| gpio_csr_mem_rw_with_rand_reset | 1.270s | 62.165us | 5 | 5 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 5 | 6 | 83.33 | |||
| gpio_csr_rw | 1.080s | 24.424us | 4 | 5 | 80.00 | |
| gpio_csr_aliasing | 1.680s | 124.363us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| direct_and_masked_out | 20 | 20 | 100.00 | |||
| gpio_random_dout_din | 1.860s | 77.915us | 10 | 10 | 100.00 | |
| gpio_random_dout_din_no_pullup_pulldown | 2.250s | 90.015us | 10 | 10 | 100.00 | |
| out_in_regs_read_write | 10 | 10 | 100.00 | |||
| gpio_dout_din_regs_random_rw | 1.500s | 271.471us | 10 | 10 | 100.00 | |
| gpio_interrupt_programming | 10 | 10 | 100.00 | |||
| gpio_intr_rand_pgm | 1.890s | 185.069us | 10 | 10 | 100.00 | |
| random_interrupt_trigger | 10 | 10 | 100.00 | |||
| gpio_rand_intr_trigger | 6.200s | 129.446us | 10 | 10 | 100.00 | |
| interrupt_and_noise_filter | 10 | 10 | 100.00 | |||
| gpio_intr_with_filter_rand_intr_event | 4.660s | 420.884us | 10 | 10 | 100.00 | |
| noise_filter_stress | 10 | 10 | 100.00 | |||
| gpio_filter_stress | 29.100s | 3133.100us | 10 | 10 | 100.00 | |
| regs_long_reads_and_writes | 10 | 10 | 100.00 | |||
| gpio_random_long_reg_writes_reg_reads | 7.760s | 2194.150us | 10 | 10 | 100.00 | |
| full_random | 10 | 10 | 100.00 | |||
| gpio_full_random | 1.380s | 772.567us | 10 | 10 | 100.00 | |
| stress_all | 0 | 10 | 0.00 | |||
| gpio_stress_all | 167.910s | 27092.863us | 0 | 10 | 0.00 | |
| alert_test | 10 | 10 | 100.00 | |||
| gpio_alert_test | 0.960s | 52.301us | 10 | 10 | 100.00 | |
| intr_test | 10 | 10 | 100.00 | |||
| gpio_intr_test | 0.960s | 46.745us | 10 | 10 | 100.00 | |
| tl_d_oob_addr_access | 25 | 25 | 100.00 | |||
| gpio_tl_errors | 4.390s | 361.633us | 25 | 25 | 100.00 | |
| tl_d_illegal_access | 25 | 25 | 100.00 | |||
| gpio_tl_errors | 4.390s | 361.633us | 25 | 25 | 100.00 | |
| tl_d_outstanding_access | 11 | 12 | 91.67 | |||
| gpio_csr_rw | 1.080s | 24.424us | 4 | 5 | 80.00 | |
| gpio_same_csr_outstanding | 1.330s | 306.718us | 5 | 5 | 100.00 | |
| gpio_csr_aliasing | 1.680s | 124.363us | 1 | 1 | 100.00 | |
| gpio_csr_hw_reset | 1.040s | 15.098us | 1 | 1 | 100.00 | |
| tl_d_partial_access | 11 | 12 | 91.67 | |||
| gpio_csr_rw | 1.080s | 24.424us | 4 | 5 | 80.00 | |
| gpio_same_csr_outstanding | 1.330s | 306.718us | 5 | 5 | 100.00 | |
| gpio_csr_aliasing | 1.680s | 124.363us | 1 | 1 | 100.00 | |
| gpio_csr_hw_reset | 1.040s | 15.098us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| tl_intg_err | 24 | 30 | 80.00 | |||
| gpio_tl_intg_err | 3.530s | 175.219us | 19 | 25 | 76.00 | |
| gpio_sec_cm | 1.350s | 244.427us | 5 | 5 | 100.00 | |
| sec_cm_bus_integrity | 19 | 25 | 76.00 | |||
| gpio_tl_intg_err | 3.530s | 175.219us | 19 | 25 | 76.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| straps_data | 7 | 10 | 70.00 | |||
| gpio_rand_straps | 0.920s | 37.828us | 7 | 10 | 70.00 | |
| stress_all_with_rand_reset | 0 | 10 | 0.00 | |||
| gpio_stress_all_with_rand_reset | 10.620s | 979.259us | 0 | 10 | 0.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| Unmapped | 50 | 50 | 100.00 | |||
| gpio_inp_prd_cnt | 0.930s | 16.936us | 50 | 50 | 100.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_ERROR (gpio_scoreboard.sv:248) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) | 13 test runs | |||
| gpio_stress_all | 52987376341841502583388674305964133274510356096031136835420231783546668428876 | 2489 |
UVM_INFO @ 27092863402 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| gpio_stress_all | 95195740371237828197116904600222743330032122158156189604361138702974313685290 | 169 |
UVM_INFO @ 471776273 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| gpio_stress_all | 42614560562308761944994810906142983930663169148467780349001729977095980031718 | 498 |
UVM_INFO @ 6250046249 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| gpio_rand_straps | 14799143703095240206951567584897523118908314063990398437886880379788429238022 | 75 |
UVM_INFO @ 1918429 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| gpio_stress_all | 9449735018674242462092469221008118826098307368320023472949140728880654604971 | 1668 |
UVM_INFO @ 26123909781 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| gpio_stress_all | 47244605500319128119334245494445213507532170133516746636965042432949995206946 | 478 |
UVM_INFO @ 6480683375 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| gpio_stress_all | 55347271352203256957089253525381037577162366646723573495576122482874235593471 | 826 |
UVM_INFO @ 7004682388 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| gpio_stress_all | 47487729842379673241959419305069530015623440733096215370461361720322561126875 | 80 |
UVM_INFO @ 620075767 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| gpio_stress_all | 65190901387542585963909288792209410825310048630273634044149050211291658230943 | 458 |
UVM_INFO @ 2217450364 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| gpio_rand_straps | 114957180102583726082856688319533634316721922199960258921100262899854172462328 | 75 |
UVM_INFO @ 3305108 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| gpio_stress_all | 343173162118271268794533058171857212650061331201813553206454941464725324598 | 79 |
UVM_INFO @ 1790140974 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| gpio_stress_all | 54125962708443846247322017691530470294343736560688331020469074548585330002896 | 2213 |
UVM_INFO @ 2278660643 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| gpio_rand_straps | 69958342794591771717281470783182938293292634856903344455366359013246518862850 | 75 |
UVM_INFO @ 8154767 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (cip_base_vseq.sv:1220) [gpio_common_vseq] Check failed (vseq_done) | 7 test runs | |||
| gpio_stress_all_with_rand_reset | 47327678922358607852685640047395091995669067390170542988375833699612431093034 | 85 |
UVM_INFO @ 9469755 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| gpio_stress_all_with_rand_reset | 91523830415615410927581501759036253743891371384460909987694011482639658425435 | 82 |
UVM_INFO @ 1382485964 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| gpio_stress_all_with_rand_reset | 106703384656372882281495412045810165994032671909655697449863644540527982466647 | 80 |
UVM_INFO @ 17695703 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| gpio_stress_all_with_rand_reset | 51728761443009227119194920772648976650518224805924978813917823937424984312982 | 80 |
UVM_INFO @ 39223743 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| gpio_stress_all_with_rand_reset | 25789782057491064353538713957361530869693746844516386474973866232973733251220 | 81 |
UVM_INFO @ 38261251 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| gpio_stress_all_with_rand_reset | 54863032290994230908730095241481692067967882980768742620650512851210374878411 | 80 |
UVM_INFO @ 1267629 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| gpio_stress_all_with_rand_reset | 43150158920169106288518286239153963452243994443903117477902735722177341115808 | 81 |
UVM_INFO @ 913531151 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -* | 3 test runs | |||
| gpio_stress_all_with_rand_reset | 76161772963598531845961823977183680996771382370553441521439414895630379747197 | 79 |
UVM_INFO @ 264278648 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| gpio_stress_all_with_rand_reset | 30800968049093623993912833012401546276247808365370670283351633347340062627770 | 78 |
UVM_INFO @ 3394512 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| gpio_stress_all_with_rand_reset | 21951152677350931904091818518790601170253930320808303041801291149621851505313 | 271 |
UVM_INFO @ 979259096 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: gpio_reg_block.inp_prd_cnt_ctrl_*.enable reset value: * | 3 test runs | |||
| gpio_tl_intg_err | 17487649518629641823830659814803932976869809490346404253048326327800160123879 | 247 |
UVM_INFO @ 115241725 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| gpio_tl_intg_err | 43603778487020850823071024263603072008947139991005550069573733681116023832803 | 276 |
UVM_INFO @ 146762498 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| gpio_tl_intg_err | 97637612652816137473452336793100052704327851639464970337137633323021277857979 | 226 |
UVM_INFO @ 240163751 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: gpio_reg_block.inp_prd_cnt_val_*.value_* reset value: * | 2 test runs | |||
| gpio_tl_intg_err | 109043925473339933699326396573909374632870408852113011347219847648430806655173 | 313 |
UVM_INFO @ 505145824 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| gpio_tl_intg_err | 45238962092438116388227312229212824443519663398053347897616158124395677335948 | 298 |
UVM_INFO @ 334948752 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: gpio_reg_block.inp_prd_cnt_val_* reset value: * | 1 test run | |||
| gpio_csr_rw | 8703831727177919833191811375832965541662923828058324542675023049281255712858 | 77 |
UVM_INFO @ 38797511 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: gpio_reg_block.inp_prd_cnt_ctrl_* reset value: * | 1 test run | |||
| gpio_tl_intg_err | 109653248533551116733334158614488837019362269378865381829691672232830633313717 | 182 |
UVM_INFO @ 74120493 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|