Simulation Results: otp_ctrl

 
03/07/2026 15:00:30 DVSim: v1.49.0 sha: c632d91 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 86.82 %
  • code
  • 80.73 %
  • assert
  • 94.93 %
  • func
  • 84.80 %
  • line
  • 88.38 %
  • branch
  • 86.49 %
  • cond
  • 88.50 %
  • toggle
  • 88.73 %
  • FSM
  • 51.53 %
Validation stages
V1
84.62%
V2
70.78%
V2S
71.82%
V3
9.90%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
otp_ctrl_wake_up 2.360s 73.492us 1 1 100.00
smoke 7 10 70.00
otp_ctrl_smoke 11.940s 2333.143us 7 10 70.00
csr_hw_reset 1 1 100.00
otp_ctrl_csr_hw_reset 3.590s 1689.094us 1 1 100.00
csr_rw 5 5 100.00
otp_ctrl_csr_rw 2.330s 727.333us 5 5 100.00
csr_bit_bash 1 1 100.00
otp_ctrl_csr_bit_bash 10.420s 2100.985us 1 1 100.00
csr_aliasing 1 1 100.00
otp_ctrl_csr_aliasing 4.150s 85.889us 1 1 100.00
csr_mem_rw_with_rand_reset 4 5 80.00
otp_ctrl_csr_mem_rw_with_rand_reset 3.430s 168.943us 4 5 80.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
otp_ctrl_csr_rw 2.330s 727.333us 5 5 100.00
otp_ctrl_csr_aliasing 4.150s 85.889us 1 1 100.00
mem_walk 1 1 100.00
otp_ctrl_mem_walk 1.680s 109.007us 1 1 100.00
mem_partial_access 1 1 100.00
otp_ctrl_mem_partial_access 2.240s 155.578us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
dai_access_partition_walk 0 1 0.00
otp_ctrl_partition_walk 141.460s 15351.217us 0 1 0.00
init_fail 211 300 70.33
otp_ctrl_init_fail 41.380s 10008.675us 211 300 70.33
partition_check 24 60 40.00
otp_ctrl_background_chks 33.460s 2930.785us 3 10 30.00
otp_ctrl_check_fail 48.330s 17359.073us 21 50 42.00
regwen_during_otp_init 14 30 46.67
otp_ctrl_regwen 10.750s 377.436us 14 30 46.67
partition_lock 13 30 43.33
otp_ctrl_dai_lock 31.410s 5073.080us 13 30 43.33
interface_key_check 4 10 40.00
otp_ctrl_parallel_key_req 35.440s 2227.707us 4 10 40.00
lc_interactions 182 210 86.67
otp_ctrl_parallel_lc_req 16.580s 2264.589us 6 10 60.00
otp_ctrl_parallel_lc_esc 66.940s 30599.352us 176 200 88.00
otp_dai_errors 21 25 84.00
otp_ctrl_dai_errs 49.100s 5102.508us 21 25 84.00
otp_macro_errors 2 10 20.00
otp_ctrl_macro_errs 15.120s 3218.599us 2 10 20.00
test_access 5 10 50.00
otp_ctrl_test_access 36.840s 5644.783us 5 10 50.00
stress_all 0 10 0.00
otp_ctrl_stress_all 160.780s 63038.201us 0 10 0.00
intr_test 10 10 100.00
otp_ctrl_intr_test 2.990s 678.652us 10 10 100.00
alert_test 10 10 100.00
otp_ctrl_alert_test 3.080s 1005.536us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
otp_ctrl_tl_errors 7.840s 3108.244us 25 25 100.00
tl_d_illegal_access 25 25 100.00
otp_ctrl_tl_errors 7.840s 3108.244us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
otp_ctrl_csr_hw_reset 3.590s 1689.094us 1 1 100.00
otp_ctrl_csr_rw 2.330s 727.333us 5 5 100.00
otp_ctrl_csr_aliasing 4.150s 85.889us 1 1 100.00
otp_ctrl_same_csr_outstanding 4.230s 101.293us 5 5 100.00
tl_d_partial_access 12 12 100.00
otp_ctrl_csr_hw_reset 3.590s 1689.094us 1 1 100.00
otp_ctrl_csr_rw 2.330s 727.333us 5 5 100.00
otp_ctrl_csr_aliasing 4.150s 85.889us 1 1 100.00
otp_ctrl_same_csr_outstanding 4.230s 101.293us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 5 5 100.00
otp_ctrl_sec_cm 401.590s 65293.708us 5 5 100.00
tl_intg_err 30 30 100.00
otp_ctrl_sec_cm 401.590s 65293.708us 5 5 100.00
otp_ctrl_tl_intg_err 34.990s 22192.799us 25 25 100.00
prim_count_check 5 5 100.00
otp_ctrl_sec_cm 401.590s 65293.708us 5 5 100.00
prim_fsm_check 5 5 100.00
otp_ctrl_sec_cm 401.590s 65293.708us 5 5 100.00
sec_cm_bus_integrity 25 25 100.00
otp_ctrl_tl_intg_err 34.990s 22192.799us 25 25 100.00
sec_cm_secret_mem_scramble 7 10 70.00
otp_ctrl_smoke 11.940s 2333.143us 7 10 70.00
sec_cm_part_mem_digest 7 10 70.00
otp_ctrl_smoke 11.940s 2333.143us 7 10 70.00
sec_cm_dai_fsm_sparse 5 5 100.00
otp_ctrl_sec_cm 401.590s 65293.708us 5 5 100.00
sec_cm_kdi_fsm_sparse 5 5 100.00
otp_ctrl_sec_cm 401.590s 65293.708us 5 5 100.00
sec_cm_lci_fsm_sparse 5 5 100.00
otp_ctrl_sec_cm 401.590s 65293.708us 5 5 100.00
sec_cm_part_fsm_sparse 5 5 100.00
otp_ctrl_sec_cm 401.590s 65293.708us 5 5 100.00
sec_cm_scrmbl_fsm_sparse 5 5 100.00
otp_ctrl_sec_cm 401.590s 65293.708us 5 5 100.00
sec_cm_timer_fsm_sparse 5 5 100.00
otp_ctrl_sec_cm 401.590s 65293.708us 5 5 100.00
sec_cm_dai_ctr_redun 5 5 100.00
otp_ctrl_sec_cm 401.590s 65293.708us 5 5 100.00
sec_cm_kdi_seed_ctr_redun 5 5 100.00
otp_ctrl_sec_cm 401.590s 65293.708us 5 5 100.00
sec_cm_kdi_entropy_ctr_redun 5 5 100.00
otp_ctrl_sec_cm 401.590s 65293.708us 5 5 100.00
sec_cm_lci_ctr_redun 5 5 100.00
otp_ctrl_sec_cm 401.590s 65293.708us 5 5 100.00
sec_cm_part_ctr_redun 5 5 100.00
otp_ctrl_sec_cm 401.590s 65293.708us 5 5 100.00
sec_cm_scrmbl_ctr_redun 5 5 100.00
otp_ctrl_sec_cm 401.590s 65293.708us 5 5 100.00
sec_cm_timer_integ_ctr_redun 5 5 100.00
otp_ctrl_sec_cm 401.590s 65293.708us 5 5 100.00
sec_cm_timer_cnsty_ctr_redun 5 5 100.00
otp_ctrl_sec_cm 401.590s 65293.708us 5 5 100.00
sec_cm_timer_lfsr_redun 5 5 100.00
otp_ctrl_sec_cm 401.590s 65293.708us 5 5 100.00
sec_cm_dai_fsm_local_esc 181 205 88.29
otp_ctrl_parallel_lc_esc 66.940s 30599.352us 176 200 88.00
otp_ctrl_sec_cm 401.590s 65293.708us 5 5 100.00
sec_cm_lci_fsm_local_esc 176 200 88.00
otp_ctrl_parallel_lc_esc 66.940s 30599.352us 176 200 88.00
sec_cm_kdi_fsm_local_esc 176 200 88.00
otp_ctrl_parallel_lc_esc 66.940s 30599.352us 176 200 88.00
sec_cm_part_fsm_local_esc 178 210 84.76
otp_ctrl_parallel_lc_esc 66.940s 30599.352us 176 200 88.00
otp_ctrl_macro_errs 15.120s 3218.599us 2 10 20.00
sec_cm_scrmbl_fsm_local_esc 176 200 88.00
otp_ctrl_parallel_lc_esc 66.940s 30599.352us 176 200 88.00
sec_cm_timer_fsm_local_esc 181 205 88.29
otp_ctrl_parallel_lc_esc 66.940s 30599.352us 176 200 88.00
otp_ctrl_sec_cm 401.590s 65293.708us 5 5 100.00
sec_cm_dai_fsm_global_esc 181 205 88.29
otp_ctrl_parallel_lc_esc 66.940s 30599.352us 176 200 88.00
otp_ctrl_sec_cm 401.590s 65293.708us 5 5 100.00
sec_cm_lci_fsm_global_esc 176 200 88.00
otp_ctrl_parallel_lc_esc 66.940s 30599.352us 176 200 88.00
sec_cm_kdi_fsm_global_esc 176 200 88.00
otp_ctrl_parallel_lc_esc 66.940s 30599.352us 176 200 88.00
sec_cm_part_fsm_global_esc 178 210 84.76
otp_ctrl_parallel_lc_esc 66.940s 30599.352us 176 200 88.00
otp_ctrl_macro_errs 15.120s 3218.599us 2 10 20.00
sec_cm_scrmbl_fsm_global_esc 176 200 88.00
otp_ctrl_parallel_lc_esc 66.940s 30599.352us 176 200 88.00
sec_cm_timer_fsm_global_esc 181 205 88.29
otp_ctrl_parallel_lc_esc 66.940s 30599.352us 176 200 88.00
otp_ctrl_sec_cm 401.590s 65293.708us 5 5 100.00
sec_cm_part_data_reg_integrity 211 300 70.33
otp_ctrl_init_fail 41.380s 10008.675us 211 300 70.33
sec_cm_part_data_reg_bkgn_chk 21 50 42.00
otp_ctrl_check_fail 48.330s 17359.073us 21 50 42.00
sec_cm_part_mem_regren 13 30 43.33
otp_ctrl_dai_lock 31.410s 5073.080us 13 30 43.33
sec_cm_part_mem_sw_unreadable 13 30 43.33
otp_ctrl_dai_lock 31.410s 5073.080us 13 30 43.33
sec_cm_part_mem_sw_unwritable 13 30 43.33
otp_ctrl_dai_lock 31.410s 5073.080us 13 30 43.33
sec_cm_lc_part_mem_sw_noaccess 13 30 43.33
otp_ctrl_dai_lock 31.410s 5073.080us 13 30 43.33
sec_cm_access_ctrl_mubi 13 30 43.33
otp_ctrl_dai_lock 31.410s 5073.080us 13 30 43.33
sec_cm_token_valid_ctrl_mubi 7 10 70.00
otp_ctrl_smoke 11.940s 2333.143us 7 10 70.00
sec_cm_lc_ctrl_intersig_mubi 13 30 43.33
otp_ctrl_dai_lock 31.410s 5073.080us 13 30 43.33
sec_cm_test_bus_lc_gated 7 10 70.00
otp_ctrl_smoke 11.940s 2333.143us 7 10 70.00
sec_cm_test_tl_lc_gate_fsm_sparse 5 5 100.00
otp_ctrl_sec_cm 401.590s 65293.708us 5 5 100.00
sec_cm_direct_access_config_regwen 14 30 46.67
otp_ctrl_regwen 10.750s 377.436us 14 30 46.67
sec_cm_check_trigger_config_regwen 7 10 70.00
otp_ctrl_smoke 11.940s 2333.143us 7 10 70.00
sec_cm_check_config_regwen 7 10 70.00
otp_ctrl_smoke 11.940s 2333.143us 7 10 70.00
sec_cm_macro_mem_integrity 2 10 20.00
otp_ctrl_macro_errs 15.120s 3218.599us 2 10 20.00
Testpoint Test Max Runtime Sim Time Pass Total %
otp_ctrl_low_freq_read 0 1 0.00
otp_ctrl_low_freq_read 100.260s 26268.645us 0 1 0.00
stress_all_with_rand_reset 10 100 10.00
otp_ctrl_stress_all_with_rand_reset 156.460s 18931.700us 10 100 10.00

Error Messages

   Test seed line log context
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: * 106 test runs
otp_ctrl_regwen 108549158362737463015766581756287857347868569525059264510496588638234280773492 3476
UVM_INFO @ 130992259 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 103572667352526110574911971258406169550770532417812148382654008981887477716712 2259
UVM_INFO @ 131629641 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 16614135735056219221077037600698871398438768649405826099293539501799764928677 2747
UVM_INFO @ 182480394 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 89945522841283575400430874618355173488386869367214264921695266323593283684865 5292
UVM_INFO @ 842085275 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 13638063109877149084300439973799719190300308814229946780763100659357734418979 3012
UVM_INFO @ 117877476 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 88783702885472323845292754645004119071804738595135883991585499994873636191051 552
UVM_INFO @ 197615140 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 11918054888071061762225612847237356227474704707098827725370926391143733735641 1476
UVM_INFO @ 109060094 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 6712209068688259345311831375970078307118847699968433731129548067997959836260 2416
UVM_INFO @ 119827957 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 52820963504602405952584662468412228125146972231436764386891312214193457521111 1960
UVM_INFO @ 77425979 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 319188648631163151376971919692504986935619168177128002214728971970739631693 3238
UVM_INFO @ 381583719 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 44235918619261186797512948300097102283771944934319186649214295245953133846583 2086
UVM_INFO @ 274874448 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 99037773216926654026479895319885510394116017528704485309415312890450500393920 2124
UVM_INFO @ 166220145 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 87485332571414112690839975074958538703711408604166873508566496506144311455745 1722
UVM_INFO @ 309456886 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 25057139413489182519248450459872413982636332428012431520345542917091335479321 450
UVM_INFO @ 925503428 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 74623755835772046143129371078726696042566594686545281580759597785327358439023 183
UVM_INFO @ 126283990 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 108834967473610497476659386527111668091735943099704524150446624719757896158445 307
UVM_INFO @ 138051171 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 96682985514738364058101131527870350734806119959430057486463602276159037462669 3246
UVM_INFO @ 86019728 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 30721950879430697108377379431268399491366731794986179576152763592115756730947 3752
UVM_INFO @ 176745590 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 65044565010884491085624212512869734624550633571859404682900591054416591771503 1146
UVM_INFO @ 1197127819 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 63939227529515091915171062956705969338963176934037748557301783335603377580299 2846
UVM_INFO @ 78043734 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 95079915294282843982488381725447671919337377626305790677910517353258995428925 362
UVM_INFO @ 827644240 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 44266329664141788581047373787945208970014646421430670265777777020536579531684 1845
UVM_INFO @ 61116070 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 21682772446849100996407351081281267406807157986461883332847786585040141463559 1196
UVM_INFO @ 60952660 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 85797474620803250527227943636011988374427151994670753902952633833122073890821 901
UVM_INFO @ 45624488 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 75955984154408103588596986775070802291218160626594926676089036172895332921701 2514
UVM_INFO @ 112793911 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 55705999154488316223502772772267929067449561649707781879253138035771368373792 741
UVM_INFO @ 44514506 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 82411302399446740127702642355415413934594764447948880388338077949756575232433 1011
UVM_INFO @ 186512065 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 81415717877119162325668193124722135226054339424716759149085485813278915296819 299
UVM_INFO @ 83652316 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 105743406887103563616144649488388991320257295966770840391576525757759375559821 325
UVM_INFO @ 37266224 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 51163097913245269182638680355277580881407251523433037326273686126599975130701 657
UVM_INFO @ 191329843 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 54477032870964515325209854591916047609483322041966075419466852628283700587852 225
UVM_INFO @ 33602846 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 20521791660630934347757481045440218108765597008706102097908903975758568379082 783
UVM_INFO @ 42409001 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 21783819291275319685135681731372035408699464526170517639306438015840653633096 2067
UVM_INFO @ 316303272 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 97124302825440028452586390433020689673039008361778533941193808280856684037896 703
UVM_INFO @ 47044442 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 21354881953870505865447649028320465987239586927581261318147329386225299858765 823
UVM_INFO @ 219951581 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 421942839762739909394744575827471891317358042686068757188016978443668164382 141
UVM_INFO @ 169582131 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 71023548308370835812000854910028041544182397955505117478839812945893684858706 741
UVM_INFO @ 158466488 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 94089765459568725416392190513330114945056356296467939206741692176672851673131 997
UVM_INFO @ 179979739 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 114109879221433685285394350697721999106692905757071109343146862306806719968902 2003
UVM_INFO @ 1016254610 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 7155933334511265311768388900177640081998816671646469526411835235894968657687 1395
UVM_INFO @ 54513252 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 5149792792189966270560683314646606522287821989809575979089447813214360397406 1043
UVM_INFO @ 94412416 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 48660163181061700809489506542666155896325268367561033171357765333622724916329 225
UVM_INFO @ 53768018 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 91687047738009943548142920611249714179519365203927269861245396089905132619129 1993
UVM_INFO @ 68566618 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 15360434549681187296498246731705592993180241018768025861519673474465300026819 1053
UVM_INFO @ 73306787 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 105816069747665854015291968553778216475855348078620832481428364070374213265614 815
UVM_INFO @ 703886495 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 103413545642426060659850063759559358011107228613225938729406479229874250980285 225
UVM_INFO @ 69837816 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 24034738908485251385832867661973312751210578332293540109112555203249177411632 783
UVM_INFO @ 235567529 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 18475894842504622428508591007550481662338985193243566665260419188917060697299 715
UVM_INFO @ 76197936 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 86987176597780324002695073008343886563356238451460096500191596720999392337535 531
UVM_INFO @ 76814561 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 110296134920306026598644573291018314760252583205453557795136564096923249005251 1099
UVM_INFO @ 140187120 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 82418840408862282960527890804628117469196854500080136103073857181084362190267 743
UVM_INFO @ 989821048 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 52061508874191117919719350230692485369791334366637314807427494660228622206239 393
UVM_INFO @ 669713111 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 72518736051950311341635570144045739799257154007599296420480330031782001045827 581
UVM_INFO @ 742386206 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 63532715537611834974110591528663894985098456924761016071697435817770144403698 2091
UVM_INFO @ 365164983 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 35715758306973238015180684517660973380365317846519437943341756187366606329883 1347
UVM_INFO @ 102985391 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 24413918787249184817066445430059745291704207194847610685433215968957135820319 943
UVM_INFO @ 89834576 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 42440447571173505692906119807808564892962553448071133821625502877784441179498 2197
UVM_INFO @ 189416035 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 39019335604384251562655339698100908944596246225386692491802916517034211574969 785
UVM_INFO @ 171473676 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 102113011810817629930847139485883400697014702592528358121872601144910378548213 1277
UVM_INFO @ 68578856 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 101867058003663742298360000087510023607880797196166754083898623789644320311839 661
UVM_INFO @ 204147350 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 21552366867049957362716768859061628843167431235693169597900523578021846599216 577
UVM_INFO @ 64581509 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 88465249969542908327372986499374106524266732906451423525323207104542967678016 347
UVM_INFO @ 145621322 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 63879489648965228979589867013850061726999958607343885070123948545861438065397 347
UVM_INFO @ 105024352 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 11139117038215905985662038987323227575243638062823449285641755406262311224977 309
UVM_INFO @ 863045281 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 94718444926256722455983754940051679961702479556674376874434278025549683831198 647
UVM_INFO @ 65327414 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 45699899493412304361822206174400283502940054622190637904865102717031058911341 141
UVM_INFO @ 33894918 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 23472906294355496261229717470927548875727038056408898382649410487060751455403 577
UVM_INFO @ 60788515 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 33047055006387154517633663296193687708019153800603891710607591436384844710970 1555
UVM_INFO @ 54534298 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 42668777307040722077660604184955454247179859761632248175788223498593025803297 433
UVM_INFO @ 174562853 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 73438880524969582613685363878736305295361594227942031201737142083740745357688 821
UVM_INFO @ 76189745 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 99578724041331513773669013236181916061383785983575213287852727376684449038338 1447
UVM_INFO @ 124892443 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 63017863520166672811581147154470235965342465441247202707391186802445921862823 1485
UVM_INFO @ 69956326 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 100479320556599102777572974277695493759337782649521719607909553852668460071752 1221
UVM_INFO @ 152806298 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 112877899377841170516150496056834492142617697083075309996649959189545543958098 801
UVM_INFO @ 111336052 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 23862677829098936021741820321328818056497987777781284000850024891089812571034 551
UVM_INFO @ 712001858 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 69633462556091322912842915205254755743861370353470604229000926067230024227812 733
UVM_INFO @ 42560314 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 33084126003315596197990546781951973061529119007583757867038565979880814878276 491
UVM_INFO @ 79104210 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 56275264647637907658407350382603332073516622542090850501497313797585970461887 141
UVM_INFO @ 66199490 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 78310448179637960038710744903992877510754049177147480665895973216743243677255 2097
UVM_INFO @ 86644379 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 8238951542056522436739866958404160121067406155669113863363448736924625655139 225
UVM_INFO @ 203883957 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 41090795061191771459616917024104123120499448507089005782445049056705577844300 795
UVM_INFO @ 84385512 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 101593750539223830887136483160158778372021095774573235575857352272953424312630 1717
UVM_INFO @ 141688727 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 78635325334613745026497955132884392827997759967877253685390660483552446242456 973
UVM_INFO @ 100271135 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 109836190658129548268987178467902014589611381722449890130854290650859288256411 2177
UVM_INFO @ 1084390770 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 63563097618621401275002713422222072877526563266955189068306166346528961920197 859
UVM_INFO @ 98322933 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 709062862149691496660923743656707220705573211822599711260408773980855371964 449
UVM_INFO @ 42987771 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 112057583941618591410597641833124640371205206692096881085651151788249116774097 1407
UVM_INFO @ 105612416 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 72748887504562715589204275051607108655378371086396642183539611751402205701957 341
UVM_INFO @ 86138451 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 104460300764803065312814792636923331257257661002140769084033866210184401361490 1739
UVM_INFO @ 65423170 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 53546864563400700591001494033754072367868135556981459715719313213435176714778 241
UVM_INFO @ 95486483 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 82429022104806762066053243608640897446294947427069627776617179600097711124833 435
UVM_INFO @ 210807767 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 30331300564034060057503996193459879506948722660105925803123956032380210780394 649
UVM_INFO @ 643153254 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 51914712449209476354651214216072613069566905671880092819933224058943498965879 1051
UVM_INFO @ 97080306 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 14808031712803322706529343886173192285931042348704530873264504697976970181695 1565
UVM_INFO @ 85081493 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 41447287618600145950772372788783929790200699268125286716725457577552572084115 283
UVM_INFO @ 568259935 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 61638858390960726338938539958625966191263442102948895878838713487356972096457 651
UVM_INFO @ 91863703 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 44198576198265286409378707150871980986999786300946773338092546746844494912873 309
UVM_INFO @ 68286165 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 87091480186096306441343850231914560283639020837577298932288410861279397254568 1855
UVM_INFO @ 78682268 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 2856325871727225668939729376624571361381414634600890227130672774349207138504 759
UVM_INFO @ 885467102 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 103293038008080011696904964590153450159298881188685203833179288146680731224618 99
UVM_INFO @ 36173988 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 19675146165623835651299869215018321115793758165005940951391724011029471361871 1049
UVM_INFO @ 142271469 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 44610183565144490580114549928521945597977469862107354206955905553917467442866 325
UVM_INFO @ 128632536 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 43547111424005655877286199550778090686483307925217194405769999077387871406022 553
UVM_INFO @ 635265519 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 74305282575490696138444211330157535294687073718146811188506483921410493255831 333
UVM_INFO @ 36475152 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 79470953177632050654516072224609337086738770942090723331354267665163893981321 325
UVM_INFO @ 94658255 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 78004192824061544587239642893383140955231691317027803563912610836472454837218 1901
UVM_INFO @ 340910196 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.err_code_* 73 test runs
otp_ctrl_parallel_key_req 16682675550087701310903172497895820331160314891931804002251463549922783166342 3932
UVM_INFO @ 1469097452 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 48418847518771422791088023465253104092243944939265128049803338010778700903125 3022
UVM_INFO @ 156572441 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 2332610872754077926143706013021090565459690364085293570297287149837583623580 1034
UVM_INFO @ 477881157 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 66043496361725101082302319199377222496935775940997934898684985347062591796746 1030
UVM_INFO @ 148258477 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 66995730255883885503105380213676988204748256602747219545890914464017004087558 2110
UVM_INFO @ 187441540 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 105934687287081830645038498993310237876434281110544586547674786841881675576736 7073
UVM_INFO @ 324765292 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 2121013379118682810108992116087542543796944428767148461814314149121281764731 3570
UVM_INFO @ 87087466 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 91508452188411858243203944061421157091079500822725615135707265530719921280939 334
UVM_INFO @ 60933130 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 92999274313484476602885803628533381309430517602229129311950377521659760216529 2296
UVM_INFO @ 1295456694 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 29452668626985137821345869362257272060648773304061297265080661929889595648625 1236
UVM_INFO @ 311842360 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 101219719322971143779633246211543933384907588243046159700813072011832334975582 4126
UVM_INFO @ 4954154068 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 61892856247743821972402394656520327263570134905847926564155602886286805831817 5176
UVM_INFO @ 1343775947 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 55347994926362305024787797531093031466642069246144785462787125899465875866241 3094
UVM_INFO @ 1546436202 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 57563192733476032301141831539844004605813268055645152201024231654433384582513 2667
UVM_INFO @ 482524787 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 73097529072908416337647572332283173266682291756513024800467402968605871005298 3028
UVM_INFO @ 268510387 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 46300258039107775995181568968662060328830571162066495534810879369137376409722 21553
UVM_INFO @ 1038477091 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 33382195891799483188356473876078160276726731143493866651123361010012822517177 1344
UVM_INFO @ 105548572 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 84066000157052075988666760949142011883314068857154202117608716610829536706574 3229
UVM_INFO @ 1459111011 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 27542264800235492940897790520586346953697381487158077544378146462924432135412 14059
UVM_INFO @ 1066802434 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 72858341000507363187632384939845991004700662106014306050425321263330503096764 6501
UVM_INFO @ 407411153 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 93694507840124728234309115366625333722605323531951670113577671163811756694390 1854
UVM_INFO @ 161306321 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 31323957374468517568811111971636079876537573533855826062973418658641657037723 1148
UVM_INFO @ 102371184 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 26284316318448752020515372493500448356533984953701271343535979316575662413228 2008
UVM_INFO @ 193226868 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 88449462384464826128958533389022418740118750400910368523962886893985068105817 960
UVM_INFO @ 175837594 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 22125711036043879244644639189773357072602329616875127285236434587178946251857 56280
UVM_INFO @ 3814734496 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 45208141168139560438309825765364379010450389720727425626226278874514034108925 1898
UVM_INFO @ 89589149 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 62572845513078072754256221878831674529532916372920567852907045890787304487978 3642
UVM_INFO @ 953757578 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 1611897451347568360946191289326351246206907819423490228081298205233292533764 4312
UVM_INFO @ 207613875 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 43492235294745438891863305005912029834520934513968230532234407965975492291881 7609
UVM_INFO @ 8938958219 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 11662338221193145771563978510727119918836067623168529380298923674732653648647 3062
UVM_INFO @ 151655941 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 50843777033601374036760485084804053846447663218890704975422116050616845553424 3071
UVM_INFO @ 339773325 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 87132045307483506691558194163807681705054970855937422386244615425012195237566 4210
UVM_INFO @ 95557649 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 29053058695686487476296794823980772307843264586924740745485821546173233494096 7283
UVM_INFO @ 567176315 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 6309638332723366133473220753096044716224852500615333649636125900753932837453 7427
UVM_INFO @ 696070848 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 70770412526651469561442340041000318249824469551382324905819276645118660810335 2460
UVM_INFO @ 103211771 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 87902052644010882531507113654828668008700826799016126997909111781300810919509 10263
UVM_INFO @ 13257298488 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 90713388872848264802461939537307589352696292527370595138870872199144555276757 6364
UVM_INFO @ 3543403891 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 25720522499738962746505346892330005408937118733039316178647974385165502975150 36780
UVM_INFO @ 2127610716 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 68087280416547004454818746461595622649695490625993071489464994216380913826310 554
UVM_INFO @ 998549813 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 64609761008767200932821272494639241956924369666366610686430071931059435519030 7603
UVM_INFO @ 414422454 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 90254947695813448756447835639599199075026240732506052884035186592195127477156 762
UVM_INFO @ 1487366251 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 17917445750260838645358541125158520756490918927090462206748216220402701019010 12086
UVM_INFO @ 3486056143 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 63981130595913663646054389128469246921819350570311270254075791454415576573070 7870
UVM_INFO @ 729142842 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 33342905649301053448285226073653211914058215204731873365999030428382843079868 884
UVM_INFO @ 345528309 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 30509264133501424014074864537657841980841830151946537736040974336427973215742 858
UVM_INFO @ 14545084325 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 20196473900669265024126550809808046995897253569579742718933774948499474214591 7390
UVM_INFO @ 362741607 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 6587957256088049810766030663621007111827978012858708476547530733836810850431 12638
UVM_INFO @ 2650977613 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 38565389666569065647181292968991012725173084776847509733816934431223773106139 828
UVM_INFO @ 2751581554 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 45846571720953442414557145228403093673288232688485766588155571093149719289735 13949
UVM_INFO @ 676789375 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 109930497012585195381448733767030422704143367748880904094234652324666857232026 1806
UVM_INFO @ 2679686379 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 98491854931433596989815443114103130397214687731969931611606801541181046361117 1506
UVM_INFO @ 1043546079 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 4579576391621363894416971513678109933848045516174488887540317545327756710440 7611
UVM_INFO @ 3156330467 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 94724232839592828531636886108566061559764629372573355429659771920006690251396 926
UVM_INFO @ 160373579 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 104475627479226103878564995368165517177327501606125556055197024003692198326793 905
UVM_INFO @ 565532023 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 23597012346350257552685418103861129839358549050555410244670539784854693017886 4949
UVM_INFO @ 13350390394 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 115450313834054449244200854309047011770542443141616055314608567784841945806316 53719
UVM_INFO @ 1138881036 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 111359645568580863834569980372760587776091564012875932999918546219763956780652 1704
UVM_INFO @ 309112617 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 96709190960721894322685918337107104205225088198934660216283737040155909741522 1218
UVM_INFO @ 89612692 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 1765506527314543986609806579935970915834950292040853327075772788802787583071 1914
UVM_INFO @ 63892452 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 60986113851552392586158185294634210545682222615270121987581221217163648977890 4640
UVM_INFO @ 818730938 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 114942249202370625179707530124829586627907831698059721744209232387986149846204 162
UVM_INFO @ 35691042 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 10802678316658543620111048826199037090091357670432011338042652231375983669613 2369
UVM_INFO @ 607658302 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 17719821499852103216728832667177726951167595943412265899875452373493085127513 1070
UVM_INFO @ 1660601150 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 94362133789562985469522923243092312489164766933056785291517514356315829191881 3036
UVM_INFO @ 314667728 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 84948643630238657779113357434992734826315977226145768043222008153145722390899 844
UVM_INFO @ 160426385 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 60558826377420655920680180719574392542488945910609537104450253781886179339913 1908
UVM_INFO @ 259476983 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 30109493730512297501449552287473693323059121638781523798852622340233725528924 2150
UVM_INFO @ 1036930508 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 26685651881345616447449963876331554311312038597389554510851020558539066619749 1450
UVM_INFO @ 301181219 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 111654752759173876116506987965325126298769825271388784624065129808914644537721 1764
UVM_INFO @ 1133873015 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 47176259094423142729916755009937457078422608946422130733943206325989683136613 296
UVM_INFO @ 154025068 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 2070263898819289367801099355800492828399384485393226235699387452993204981455 4396
UVM_INFO @ 96827519 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 61951437514497521139536184319938639422402656109251835916493216378072346452943 3218
UVM_INFO @ 81969127 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 69211796114308070577563714263753998282676741141800267125908984437045034341124 5498
UVM_INFO @ 2205628101 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.intr_state 43 test runs
otp_ctrl_dai_lock 47990674004854614958574934474458854615689800000092714623183673822963573624482 5333
UVM_INFO @ 211967248 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 33155839172820137913524968736809889623011559122718190367580661549822077451875 4506
UVM_INFO @ 5033183663 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 83767034700903535623115839542835190963602064369744600172588243845096556617174 21763
UVM_INFO @ 1923076052 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 83983558582348795301399745814268386917890440088144295076135863306261011860916 4427
UVM_INFO @ 3331452836 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 63670085636293265654186398276554243421891645625869994502491348084890419229958 11296
UVM_INFO @ 12825386386 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 11081824859617547750208724243613292844526136545489728680369076747003883248745 9459
UVM_INFO @ 480707396 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 20295581811498412841181633284142007562023071774251389998645200029179186141040 12672
UVM_INFO @ 1054756732 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 90551060026447421802512324800691988243522581696819923799264556033849300732485 6111
UVM_INFO @ 1111776657 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 2847235162058880338576426196186255954051704993194398404025028572252140377927 35461
UVM_INFO @ 5644782747 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 40542879702492638694483405934130848797166111978918945083535446732677777354764 19078
UVM_INFO @ 3040581050 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 16114630990043814583110495634855930731280101945290584262965129661417908986268 17208
UVM_INFO @ 6260666918 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 32878133520960011837844777738772573479101712801572397645211542858030537102747 13079
UVM_INFO @ 1268153313 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 30682748895500022586076286134840170157455557973379534485677704035566388435580 1122
UVM_INFO @ 339628427 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 7017822597101553338038943716048538985235261240900765987659165229613249714347 5340
UVM_INFO @ 495593947 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 7895962001117170612529952458093550148660523747241825328588816418998014574924 6159
UVM_INFO @ 4009083196 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 21815367773562192941792687853300391639496831450181508180990837751665768679969 3705
UVM_INFO @ 799788939 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 63141907607146785000724792293543060347381355695432919275470629701159570868988 9290
UVM_INFO @ 15089830121 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 75536587255031416107585112337314508173315690252790678561558495513434722893548 13891
UVM_INFO @ 400352900 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 36832309843716908130211880013424002215795666238448429574001377106973679934758 3792
UVM_INFO @ 634758244 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 51587133457007833321873427280535876964959799069572920377067537491378876115735 9941
UVM_INFO @ 1413092186 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 73376308208011730799022500500303080885410647416319783887505945017630797936113 3645
UVM_INFO @ 1242290406 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 71320664846990144774286491574948781495649627341341728036613908329410071995813 7565
UVM_INFO @ 492324180 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 33782955142392764686435709212554806902192299150193813177949683821341162553767 8686
UVM_INFO @ 9976272650 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 101319473855470252376899420928645560199347104711507817689738490898300546715628 8033
UVM_INFO @ 1456787764 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 58647991895210015135261747153759479188046453093337306469488405826530208394418 5153
UVM_INFO @ 1709311216 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 101028092523061556583992713014922659303495597757055958650598807871499620780557 2487
UVM_INFO @ 4032464705 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 39204189384420195449314445371485987447560718533690910021655905435215226883492 1801
UVM_INFO @ 409984924 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 74817891026738635441942602678287491120900357639497064563587413356513079932335 2078
UVM_INFO @ 1360936167 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 100634616331893187587667302011229592408561041722150012837343582982299662366516 239
UVM_INFO @ 471196267 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 73994945042385760348840329697542012293472458710624458198748973283016325398273 15590
UVM_INFO @ 2467529306 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 29965314403461317085558526895869732689993171122103341730975357504639025496122 244
UVM_INFO @ 9524721717 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 40183064744665691893312914364047721116850765943523333035526365519848666589029 5814
UVM_INFO @ 788330047 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 23438096223140167155755670295957599722748326474007912818711143277966028493600 2386
UVM_INFO @ 746398581 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 63975860094291709271241917915319283697766347423492068596071081338401269154119 16503
UVM_INFO @ 2058195603 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 34699041631608433108988239069638626876421439131000135951501038795467108488594 1778
UVM_INFO @ 521263010 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 31126149010854190509646932444119362312214106682955445311294022690401460088104 293
UVM_INFO @ 16688326102 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 3981004517566668565164909922236730341470831805636548229911633211657600072344 198
UVM_INFO @ 136492077 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 77441113109014857051865646170917075379316787049370490464818166171983374534097 7057
UVM_INFO @ 314765657 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 4954120797777818341630712739454726854067522049103585646205742237394535256573 1915
UVM_INFO @ 234799949 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 1021282644006655758708981597102317450821137444542122573135130322544733433428 14112
UVM_INFO @ 10131920310 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 6532407737249480376550540124478162612511685672270110762901063213777980468475 7874
UVM_INFO @ 4874502344 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 57282951155334331335723411478698013694203991475903966968874943136994013883688 3651
UVM_INFO @ 2059732174 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 57072946945518347933057734330144768121804680721180604179544744986137105528677 184
UVM_INFO @ 47659755 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_* 32 test runs
otp_ctrl_macro_errs 1130466986143239589690861562053433826156792273551888541156888372150059637291 2057
UVM_INFO @ 514546930 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 19024908254177563770785734921423178040269222030965260507821930960542920928073 588
UVM_INFO @ 191593691 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 79403448313341770100163438121255650468802902831302241049146347571623740201744 9734
UVM_INFO @ 2100320559 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 107582864372355703926610052316782501572454388486904929267741423489458027394025 4858
UVM_INFO @ 683608187 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 112841332761158329497796058786699062817584828181095660690059993619545227817667 1353
UVM_INFO @ 208671321 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 11210225091594395402610947411169393981590819973220161254277650538277541016120 12483
UVM_INFO @ 2126534793 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 13634274860394189187913476952425489719879984964451868696483747467719226641082 7443
UVM_INFO @ 773182856 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 106963799883821721545967388390218530711727205601952635275471478213989887023968 15254
UVM_INFO @ 2816879504 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 13406549945164012666637736770949855386537973660346828532508200735566543687948 4624
UVM_INFO @ 263546255 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 77364888564284600572641069332562198012313167824031402385939822411009132575484 2912
UVM_INFO @ 256589362 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 61121934180605008479453761278564044701435652828766983840754696921853720518266 4856
UVM_INFO @ 3218599142 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 87570573918811023829466118627871143814038895688639636458383944398413297016978 5154
UVM_INFO @ 688322688 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 38575719643560714230747687542601487592815132272179940040543184784743524374764 552
UVM_INFO @ 210127092 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 85609706045196671537511824895203966198960835076281053062308380076035374427723 6683
UVM_INFO @ 2613910505 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 53827725663161387734511977673450632539765166284847460159791453097142418793829 8558
UVM_INFO @ 1265665423 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 18907491991352808598917598322133407133001821490372147180819734085326482611747 11007
UVM_INFO @ 519885986 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 4522360711256274173316611479887646139791206790594715127877257122881564294846 4148
UVM_INFO @ 1653131275 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 82527475566534317592656792546669281578957421275502023134871681584413214801665 11362
UVM_INFO @ 495494783 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 33181641556978054574654531534145814560903173550006005735282092592516033862650 170
UVM_INFO @ 68143804 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 68141947138456007256877206063656385266017625213806503615046925994480286236954 11034
UVM_INFO @ 436757921 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 90639055525142384687634062956367878700135140451831341356387973541979398108127 6900
UVM_INFO @ 405102066 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 10083224369845289952440963948511962432307924007289404478912160159153447432157 6652
UVM_INFO @ 4346538567 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 96132719912092462688011562728247950058705009707188408928019421221407711445670 7953
UVM_INFO @ 10880420835 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 107828446747419640562956301325800462682005382794349828655251478226652511185863 6703
UVM_INFO @ 811709710 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 94855943000371046269135249492945662733550677520124764565876119458386905145142 4230
UVM_INFO @ 2889917671 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 32819964307938011711175687560089529075008387879273179664040613482795271076718 8483
UVM_INFO @ 1043909881 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 6034704850081694471504865948775870795134759886071852874654680794914756185682 959
UVM_INFO @ 809370220 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 36491583018785070019987643289998742229241402781982761760484126591128710988491 3606
UVM_INFO @ 4959500119 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 12021376646552188236157978285652871925704254519634339331766232904066069078635 1620
UVM_INFO @ 2553703224 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 32421095381022968290567444895758478438723786456536358775308933587998704504913 10556
UVM_INFO @ 1571799137 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 74594991838208758182844600765957519196316052698140771614475270622940394935296 2257
UVM_INFO @ 6394208768 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 54285000107662556634557894889622275200261989365868958856831621812085338471466 1098
UVM_INFO @ 369850487 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_scoreboard.sv:632) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) d_data mismatch when d_error = * 16 test runs
otp_ctrl_stress_all_with_rand_reset 73684400194321005480419297016963115062049743128605757059991998959803976626582 162
UVM_INFO @ 11979021391 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_csr_mem_rw_with_rand_reset 22028540205403968732739449484290835980618743083575792932319062301556572987340 91
UVM_INFO @ 44765760 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 27934814175553785705444941371957382563522813445419841874474948141694444788018 781
UVM_INFO @ 3491629798 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 56000430584195965485465509514622001127009999870909288252952803379733349899630 70407
UVM_INFO @ 63204671702 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 105636148111995019989500367265901079056755574585272644420954064294719779069028 91
UVM_INFO @ 55903463 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 19183662725659433842636440424897695858660613933520485704780208133620118014836 52910
UVM_INFO @ 1805711263 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 8693374880732719276026130740489508455194729491383172036913239276652134331595 92
UVM_INFO @ 97311411 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 46386660151664247504463843837821324067590693503611829088709899963765635951607 38917
UVM_INFO @ 5041075915 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 100494129059764260301136846715440396709449126121398895519562058506876122652570 9767
UVM_INFO @ 1865570462 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 6537094142019623816375361179107574012330280764583601632146470304386109042560 14173
UVM_INFO @ 1812305995 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 78792628485901462075056604621544768811561446014296412295946103221602118513073 91
UVM_INFO @ 124724970 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 65153640580535965104267985763368926930066051672853290364424536771753375123945 35790
UVM_INFO @ 8978108829 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 52717590652574478505249903454868407171841081738672975663009215672892728015050 91
UVM_INFO @ 63300373 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 91466251032809745597370615068939584741077097243133899269923095048682487564703 91
UVM_INFO @ 31085603 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 89186412234354512559088088765498969025792717754850522389882330216037667633350 5128
UVM_INFO @ 3266097133 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 38772381302162844069969625643931386017393795579965520591210777567603545198313 91
UVM_INFO @ 31006082 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:2213) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) d_data mismatch when d_error = * 12 test runs
otp_ctrl_stress_all_with_rand_reset 89248884929282701771729212795582338506381741641822002357770405916688659907904 15675
UVM_INFO @ 10439441966 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 75635092097665755563568320587082382741744504111069994504181943280145235149782 91
UVM_INFO @ 35808604 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 19848673866319706874748526566744543303946170132668756138971853240084566414521 315
UVM_INFO @ 5081055955 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 34695581174486937711369225451726419379515060895145111855272801901473142108683 12556
UVM_INFO @ 8327397622 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 65190676646829446393924582581271795975115953924286631470448839882645842719515 91
UVM_INFO @ 62438724 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 61987568071269976414736722453861975638061679572873658731174620221451354385864 91
UVM_INFO @ 31799150 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 55546729825529065609337199396585289718096284498034828773726905809905309503047 92
UVM_INFO @ 39472199 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 12053937996120144235056544489381893517672515681521272271021489457754112095740 2485
UVM_INFO @ 498823784 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 38282574298969862763098920745022853017916459178169432759909116296532753993452 7078
UVM_INFO @ 17990772137 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 45463741591838446000671622802300087263057917994876967831567141044509825192665 1529
UVM_INFO @ 320628452 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 32777000879765202003700278118679358750510290068414190123280460635436782571435 91
UVM_INFO @ 497428168 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 20596042264772498981711462251989266387590021692732701779914211263249399352838 161
UVM_INFO @ 69523329 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:671) [scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (* [*] vs * [*]) Interrupt_pin: OtpErr 11 test runs
otp_ctrl_dai_lock 10286811074776024438726515688135263615422903483294700922509635799778348280126 768
UVM_INFO @ 1443675713 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 68820640654409620713397611209122399398437594390167682535084089560952447522580 11630
UVM_INFO @ 16088188138 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 9338354643598363080872727442651432927480689498487360765625563013569018177203 11049
UVM_INFO @ 7577432393 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 5182645989950785645612003959474461392623547028474508824124170090304900485451 4117
UVM_INFO @ 348643059 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 19770178101678828564889837181682889883370984828662628571144132274508220396491 8902
UVM_INFO @ 2850465148 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 31037662789301478999091128625675222408301978670429781945650521499142341593618 12671
UVM_INFO @ 6365860373 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 113788811432038074717502452281665130332443660506972521868076923034885010488642 190
UVM_INFO @ 82500268 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 81018371610460120102276516149510912991372651485183836935836974797336062132795 6209
UVM_INFO @ 556728813 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 113177414353441714795108892070251429518539801116058170046778056255458799670867 18694
UVM_INFO @ 5295691144 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 22406692479458156331508715136253628782702492593444984435206997398815995419034 27963
UVM_INFO @ 3256164914 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 3467767807653860313884635876101153519344902754301948751941848608001583563578 8315
UVM_INFO @ 482374244 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:958) [scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (* [*] vs * [*]) reg name: status, compare_mask * 6 test runs
otp_ctrl_parallel_lc_req 97041009336490078326593253656225651267395394528673786663111431156034432008947 11209
UVM_INFO @ 681678462 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 6568185862003622290825695838878328867616173850137299475676297840745301956793 25113
UVM_INFO @ 2930785298 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 19281765867255863412918549530863709339019972008893693800939067680076257893096 11681
UVM_INFO @ 1633262766 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 70741690260904484015837436524265580355104846114807188940657533400496848622804 8045
UVM_INFO @ 1203226329 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 34580135876959909754975851369146848549300213886377735158920515057669125633515 4633
UVM_INFO @ 172713152 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 14929179999761303587610584348506328380714988072075389342830298820857636876303 965
UVM_INFO @ 858084272 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr *ed* rdata* readout mismatch 5 test runs
otp_ctrl_low_freq_read 6649180986921954451377041057140088918445761584492686533052156384436178420015 89
UVM_INFO @ 26268644725 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 70440768418995502171255164685014865680548492514523056125522819264135684111587 90
UVM_INFO @ 63038201352 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 33592687596303566319618622655498100969644578652806042780304640658301774408767 138
UVM_INFO @ 62685962070 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 16044066378294913086400679819445324916404691284249730966642776263296337605282 3396
UVM_INFO @ 26314057384 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 92201982464066104089375173629069611541458611713800240640740362377792426900238 90
UVM_INFO @ 26393061859 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.direct_access_regwen 2 test runs
otp_ctrl_stress_all_with_rand_reset 82376528228055822832085870528153382864989417816460826151183185405237185700870 1486
UVM_INFO @ 2640285220 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 93676810241096855814705435257404561374324983113159764514444603326838103941391 9361
UVM_INFO @ 2259527300 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:465) [otp_ctrl_parallel_lc_esc_vseq] wait timeout occurred! 2 test runs
otp_ctrl_parallel_lc_esc 89794533155327064264051194530981449455630659467479348016882642164591541565382 88
UVM_INFO @ 10010612942 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 9772752201988898772590147452953416337675319689611567056289791060095894853968 88
UVM_INFO @ 10002542926 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_partition_walk_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr *ed* rdata* readout mismatch 1 test run
otp_ctrl_partition_walk 13472094142365585617217798865752659317903324194034211816833339734696003263689 110187
UVM_INFO @ 15351216782 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '(cio_test_en_o == *)' 1 test run
otp_ctrl_stress_all_with_rand_reset 75937716553478382968486041341533046824724252500581275111765602006423842811572 92
UVM_ERROR @ 34503468 ps: (otp_ctrl_if.sv:389) [ASSERT FAILED] CioTestEnOWithDftOff_A
UVM_INFO @ 34503468 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:465) [otp_ctrl_common_vseq] wait timeout occurred! 1 test run
otp_ctrl_stress_all_with_rand_reset 106213747610933863918494556205347013098335541460603893807453741531179700364662 88
UVM_INFO @ 10002551509 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr * rdata* readout mismatch 1 test run
otp_ctrl_stress_all_with_rand_reset 54580471853230348285179622973269463444974717412969761822984952669338365729407 1820
UVM_INFO @ 5866618019 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1286) [otp_ctrl_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. 1 test run
otp_ctrl_stress_all_with_rand_reset 68773308290404890925708794533430738679847513411130417416290154150486073364878 14669
UVM_INFO @ 40270532407 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:465) [otp_ctrl_init_fail_vseq] wait timeout occurred! 1 test run
otp_ctrl_init_fail 85017710547535026650988402706652997736993796945986909629097042171055001708087 88
UVM_INFO @ 10008675336 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1365) [otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_check_error does not trigger! 1 test run
otp_ctrl_init_fail 36247089719198915824381620316685225194438780290860325636373892170697543621534 1942
UVM_INFO @ 3171024968 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---