Simulation Results: aes/gcm_masked

 
10/07/2026 15:00:28 DVSim: v1.49.0 sha: 58f8fdd json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 97.23 %
  • code
  • 98.01 %
  • assert
  • 98.57 %
  • func
  • 95.11 %
  • block
  • 98.06 %
  • line
  • 99.06 %
  • branch
  • 94.94 %
  • toggle
  • 98.05 %
  • FSM
  • 100.00 %
Validation stages
V1
100.00%
V2
96.24%
V2S
93.08%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 2.000s 180.211us 1 1 100.00
smoke 10 10 100.00
aes_smoke 5.000s 109.829us 10 10 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 2.000s 90.973us 1 1 100.00
csr_rw 5 5 100.00
aes_csr_rw 3.000s 82.002us 5 5 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 15.000s 3725.849us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 3.000s 766.202us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
aes_csr_mem_rw_with_rand_reset 2.000s 139.591us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
aes_csr_rw 3.000s 82.002us 5 5 100.00
aes_csr_aliasing 3.000s 766.202us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 70 70 100.00
aes_smoke 5.000s 109.829us 10 10 100.00
aes_config_error 18.000s 830.938us 50 50 100.00
aes_stress 6.000s 543.269us 10 10 100.00
key_length 70 70 100.00
aes_smoke 5.000s 109.829us 10 10 100.00
aes_config_error 18.000s 830.938us 50 50 100.00
aes_stress 6.000s 543.269us 10 10 100.00
back2back 35 35 100.00
aes_stress 6.000s 543.269us 10 10 100.00
aes_b2b 32.000s 477.441us 25 25 100.00
backpressure 10 10 100.00
aes_stress 6.000s 543.269us 10 10 100.00
multi_message 90 95 94.74
aes_smoke 5.000s 109.829us 10 10 100.00
aes_config_error 18.000s 830.938us 50 50 100.00
aes_stress 6.000s 543.269us 10 10 100.00
aes_alert_reset 3601.000s 0.000us 20 25 80.00
failure_test 80 85 94.12
aes_man_cfg_err 3.000s 425.231us 10 10 100.00
aes_config_error 18.000s 830.938us 50 50 100.00
aes_alert_reset 3601.000s 0.000us 20 25 80.00
trigger_clear_test 10 10 100.00
aes_clear 7.000s 267.525us 10 10 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 10.000s 418.258us 1 1 100.00
nist_test_vectors_gcm 1 1 100.00
aes_nist_vectors_gcm 13.000s 5772.691us 1 1 100.00
reset_recovery 20 25 80.00
aes_alert_reset 3601.000s 0.000us 20 25 80.00
stress 10 10 100.00
aes_stress 6.000s 543.269us 10 10 100.00
sideload 20 20 100.00
aes_stress 6.000s 543.269us 10 10 100.00
aes_sideload 62.000s 2395.523us 10 10 100.00
deinitialization 10 10 100.00
aes_deinit 13.000s 2266.567us 10 10 100.00
stress_all 3 10 30.00
aes_stress_all 10863.000s 0.000us 3 10 30.00
gcm_save_and_restore 100 100 100.00
aes_gcm_save_restore 7.000s 867.482us 100 100 100.00
alert_test 10 10 100.00
aes_alert_test 3.000s 53.533us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
aes_tl_errors 4.000s 176.537us 25 25 100.00
tl_d_illegal_access 25 25 100.00
aes_tl_errors 4.000s 176.537us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
aes_csr_hw_reset 2.000s 90.973us 1 1 100.00
aes_csr_rw 3.000s 82.002us 5 5 100.00
aes_csr_aliasing 3.000s 766.202us 1 1 100.00
aes_same_csr_outstanding 4.000s 461.927us 5 5 100.00
tl_d_partial_access 12 12 100.00
aes_csr_hw_reset 2.000s 90.973us 1 1 100.00
aes_csr_rw 3.000s 82.002us 5 5 100.00
aes_csr_aliasing 3.000s 766.202us 1 1 100.00
aes_same_csr_outstanding 4.000s 461.927us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 5 10 50.00
aes_reseed 11.000s 1056.221us 5 10 50.00
fault_inject 595 660 90.15
aes_fi 3601.000s 0.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 274 300 91.33
aes_cipher_fi 62.060s 10005.650us 321 350 91.71
shadow_reg_update_error 20 20 100.00
aes_shadow_reg_errors 3.000s 122.282us 20 20 100.00
shadow_reg_read_clear_staged_value 20 20 100.00
aes_shadow_reg_errors 3.000s 122.282us 20 20 100.00
shadow_reg_storage_error 20 20 100.00
aes_shadow_reg_errors 3.000s 122.282us 20 20 100.00
shadowed_reset_glitch 20 20 100.00
aes_shadow_reg_errors 3.000s 122.282us 20 20 100.00
shadow_reg_update_error_with_csr_rw 20 20 100.00
aes_shadow_reg_errors_with_csr_rw 4.000s 265.017us 20 20 100.00
tl_intg_err 30 30 100.00
aes_sec_cm 16.000s 1297.772us 5 5 100.00
aes_tl_intg_err 4.000s 328.558us 25 25 100.00
sec_cm_bus_integrity 25 25 100.00
aes_tl_intg_err 4.000s 328.558us 25 25 100.00
sec_cm_lc_escalate_en_intersig_mubi 20 25 80.00
aes_alert_reset 3601.000s 0.000us 20 25 80.00
sec_cm_main_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 122.282us 20 20 100.00
sec_cm_gcm_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 122.282us 20 20 100.00
sec_cm_main_config_sparse 134 145 92.41
aes_smoke 5.000s 109.829us 10 10 100.00
aes_stress 6.000s 543.269us 10 10 100.00
aes_alert_reset 3601.000s 0.000us 20 25 80.00
aes_core_fi 3600.000s 0.000us 94 100 94.00
sec_cm_gcm_config_sparse 254 260 97.69
aes_gcm_save_restore 7.000s 867.482us 100 100 100.00
aes_config_error 18.000s 830.938us 50 50 100.00
aes_stress 6.000s 543.269us 10 10 100.00
aes_core_fi 3600.000s 0.000us 94 100 94.00
sec_cm_aux_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 122.282us 20 20 100.00
sec_cm_aux_config_regwen 20 20 100.00
aes_readability 3.000s 333.011us 10 10 100.00
aes_stress 6.000s 543.269us 10 10 100.00
sec_cm_key_sideload 20 20 100.00
aes_stress 6.000s 543.269us 10 10 100.00
aes_sideload 62.000s 2395.523us 10 10 100.00
sec_cm_key_sw_unreadable 10 10 100.00
aes_readability 3.000s 333.011us 10 10 100.00
sec_cm_data_reg_sw_unreadable 10 10 100.00
aes_readability 3.000s 333.011us 10 10 100.00
sec_cm_key_sec_wipe 10 10 100.00
aes_readability 3.000s 333.011us 10 10 100.00
sec_cm_iv_config_sec_wipe 10 10 100.00
aes_readability 3.000s 333.011us 10 10 100.00
sec_cm_data_reg_sec_wipe 10 10 100.00
aes_readability 3.000s 333.011us 10 10 100.00
sec_cm_data_reg_key_sca 10 10 100.00
aes_stress 6.000s 543.269us 10 10 100.00
sec_cm_key_masking 10 10 100.00
aes_stress 6.000s 543.269us 10 10 100.00
sec_cm_main_fsm_sparse 0 10 0.00
aes_fi 3601.000s 0.000us 0 10 0.00
sec_cm_main_fsm_redun 620 685 90.51
aes_fi 3601.000s 0.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 274 300 91.33
aes_cipher_fi 62.060s 10005.650us 321 350 91.71
aes_ctr_fi 6.000s 50.195us 25 25 100.00
sec_cm_cipher_fsm_sparse 0 10 0.00
aes_fi 3601.000s 0.000us 0 10 0.00
sec_cm_cipher_fsm_redun 595 660 90.15
aes_fi 3601.000s 0.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 274 300 91.33
aes_cipher_fi 62.060s 10005.650us 321 350 91.71
sec_cm_cipher_ctr_redun 321 350 91.71
aes_cipher_fi 62.060s 10005.650us 321 350 91.71
sec_cm_ctr_fsm_sparse 0 10 0.00
aes_fi 3601.000s 0.000us 0 10 0.00
sec_cm_ctr_fsm_redun 299 335 89.25
aes_fi 3601.000s 0.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 274 300 91.33
aes_ctr_fi 6.000s 50.195us 25 25 100.00
sec_cm_ghash_fsm_sparse 0 10 0.00
aes_fi 3601.000s 0.000us 0 10 0.00
sec_cm_ctrl_sparse 620 685 90.51
aes_fi 3601.000s 0.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 274 300 91.33
aes_cipher_fi 62.060s 10005.650us 321 350 91.71
aes_ctr_fi 6.000s 50.195us 25 25 100.00
sec_cm_main_fsm_global_esc 20 25 80.00
aes_alert_reset 3601.000s 0.000us 20 25 80.00
sec_cm_main_fsm_local_esc 620 685 90.51
aes_fi 3601.000s 0.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 274 300 91.33
aes_cipher_fi 62.060s 10005.650us 321 350 91.71
aes_ctr_fi 6.000s 50.195us 25 25 100.00
sec_cm_cipher_fsm_local_esc 620 685 90.51
aes_fi 3601.000s 0.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 274 300 91.33
aes_cipher_fi 62.060s 10005.650us 321 350 91.71
aes_ctr_fi 6.000s 50.195us 25 25 100.00
sec_cm_ctr_fsm_local_esc 299 335 89.25
aes_fi 3601.000s 0.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 274 300 91.33
aes_ctr_fi 6.000s 50.195us 25 25 100.00
sec_cm_ghash_fsm_local_esc 90 100 90.00
aes_ghash_fi 7.000s 619.502us 90 90 100.00
aes_fi 3601.000s 0.000us 0 10 0.00
sec_cm_data_reg_local_esc 595 660 90.15
aes_fi 3601.000s 0.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 274 300 91.33
aes_cipher_fi 62.060s 10005.650us 321 350 91.71
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 10 0.00
aes_stress_all_with_rand_reset 60.000s 7549.990us 0 10 0.00

Error Messages

   Test seed line log context
Job timed out after * minutes 31 test runs
aes_stress_all 8766745673050810013147892643911036131996304155383546568804092309321902297786 None
aes_alert_reset 18802033371635230640773918357064377574425483602226616845851445838779231711681 None
aes_fi 30015096634241130325240259607983759191158904960291109793827592706777229176793 None
aes_alert_reset 90681747117831382138361665776299440380125476554267846006764282597412432898904 None
aes_alert_reset 103056100518301159612831244708889541030131466937072952590880336088433408023859 None
aes_cipher_fi 3818575904506467474715466767410233935549020583940213771988492903972578897772 None
aes_control_fi 114504500655710424866191681341189539289732014959645133969049632166935611284153 None
aes_cipher_fi 86206003883578122064234679699917884076651995194645335390565798724443837550483 None
aes_control_fi 51688830842517925654572028369796068112667780808789198532298999637121270287078 None
aes_cipher_fi 53198539366075874925659728296645957733912217845391326135202314696178615438771 None
aes_core_fi 70970993600155581990903108753270400574485997771366861637699272559772871609130 None
aes_control_fi 88153895966100677047936451013831894440688035042936252633320565945641032658875 None
aes_cipher_fi 40610984754582247779201452453592621308981228621779115981554599994148346578826 None
aes_cipher_fi 55881923196547449856927633269430169438418605365654054885265785320496704525664 None
aes_core_fi 18258095324816514660209488237365910650741904770866887555145002253131171963210 None
aes_control_fi 55412121341892067596358669802327117870569196039762908360176008062984104648167 None
aes_control_fi 14046496281745371187632185404984244577526741902834350327577755123497553538550 None
aes_control_fi 100174945499218442657458443162535887649643093432163976312452944134374722760505 None
aes_control_fi 11951737386123007903411498722705869199743249433269785294813093387057566154552 None
aes_cipher_fi 18243700753843168952679869681995797171986347426284003488393268948649383121209 None
aes_control_fi 83195760894402275206825085474115108336856677038210159144315411961008797422873 None
aes_control_fi 58799989212031793155011159670044996422346945115643473929832152811628902930932 None
aes_control_fi 5852379896197969740506442538709952901008930854817338636112044992813985041092 None
aes_control_fi 16832806483584947435222168778038818362654239260990196768585420895139058141665 None
aes_control_fi 19420147019455450280907009870646777283884592481455978205552162709987176559052 None
aes_control_fi 29259268704569894082889397804030199889690295537833421784288441776599208509191 None
aes_cipher_fi 13901117517721542587333393119209036637640093814237948713425184235886271191479 None
aes_control_fi 17437436217566760709816336589469151839324541553874262495057461981621149252907 None
aes_cipher_fi 70032141963894358716873877894348736589100954713309175531421509117508518606619 None
aes_cipher_fi 4592348658157577886342805889936021632221468220566793855959462890900633107355 None
aes_control_fi 38989818668810337629380172848012483840796434935492958707030534309515216484663 None
UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred! 18 test runs
aes_cipher_fi 115472493709757152517800369529000481934470300647629006539899113004398299297197 149
UVM_INFO @ 10014328189 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 46745482533162490201665010870826199738415502572119823597627525909908582412901 145
UVM_INFO @ 10008633482 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 78072495485860324649258005603134959623277800974128645752954218267223018561302 153
UVM_INFO @ 10011968959 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 89130148142629444446736888498456612866821165122047854370894756306954251979188 150
UVM_INFO @ 10021256916 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 20319465282929587071009532934490852208254697018777948642845650964087506779047 143
UVM_INFO @ 10010330059 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 44768855534070208624532190352807846886515880714887573637114012213814847836352 146
UVM_INFO @ 10013034280 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 114111185742346574887440316235980770367681326021599454870078688527513881739088 151
UVM_INFO @ 10006798251 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 49981817479482890408894514444257292415009726960775060996847541768987365798782 150
UVM_INFO @ 10004995997 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 52990731295019868153368717780638489885427773641468836541659363604277431672089 146
UVM_INFO @ 10024149520 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 18021518615230730515691744400326632506782069959598793499246163835583239389573 156
UVM_INFO @ 10006322961 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 103450059775233272696013042001207548036528251064339045217083572110019968039497 152
UVM_INFO @ 10009706016 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 42151276229187801120265783726689856877940346974973775206704705813642712927450 157
UVM_INFO @ 10016362189 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 107210703006753399270997436345022398508021691024126368197432051810439716346810 152
UVM_INFO @ 10019893214 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 23884231401179796736873476022607001128193188267092927181936796946415866786947 153
UVM_INFO @ 10008280946 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 70623914264451884688279354005433918086352501919187011324935946140618940125695 148
UVM_INFO @ 10021035011 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 7772698345838624316060639879228221688281862902764380508967282015258952684371 154
UVM_INFO @ 10012469831 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 80486224667719903237344800891081855684779448064318281465790758815921640597626 140
UVM_INFO @ 10013343873 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 44690741889456459562926439448223596796763926413440084692378768254468290005584 147
UVM_INFO @ 10042516085 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'parent_sequence' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues 16 test runs
aes_reseed 53788394037173486774408232634803588678311046167467764790036849533510890574226 2848
UVM_INFO @ 12606805 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 51691376132121320318152764256416273698037311356573731793037290075853990743601 28800
UVM_INFO @ 162589426 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 109683291853820838975591401066297785777645133616703686091305325860556973076508 979
UVM_INFO @ 7549990340 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 112425846905105514575426836487507410644851072761228285054268618256455199817559 634
UVM_INFO @ 7164127343 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 109967206400390559528937672560770129951714354588763914896768800167647887472898 580
UVM_INFO @ 4297195193 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_reseed 4683316639706413585830736733488792702544379236705223562894041646140102613899 7369
UVM_INFO @ 40119068 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 74916955023399304415495471698858104686631263867051572628665795256995187465105 60542
UVM_INFO @ 2194784503 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_reseed 82877621257722332911679842370372198124459834566410290044894983870818418617631 10517
UVM_INFO @ 73557507 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 24168649029174094411544650748115360234457900748467909177065513291841038105534 669
UVM_INFO @ 1479376766 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_reseed 106538573301759358231682519230257111480420846414552814248271953529067655196508 15382
UVM_INFO @ 239722696 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 81833811922856325660983296155083261869132702613677558268205649610196987415203 82611
UVM_INFO @ 1100636348 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 70339380517011839803468808268297857562923935781601790124844635797867726155541 58111
UVM_INFO @ 254107365 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_reseed 65386799059560430378799548742597130372405609700346381793210502611622487054427 3985
UVM_INFO @ 245314626 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 104526678089673978585632597689149734166473211096152103985550915939606904631620 198231
UVM_INFO @ 812214112 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 96387941381565486010607340405295693199219532824285456094536695835731333068326 435
UVM_INFO @ 225669689 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 9273626519396582569061419710590587784500138338036962690929230985735991152240 33222
UVM_INFO @ 290751642 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred! 11 test runs
aes_control_fi 101528701545664613278842511534632472378966209863706830616629002895738486310399 147
UVM_INFO @ 10015353909 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 74583451031989667618906295785841135080784442359780103782644355236212396594636 151
UVM_INFO @ 10016526963 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 21900693654295742287283751986635816255451175339266951107509488360199225747357 144
UVM_INFO @ 10009177933 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 5910216894352684066007834819869182596942222705156984105728357836410218255638 159
UVM_INFO @ 10013668929 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 21887291013533248467741919205152954172430250271174877718733018229319153553100 147
UVM_INFO @ 10008811272 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 21438526561594467504535949678978424662163145713302461966943560234405318685213 147
UVM_INFO @ 10015619946 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 32157492847849768576202599089371971037018018106967554826829844201442915726222 151
UVM_INFO @ 10007917606 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 21833756795548428335513365192929395564855336843604992571231889829337513823297 152
UVM_INFO @ 10012067093 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 11565967857160962481224749930165697824109659035418028538796664580113196145650 144
UVM_INFO @ 10011330707 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 98474494049868338359068659737644136823696493296827040357853422235860951946451 143
UVM_INFO @ 10085524276 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 99003965094976367101557743931915064799824540054025877871898150097884145239930 150
UVM_INFO @ 10022478583 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_scoreboard.sv:926) scoreboard [scoreboard] 8 test runs
aes_fi 58575007150225648618861389252240660061829352115964761071981627521790818153818 25750
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 4
----| Expected corrupted: 0
aes_fi 32642840104113496282447207621800949794080534877183043703628755422143894982276 18628
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 5
----| Expected corrupted: 0
aes_fi 113696235344024561834813052662800749834541128344141788053269736675557019176130 10835
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 5
----| Expected corrupted: 0
aes_fi 110069368752350136206399988975396745756835010786090270539676668425287387376017 7897
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 3
----| Expected corrupted: 0
aes_fi 80726389466510489905677815054160112757648331570095895791867888423564350951888 19225
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 3
----| Expected corrupted: 0
aes_fi 4556761751227084612901182209730020385848158842880206788649550786659224237412 18408
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 5
----| Expected corrupted: 0
aes_fi 108548430689618356322120227285916061077825427345220477442494499551841259591888 50750
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 3
----| Expected corrupted: 0
aes_fi 93570083767805973078519607174352979135019205887043316393111328744444950055358 19839
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 3
----| Expected corrupted: 0
UVM_FATAL (aes_core_fi_vseq.sv:70) [aes_core_fi_vseq] wait timeout occurred! 3 test runs
aes_core_fi 92606634437815880471970492667655016753616438166495575245301572506136939027146 149
UVM_INFO @ 10006979289 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 5881494253999462212404469406100536627365451091295655256198375488249932246543 149
UVM_INFO @ 10047245126 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 57405986030334621448616889703196620375421709753802968414080469959633011730645 145
UVM_INFO @ 10018552708 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue 2 test runs
aes_fi 97376072881317602629616229913992153483593831385391025842655584585763330607498 6587691
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 99824824735823573070600354316059408412625911006674787338411057558290499266044 149
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_base_vseq.sv:87) [aes_stress_all_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) 2 test runs
aes_stress_all_with_rand_reset 17225127453505403318221897638353745571922106852817281294682488479275017532028 112
UVM_INFO @ 8606784 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 58976660945526576167680037201057460448994064098542041055314707125167917221723 112
UVM_INFO @ 4336833 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1220) [aes_common_vseq] Check failed (vseq_done) 2 test runs
aes_stress_all_with_rand_reset 77465834355194782692566307785384959121595980408892105597630661345456926151217 207
UVM_INFO @ 65466629 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 57892690231559400194765239629705613907077623793648449225469031197227613998995 507
UVM_INFO @ 1893295847 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_base_vseq.sv:322) virtual_sequencer [aes_stress_vseq] Expected GCM phase GCM_AAD, got GCM_TEXT 1 test run
aes_stress_all_with_rand_reset 55599485355141639365738526951486614572317378262527775441591322542330507480508 173
UVM_INFO @ 61399269 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_scoreboard.sv:255) scoreboard [scoreboard] alert fatal_fault has unexpected timeout error 1 test run
aes_alert_reset 72674104561480410800214386646878196070887898173741724341099161008725045899884 2015
UVM_INFO @ 50949329 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_gcm_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_*/rtl/aes_core.sv,1137): Assertion AesSecCmDataRegLocalEscDataOut has failed (* cycles, starting * PS) 1 test run
aes_alert_reset 23758922186026908909798030810273185908128709202955948424390036897535190332096 671
($past(iv_q) != $past(state_done_transposed, 2) ^ $past(data_in_prev_q, 2)))
|
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_gcm_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_core.sv,1143): (time 16254312 PS) Assertion tb.dut.u_aes_core.AesSecCmDataRegLocalEscIv has failed (2 cycles, starting 16208857 PS)
UVM_ERROR @ 16254312 ps: (aes_core.sv:1137) [ASSERT FAILED] AesSecCmDataRegLocalEscDataOut
UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=4) 1 test run
aes_cipher_fi 113024877141548417470120768402009079230771201496977247833219087005071730969206 138
UVM_INFO @ 10020362052 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3) 1 test run
aes_cipher_fi 79055243374501947130243116575931413768432477427775055739595952366220851913280 138
UVM_INFO @ 10014494203 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---