Simulation Results

Simulation Results: gpio

10/07/2026 15:00:28 DVSim: v1.49.0 sha: 58f8fdd json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
96.01 %

code
89.60 %

assert
98.42 %

func
100.00 %

line
99.89 %

branch
97.61 %

cond
94.60 %

toggle
80.88 %

FSM
75.00 %

Validation stages

V1		100.00%
V2		92.36%
V2S		96.67%
V3		40.00%
unmapped		100.00%

53/53 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				40	40	100.00
	gpio_smoke	2.300s	476.747us	10	10	100.00
	gpio_smoke_no_pullup_pulldown	1.950s	405.978us	10	10	100.00
	gpio_smoke_en_cdc_prim	2.080s	96.509us	10	10	100.00
	gpio_smoke_no_pullup_pulldown_en_cdc_prim	2.040s	218.840us	10	10	100.00
csr_hw_reset				1	1	100.00
	gpio_csr_hw_reset	1.050s	67.057us	1	1	100.00
csr_rw				5	5	100.00
	gpio_csr_rw	1.090s	23.493us	5	5	100.00
csr_bit_bash				1	1	100.00
	gpio_csr_bit_bash	7.750s	767.967us	1	1	100.00
csr_aliasing				1	1	100.00
	gpio_csr_aliasing	2.400s	422.125us	1	1	100.00
csr_mem_rw_with_rand_reset				5	5	100.00
	gpio_csr_mem_rw_with_rand_reset	1.520s	231.977us	5	5	100.00
regwen_csr_and_corresponding_lockable_csr				6	6	100.00
	gpio_csr_rw	1.090s	23.493us	5	5	100.00
	gpio_csr_aliasing	2.400s	422.125us	1	1	100.00

145/157 passed

92.36 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
direct_and_masked_out				20	20	100.00
	gpio_random_dout_din	2.060s	42.479us	10	10	100.00
	gpio_random_dout_din_no_pullup_pulldown	1.670s	116.344us	10	10	100.00
out_in_regs_read_write				10	10	100.00
	gpio_dout_din_regs_random_rw	1.300s	222.798us	10	10	100.00
gpio_interrupt_programming				10	10	100.00
	gpio_intr_rand_pgm	1.640s	222.217us	10	10	100.00
random_interrupt_trigger				10	10	100.00
	gpio_rand_intr_trigger	4.450s	101.117us	10	10	100.00
interrupt_and_noise_filter				10	10	100.00
	gpio_intr_with_filter_rand_intr_event	5.700s	109.834us	10	10	100.00
noise_filter_stress				10	10	100.00
	gpio_filter_stress	23.190s	1156.346us	10	10	100.00
regs_long_reads_and_writes				10	10	100.00
	gpio_random_long_reg_writes_reg_reads	9.070s	1474.984us	10	10	100.00
full_random				10	10	100.00
	gpio_full_random	1.650s	103.930us	10	10	100.00
stress_all				0	10	0.00
	gpio_stress_all	116.390s	85210.533us	0	10	0.00
alert_test				10	10	100.00
	gpio_alert_test	0.960s	30.645us	10	10	100.00
intr_test				10	10	100.00
	gpio_intr_test	0.950s	73.855us	10	10	100.00
tl_d_oob_addr_access				25	25	100.00
	gpio_tl_errors	4.020s	197.044us	25	25	100.00
tl_d_illegal_access				25	25	100.00
	gpio_tl_errors	4.020s	197.044us	25	25	100.00
tl_d_outstanding_access				10	12	83.33
	gpio_csr_rw	1.090s	23.493us	5	5	100.00
	gpio_same_csr_outstanding	1.550s	205.454us	3	5	60.00
	gpio_csr_aliasing	2.400s	422.125us	1	1	100.00
	gpio_csr_hw_reset	1.050s	67.057us	1	1	100.00
tl_d_partial_access				10	12	83.33
	gpio_csr_rw	1.090s	23.493us	5	5	100.00
	gpio_same_csr_outstanding	1.550s	205.454us	3	5	60.00
	gpio_csr_aliasing	2.400s	422.125us	1	1	100.00
	gpio_csr_hw_reset	1.050s	67.057us	1	1	100.00

V2S

29/30 passed

96.67 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
tl_intg_err				29	30	96.67
	gpio_tl_intg_err	3.460s	691.879us	24	25	96.00
	gpio_sec_cm	1.330s	90.104us	5	5	100.00
sec_cm_bus_integrity				24	25	96.00
	gpio_tl_intg_err	3.460s	691.879us	24	25	96.00

8/20 passed

40.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
straps_data				8	10	80.00
	gpio_rand_straps	0.920s	16.097us	8	10	80.00
stress_all_with_rand_reset				0	10	0.00
	gpio_stress_all_with_rand_reset	11.560s	1964.798us	0	10	0.00

unmapped

50/50 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
Unmapped				50	50	100.00
	gpio_inp_prd_cnt	0.940s	22.772us	50	50	100.00

Error Messages

	Test	seed	line	log context
UVM_ERROR (gpio_scoreboard.sv:248) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs [*])				12 test runs
	gpio_stress_all	103173875373276499776832572262449763046855282963776906307565069394113483499981	1294	UVM_INFO @ 3365471920 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	4124656660764046763467740144257776634549103353845433069283011041646046958924	463	UVM_INFO @ 2810746618 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	89272468555505943405707431119128774326320629057546177131514908740153546888932	2707	UVM_INFO @ 85210532743 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_rand_straps	78259982112413222583614044466886036986907074751479078996311321709224901532213	75	UVM_INFO @ 3619776 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	2039089938374926422369819345131490846756123484746558096352045247357856292962	221	UVM_INFO @ 661236332 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	81145844312259981130636249657151377847936740254158455233706451690294804338373	1227	UVM_INFO @ 61840855089 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	5021376963813355889486599219250557877725407342827755474993760293311655499030	77	UVM_INFO @ 38826744 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	79855543669340322693606213908989486135117459337664102679072189686891796379748	579	UVM_INFO @ 2222484654 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	35959947706628979408274873649894366527442117195958143386600478122723971571431	1466	UVM_INFO @ 7502372999 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_rand_straps	59564255837080200935946566284922940089418232183315086851726514547789030002747	75	UVM_INFO @ 1499086 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	58119950829040233575957162172922999187986003986974961749980501972247382719734	125	UVM_INFO @ 752668468 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	50227441393717911369376125669964670555851931402027651432658538859897085267270	1178	UVM_INFO @ 3968567366 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -*				6 test runs
	gpio_stress_all_with_rand_reset	19160692984359882444516482337955438362532900030978818555279368841408664626095	81	UVM_INFO @ 1038470396 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	62046859105819806731398238581819901196774393232433558101224386633954137949550	181	UVM_INFO @ 129759864 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	56159749484087154262271911101638828295650834408146051930491304412715793120551	232	UVM_INFO @ 336763815 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	73784385362550996089592843879676942025980319021686527097673332009299438900023	293	UVM_INFO @ 1964797983 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	81605897797286956085402037692648726979521083250194198274329706680291648090589	78	UVM_INFO @ 2978321 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	4367546524944402973497936993291127550666994716373055438327487361759536723051	185	UVM_INFO @ 585277058 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1220) [gpio_common_vseq] Check failed (vseq_done)				4 test runs
	gpio_stress_all_with_rand_reset	1940677442290770237849329538348504033910849365608982745742079798684750944085	93	UVM_INFO @ 584302853 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	55939340829479468824825850930491166631974876894179970539777425882327334914350	81	UVM_INFO @ 110242210 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	98581405156121681530639445083871269471174110675779558814850532226460027436439	81	UVM_INFO @ 11719613 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	77234275935641164631178914798896834549005481047287370957844183321658021844178	80	UVM_INFO @ 3126553 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:660) [gpio_common_vseq] Check failed masked_data == exp_data (* [] vs []) addr read out mismatch				2 test runs
	gpio_same_csr_outstanding	72705747984626492745894081490952867168774502855017298528290762192899004633262	77	UVM_INFO @ 289763372 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_same_csr_outstanding	81201736825958425438906785938587936573824292782888234496590150919186166689488	77	UVM_INFO @ 127303768 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_] Check failed obs == exp ( [] vs []) Regname: gpio_reg_block.inp_prd_cnt_ctrl_ reset value: *				1 test run
	gpio_tl_intg_err	49104238115620061451682228862804856634815747966177858062863142452860602217412	181	UVM_INFO @ 49313413 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---