Simulation Results

Simulation Results: otp_ctrl

10/07/2026 15:00:28 DVSim: v1.49.0 sha: 58f8fdd json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
85.88 %

code
80.61 %

assert
94.89 %

func
82.14 %

line
88.35 %

branch
86.43 %

cond
88.52 %

toggle
89.41 %

FSM
50.33 %

Validation stages

V1		92.31%
V2		72.64%
V2S		73.33%
V3		14.85%

24/26 passed

92.31 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
wake_up				1	1	100.00
	otp_ctrl_wake_up	2.130s	58.421us	1	1	100.00
smoke				9	10	90.00
	otp_ctrl_smoke	15.040s	7162.156us	9	10	90.00
csr_hw_reset				1	1	100.00
	otp_ctrl_csr_hw_reset	3.080s	482.716us	1	1	100.00
csr_rw				5	5	100.00
	otp_ctrl_csr_rw	2.790s	124.236us	5	5	100.00
csr_bit_bash				1	1	100.00
	otp_ctrl_csr_bit_bash	8.230s	1155.053us	1	1	100.00
csr_aliasing				1	1	100.00
	otp_ctrl_csr_aliasing	10.210s	1480.564us	1	1	100.00
csr_mem_rw_with_rand_reset				4	5	80.00
	otp_ctrl_csr_mem_rw_with_rand_reset	4.620s	244.615us	4	5	80.00
regwen_csr_and_corresponding_lockable_csr				6	6	100.00
	otp_ctrl_csr_rw	2.790s	124.236us	5	5	100.00
	otp_ctrl_csr_aliasing	10.210s	1480.564us	1	1	100.00
mem_walk				1	1	100.00
	otp_ctrl_mem_walk	1.650s	43.050us	1	1	100.00
mem_partial_access				1	1	100.00
	otp_ctrl_mem_partial_access	1.590s	43.582us	1	1	100.00

547/753 passed

72.64 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
dai_access_partition_walk				0	1	0.00
	otp_ctrl_partition_walk	109.210s	2844.212us	0	1	0.00
init_fail				204	300	68.00
	otp_ctrl_init_fail	7.720s	2407.776us	204	300	68.00
partition_check				22	60	36.67
	otp_ctrl_background_chks	11.860s	8810.972us	4	10	40.00
	otp_ctrl_check_fail	19.330s	4524.156us	18	50	36.00
regwen_during_otp_init				17	30	56.67
	otp_ctrl_regwen	12.370s	370.060us	17	30	56.67
partition_lock				14	30	46.67
	otp_ctrl_dai_lock	46.140s	18348.481us	14	30	46.67
interface_key_check				5	10	50.00
	otp_ctrl_parallel_key_req	17.350s	1598.241us	5	10	50.00
lc_interactions				199	210	94.76
	otp_ctrl_parallel_lc_req	22.500s	9121.621us	9	10	90.00
	otp_ctrl_parallel_lc_esc	48.930s	2940.347us	190	200	95.00
otp_dai_errors				23	25	92.00
	otp_ctrl_dai_errs	84.970s	35889.039us	23	25	92.00
otp_macro_errors				3	10	30.00
	otp_ctrl_macro_errs	15.820s	988.923us	3	10	30.00
test_access				3	10	30.00
	otp_ctrl_test_access	13.950s	4480.996us	3	10	30.00
stress_all				1	10	10.00
	otp_ctrl_stress_all	82.060s	29741.096us	1	10	10.00
intr_test				9	10	90.00
	otp_ctrl_intr_test	27.630s	10014.671us	9	10	90.00
alert_test				10	10	100.00
	otp_ctrl_alert_test	4.290s	867.666us	10	10	100.00
tl_d_oob_addr_access				25	25	100.00
	otp_ctrl_tl_errors	10.180s	2609.002us	25	25	100.00
tl_d_illegal_access				25	25	100.00
	otp_ctrl_tl_errors	10.180s	2609.002us	25	25	100.00
tl_d_outstanding_access				12	12	100.00
	otp_ctrl_csr_hw_reset	3.080s	482.716us	1	1	100.00
	otp_ctrl_csr_rw	2.790s	124.236us	5	5	100.00
	otp_ctrl_csr_aliasing	10.210s	1480.564us	1	1	100.00
	otp_ctrl_same_csr_outstanding	3.930s	152.958us	5	5	100.00
tl_d_partial_access				12	12	100.00
	otp_ctrl_csr_hw_reset	3.080s	482.716us	1	1	100.00
	otp_ctrl_csr_rw	2.790s	124.236us	5	5	100.00
	otp_ctrl_csr_aliasing	10.210s	1480.564us	1	1	100.00
	otp_ctrl_same_csr_outstanding	3.930s	152.958us	5	5	100.00

V2S

484/660 passed

73.33 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
sec_cm_additional_check				4	5	80.00
	otp_ctrl_sec_cm	355.120s	60342.829us	4	5	80.00
tl_intg_err				29	30	96.67
	otp_ctrl_sec_cm	355.120s	60342.829us	4	5	80.00
	otp_ctrl_tl_intg_err	45.190s	22198.089us	25	25	100.00
prim_count_check				4	5	80.00
	otp_ctrl_sec_cm	355.120s	60342.829us	4	5	80.00
prim_fsm_check				4	5	80.00
	otp_ctrl_sec_cm	355.120s	60342.829us	4	5	80.00
sec_cm_bus_integrity				25	25	100.00
	otp_ctrl_tl_intg_err	45.190s	22198.089us	25	25	100.00
sec_cm_secret_mem_scramble				9	10	90.00
	otp_ctrl_smoke	15.040s	7162.156us	9	10	90.00
sec_cm_part_mem_digest				9	10	90.00
	otp_ctrl_smoke	15.040s	7162.156us	9	10	90.00
sec_cm_dai_fsm_sparse				4	5	80.00
	otp_ctrl_sec_cm	355.120s	60342.829us	4	5	80.00
sec_cm_kdi_fsm_sparse				4	5	80.00
	otp_ctrl_sec_cm	355.120s	60342.829us	4	5	80.00
sec_cm_lci_fsm_sparse				4	5	80.00
	otp_ctrl_sec_cm	355.120s	60342.829us	4	5	80.00
sec_cm_part_fsm_sparse				4	5	80.00
	otp_ctrl_sec_cm	355.120s	60342.829us	4	5	80.00
sec_cm_scrmbl_fsm_sparse				4	5	80.00
	otp_ctrl_sec_cm	355.120s	60342.829us	4	5	80.00
sec_cm_timer_fsm_sparse				4	5	80.00
	otp_ctrl_sec_cm	355.120s	60342.829us	4	5	80.00
sec_cm_dai_ctr_redun				4	5	80.00
	otp_ctrl_sec_cm	355.120s	60342.829us	4	5	80.00
sec_cm_kdi_seed_ctr_redun				4	5	80.00
	otp_ctrl_sec_cm	355.120s	60342.829us	4	5	80.00
sec_cm_kdi_entropy_ctr_redun				4	5	80.00
	otp_ctrl_sec_cm	355.120s	60342.829us	4	5	80.00
sec_cm_lci_ctr_redun				4	5	80.00
	otp_ctrl_sec_cm	355.120s	60342.829us	4	5	80.00
sec_cm_part_ctr_redun				4	5	80.00
	otp_ctrl_sec_cm	355.120s	60342.829us	4	5	80.00
sec_cm_scrmbl_ctr_redun				4	5	80.00
	otp_ctrl_sec_cm	355.120s	60342.829us	4	5	80.00
sec_cm_timer_integ_ctr_redun				4	5	80.00
	otp_ctrl_sec_cm	355.120s	60342.829us	4	5	80.00
sec_cm_timer_cnsty_ctr_redun				4	5	80.00
	otp_ctrl_sec_cm	355.120s	60342.829us	4	5	80.00
sec_cm_timer_lfsr_redun				4	5	80.00
	otp_ctrl_sec_cm	355.120s	60342.829us	4	5	80.00
sec_cm_dai_fsm_local_esc				194	205	94.63
	otp_ctrl_parallel_lc_esc	48.930s	2940.347us	190	200	95.00
	otp_ctrl_sec_cm	355.120s	60342.829us	4	5	80.00
sec_cm_lci_fsm_local_esc				190	200	95.00
	otp_ctrl_parallel_lc_esc	48.930s	2940.347us	190	200	95.00
sec_cm_kdi_fsm_local_esc				190	200	95.00
	otp_ctrl_parallel_lc_esc	48.930s	2940.347us	190	200	95.00
sec_cm_part_fsm_local_esc				193	210	91.90
	otp_ctrl_parallel_lc_esc	48.930s	2940.347us	190	200	95.00
	otp_ctrl_macro_errs	15.820s	988.923us	3	10	30.00
sec_cm_scrmbl_fsm_local_esc				190	200	95.00
	otp_ctrl_parallel_lc_esc	48.930s	2940.347us	190	200	95.00
sec_cm_timer_fsm_local_esc				194	205	94.63
	otp_ctrl_parallel_lc_esc	48.930s	2940.347us	190	200	95.00
	otp_ctrl_sec_cm	355.120s	60342.829us	4	5	80.00
sec_cm_dai_fsm_global_esc				194	205	94.63
	otp_ctrl_parallel_lc_esc	48.930s	2940.347us	190	200	95.00
	otp_ctrl_sec_cm	355.120s	60342.829us	4	5	80.00
sec_cm_lci_fsm_global_esc				190	200	95.00
	otp_ctrl_parallel_lc_esc	48.930s	2940.347us	190	200	95.00
sec_cm_kdi_fsm_global_esc				190	200	95.00
	otp_ctrl_parallel_lc_esc	48.930s	2940.347us	190	200	95.00
sec_cm_part_fsm_global_esc				193	210	91.90
	otp_ctrl_parallel_lc_esc	48.930s	2940.347us	190	200	95.00
	otp_ctrl_macro_errs	15.820s	988.923us	3	10	30.00
sec_cm_scrmbl_fsm_global_esc				190	200	95.00
	otp_ctrl_parallel_lc_esc	48.930s	2940.347us	190	200	95.00
sec_cm_timer_fsm_global_esc				194	205	94.63
	otp_ctrl_parallel_lc_esc	48.930s	2940.347us	190	200	95.00
	otp_ctrl_sec_cm	355.120s	60342.829us	4	5	80.00
sec_cm_part_data_reg_integrity				204	300	68.00
	otp_ctrl_init_fail	7.720s	2407.776us	204	300	68.00
sec_cm_part_data_reg_bkgn_chk				18	50	36.00
	otp_ctrl_check_fail	19.330s	4524.156us	18	50	36.00
sec_cm_part_mem_regren				14	30	46.67
	otp_ctrl_dai_lock	46.140s	18348.481us	14	30	46.67
sec_cm_part_mem_sw_unreadable				14	30	46.67
	otp_ctrl_dai_lock	46.140s	18348.481us	14	30	46.67
sec_cm_part_mem_sw_unwritable				14	30	46.67
	otp_ctrl_dai_lock	46.140s	18348.481us	14	30	46.67
sec_cm_lc_part_mem_sw_noaccess				14	30	46.67
	otp_ctrl_dai_lock	46.140s	18348.481us	14	30	46.67
sec_cm_access_ctrl_mubi				14	30	46.67
	otp_ctrl_dai_lock	46.140s	18348.481us	14	30	46.67
sec_cm_token_valid_ctrl_mubi				9	10	90.00
	otp_ctrl_smoke	15.040s	7162.156us	9	10	90.00
sec_cm_lc_ctrl_intersig_mubi				14	30	46.67
	otp_ctrl_dai_lock	46.140s	18348.481us	14	30	46.67
sec_cm_test_bus_lc_gated				9	10	90.00
	otp_ctrl_smoke	15.040s	7162.156us	9	10	90.00
sec_cm_test_tl_lc_gate_fsm_sparse				4	5	80.00
	otp_ctrl_sec_cm	355.120s	60342.829us	4	5	80.00
sec_cm_direct_access_config_regwen				17	30	56.67
	otp_ctrl_regwen	12.370s	370.060us	17	30	56.67
sec_cm_check_trigger_config_regwen				9	10	90.00
	otp_ctrl_smoke	15.040s	7162.156us	9	10	90.00
sec_cm_check_config_regwen				9	10	90.00
	otp_ctrl_smoke	15.040s	7162.156us	9	10	90.00
sec_cm_macro_mem_integrity				3	10	30.00
	otp_ctrl_macro_errs	15.820s	988.923us	3	10	30.00

15/101 passed

14.85 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
otp_ctrl_low_freq_read				0	1	0.00
	otp_ctrl_low_freq_read	68.830s	26270.279us	0	1	0.00
stress_all_with_rand_reset				15	100	15.00
	otp_ctrl_stress_all_with_rand_reset	2721.900s	1325683.699us	15	100	15.00

Error Messages

	Test	seed	line	log context
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_] Check failed obs == exp ( [] vs []) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value:				112 test runs
	otp_ctrl_partition_walk	109856250232266741563326497574541111641532142456196656081959712685629094013867	160055	UVM_INFO @ 2844212293 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	14785370207393025608792818632519739762170759369513409573220006804166177723952	1433	UVM_INFO @ 53514712 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	66739032893146860600504728045272540579123557785838130896676924081966959779064	6556	UVM_INFO @ 1022808758 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_smoke	53582834459452019247345647944784891257591808651080790691261063008090018520639	3556	UVM_INFO @ 344268732 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	100480059842185377907722938518148072838975062347703346384696191958084599962088	285	UVM_INFO @ 911275839 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	18240046064152119449344221554819680421072114991987755776327245665418830687596	2236	UVM_INFO @ 130448469 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	107633268106530550213160729010531694284219780000446809668288305190127784987003	925	UVM_INFO @ 1099378971 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	30351355355695439882255394465265055640827451334862423171997512462018649415420	3816	UVM_INFO @ 360843704 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	115767371506211042705686848774969394972881432522079550739269637681971855817152	99	UVM_INFO @ 814145599 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	65311037413255192881368301480291280051075773829947316878627132321952429759756	141	UVM_INFO @ 80663104 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	54343961572306934186336421427830130231708863865423564935832027594647468068805	589	UVM_INFO @ 234686503 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	49032409001139886329063113536281053417450172388949734289182046652394162150031	4814	UVM_INFO @ 239137976 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	97662521742954574612623823493580164378408082993452923434524905482469516342434	2506	UVM_INFO @ 106574268 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	80897579102803258734871493527875492735991876163821873340398458862403568629727	489	UVM_INFO @ 77086058 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	57133669901126519613643309181454135737668359733672218663941809683563677769635	2054	UVM_INFO @ 1015992888 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	28259719864462434671955495465703529263691033239926911108703310157520768382209	2430	UVM_INFO @ 91004905 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	66725420610576870176993617043031895791306608898439313956977337195849132532673	593	UVM_INFO @ 155557453 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	52073365608104484191701402453395498231278522981605864920471835418853122756	2146	UVM_INFO @ 297401078 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	7331557098862207451221940263835553352934030943935659108233213707761409729438	2191	UVM_INFO @ 163015648 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	14471897219425800201371459112942943614734459087981246196315425459093205790228	8756	UVM_INFO @ 262961070 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	92462368994849288886281913858295179576669907208115940866039390405986081858170	6932	UVM_INFO @ 3684685732 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	104744569443010056259869318251099171908850468319779020209386535208455153474054	1793	UVM_INFO @ 60485819 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	42914419521702970114581207976634899419828794768545322916286511994021316450576	309	UVM_INFO @ 137973081 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	94293763271126246923674209135787064502065035649163734927794161582702653619649	5662	UVM_INFO @ 451251679 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	48663033718218691485399215440605474443539203285286339313945761404554278559488	535	UVM_INFO @ 68630858 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	54614312848539772141469783613397825071720690813290764411332244332425434377524	1429	UVM_INFO @ 1286694692 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	652276765150947668706306084722396452504344909523241610701204923776668006584	2158	UVM_INFO @ 80857450 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	76479660675705458451053960796094117796072930701295269686639213008304496938359	1420	UVM_INFO @ 95421204 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	21360435729091974982372023774980292721767518567770268792188526717129118232954	99	UVM_INFO @ 127765268 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	13438166019489059561057830031632925710942770784289938095723722907749396755756	181	UVM_INFO @ 32199924 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	90895796177060119364253339045542815457183077943910996686613144762637546590466	325	UVM_INFO @ 69045606 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	20349363336777207714398955103002872580690849179376373965697422916889444864114	1641	UVM_INFO @ 116500155 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	104062814412258870126969213533765701381158398544237797291907613820334080816320	2757	UVM_INFO @ 1215237841 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	109588070745245748031017526299311286340100442395678053877768295590219379888742	99	UVM_INFO @ 61973276 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	112776343595945388294600038725181802155715021805037679945595667599154937465537	389	UVM_INFO @ 43788774 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	12323274768260340039659283923774449005345512003157659438037366623083116623176	859	UVM_INFO @ 253849452 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	82792883607176365821795361502670990466071338858208020714924454251541376695391	987	UVM_INFO @ 93391804 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	49323510417710666664735320697233851099773832865121781639286735194263386220078	1489	UVM_INFO @ 77248147 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	57179684266221130624623399587315634918497465294447549954752129626184561038114	409	UVM_INFO @ 35193950 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	39507232152225808627486967072898241505203090700337287951917880296717153677843	99	UVM_INFO @ 41685178 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	56916204167896717015165146754432005752426161844666596955958930787803785659037	625	UVM_INFO @ 78468021 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	86867042499007485930057718042443015055068219491978962153071850018522787624202	1951	UVM_INFO @ 376224348 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	67933005778555591058437189466629688550468792556188822280633166202886246750974	225	UVM_INFO @ 122152768 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	62339998688018953363493936886728904060060426942113901722195746467723452232210	5291	UVM_INFO @ 2562326600 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	110109818441176183103413914362480013999018099878083854917814508921139571509617	1599	UVM_INFO @ 58927075 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	56699008995181935249993981301610257377449793333662012213258822405629295610450	467	UVM_INFO @ 149783789 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	97282578782341469435372295749528256352219287421140922359455588843140433787180	1263	UVM_INFO @ 119293325 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	104580830922241494975999403696020191671960080669643381136965234256566449163696	409	UVM_INFO @ 42120163 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	80956507418324864723173442318717834303347910199412506439512963614414609164333	1333	UVM_INFO @ 1162598625 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	90196408165631512982875186548885706329411968604312024705057248722271332560732	675	UVM_INFO @ 82496337 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	72351669653861229238125992549483881361332162301012523119658239769725134723783	477	UVM_INFO @ 688849490 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	44801196980849259703280278644001078682973048828083519941507893381119194475791	225	UVM_INFO @ 219900094 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	1481216061959113920258182292729774727893715418790513153686822351707534297703	99	UVM_INFO @ 33823369 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	73067619170623362588363654049873553087426594933426985812292909390407485953314	423	UVM_INFO @ 754845711 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	106440487877635828257113126514552082641628854469810058376372373335195841293095	921	UVM_INFO @ 47424147 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	83726975135031247976257310042942107035693738474423602622337019988399781901938	1549	UVM_INFO @ 169385540 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	63974344104525208833212199657510362977168386487060481199638955151923360678019	869	UVM_INFO @ 87731708 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	23186026362708459566336758343412728418850279973172685770688268988300127738124	509	UVM_INFO @ 38372235 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	16704119785324274236118173170328529240612422106717206498319845934150787169343	867	UVM_INFO @ 146968978 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	34857651643487542051648244568440885042351148022851556795789874198427899722419	367	UVM_INFO @ 141839516 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	29769898495726400158381555854598317714070314822645081265193338394159462314999	283	UVM_INFO @ 35676618 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	105681367976597494099624401106553969954581014175884911008225930526938479963093	1441	UVM_INFO @ 882291219 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	59363004848170514278379300211691551528454104766774179916766799886242309550533	615	UVM_INFO @ 763245139 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	48366633728532459730857183260650545851525883542712369270620485875547125294124	265	UVM_INFO @ 36510796 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	2889144237479210987003001404471730358861576132383730892126537867393255945465	2009	UVM_INFO @ 127412470 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	87729799122800635591244284692281850460769482616453033509045840652700751352497	661	UVM_INFO @ 85397591 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	43404126142228869819077119136525793776882257260080986584182906771557367317228	785	UVM_INFO @ 168891236 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	15556407261521726110662807443750674932375831348956504171340259859209181281	1355	UVM_INFO @ 208653536 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	35302617978132610523502602844282975276102164580258809408736651122438157626108	1445	UVM_INFO @ 54945682 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	33219128298936200749411052299421616915229837371669964107364850167034824953970	367	UVM_INFO @ 95725572 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	60848639341854394548984980908691060866685404399992067691041432399385839543629	1509	UVM_INFO @ 137054905 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	45947015986783875265123188658072121565289963472679470710040360826612483955985	309	UVM_INFO @ 68283969 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	16558881904691834393358475327433168519439644901041927258529948049634816812448	347	UVM_INFO @ 147188300 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	94889192596941879642672719440202547937993608633141607913026288167831360553599	427	UVM_INFO @ 99504342 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	34889321788914788677153343585403463484751904165611878043469545014976926695585	183	UVM_INFO @ 543415414 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	1854213145125396189314793692362598780904172025134239242985431457096559609069	687	UVM_INFO @ 50518149 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	103517347376749162937521258478582585868922548616570081548955074783790729978756	431	UVM_INFO @ 66851641 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	113932582176186358529919770067142124622932396312741138318731317137569167227282	281	UVM_INFO @ 134130280 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	54719215063745465821164083366914073644450895088307242905942790066667227291004	2023	UVM_INFO @ 288742433 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	49662297154829110079263105028822942586386430313194400206561361252590510994868	1429	UVM_INFO @ 106624585 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	33687054299735961122277613341995613493960641119221441765082976107913236365498	549	UVM_INFO @ 45137697 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	26296381934012246708883982892437324322189093899204402022627338846222070111085	1807	UVM_INFO @ 70523229 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	90067760405810067139289532644879417150870692378913480552419822995340413070928	1931	UVM_INFO @ 1280878900 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	57027646558978200607679989296707199481735216788056572798243479560301184240540	1753	UVM_INFO @ 231089782 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	35597071123532120875555558213936926444041522538620758649469205412980559815036	1361	UVM_INFO @ 84485646 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	88783638676006396232065483060909237225436788935549879050462960008407836851701	1009	UVM_INFO @ 60999476 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	49984292136236595030321601754715865924869519212945869286376548882982051999249	617	UVM_INFO @ 660247343 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	112158599135688505412728252287787582234572252245563795491845720873345593059171	1197	UVM_INFO @ 820973480 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	52837865103795243833925971223436343940617213454246841094333191311161816042706	283	UVM_INFO @ 123206721 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	23550178247222778044906135181077069797590977724043052465736395173073487412091	493	UVM_INFO @ 128378861 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	72754041124942004374075855864694577924989224928238696445633217121293612286782	1001	UVM_INFO @ 190019079 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	35863810130393235004411543165710764979686313594325220237746654375813032343881	743	UVM_INFO @ 44012658 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	81500014292598788876229337196392283514050588070511941400285537298453545538920	451	UVM_INFO @ 52650979 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	33701346709069532717865627574283510660001362680089230240994095476247581268457	1753	UVM_INFO @ 946622718 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	86697094853032886453427861920451296059136603387910320903095477611976128011337	1031	UVM_INFO @ 123375673 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	105906815369493190906431697713090043100045630300334269166561608863634238821565	677	UVM_INFO @ 71405156 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	1518182945800734136243323084923676138903613318644647677762668162260265412378	309	UVM_INFO @ 70600801 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	58837018964698555853153876675096132503532602294798557354104494711241560562387	517	UVM_INFO @ 158934622 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	94540692136796298064279119486293016213056641262843268007885330910362670499071	2495	UVM_INFO @ 224927642 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	42032623192039137515314694162297710873487406552981100844918551302925605685928	1531	UVM_INFO @ 60306760 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	84392434518299575994350799208158483450913071688914649279415919871829669742735	1443	UVM_INFO @ 97194591 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	93814322209413491596335116244627763879328941474554505500106456701780549536822	183	UVM_INFO @ 557601240 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	110071835122018792392796556934076674320827180114476514187340008033290624411806	857	UVM_INFO @ 173731315 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	109405514874110432156235773160487129892244995684924175969206070245842494101245	1109	UVM_INFO @ 105168942 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	95955102944930385124980280876759201038073940765243119137147531872824794116278	283	UVM_INFO @ 84099041 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	69070853554220015908678375349111628261038569252251966563183577593072797503601	2755	UVM_INFO @ 95084019 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	77616973404588061154269563058375636466684377998908822619111650687845041099376	141	UVM_INFO @ 89588967 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	95089552577829954440620499490480185809828969285464809230757799195352076174411	1519	UVM_INFO @ 69841513 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	19872063285673361272892813494574570032151619529183650726614411488907284333553	241	UVM_INFO @ 553702357 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	51831394522755700188820785328099273461771970471629977984363445398142160430800	225	UVM_INFO @ 65709911 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	20378247857149072084411844790840676814646920709117816952071088838754986931072	141	UVM_INFO @ 121372468 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	73072275036628552075373605411305679281330535112420089834217588429036056256272	407	UVM_INFO @ 606335193 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs []) reg name: otp_ctrl_core_reg_block.err_code_				71 test runs
	otp_ctrl_dai_lock	73920765270100833771371743513667949704935446707110242615359189837070511113470	2980	UVM_INFO @ 3563272289 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	39849549986121046556964959046490453318667272377951213491946391936965877462170	1912	UVM_INFO @ 169567054 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	108809528802486346337429332280511761659129234280592257207718119535381340018291	2233	UVM_INFO @ 105791367 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_background_chks	91996436631577225046073500815168535876109041614054813667595323896559530332410	1632	UVM_INFO @ 1166979283 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	56111941360822480759441862922865740003655323813744179414323391639366320352357	501	UVM_INFO @ 78928912 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_background_chks	2284187887001775979390797964820511842243203769440748037775268850122191399795	3459	UVM_INFO @ 2426990624 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_key_req	63045932010808746126084917460095286175077138031823374345247487190456537971733	2462	UVM_INFO @ 122147712 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	13045186869224868247603990442390037577248117116277091996450491006331054300981	3376	UVM_INFO @ 196585058 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_background_chks	51034931090823659019838616795743971406928836830057204494567175261284335742784	8555	UVM_INFO @ 421398108 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	97492628614582727068208586071771524897611365892637711694050045229260727798135	3846	UVM_INFO @ 1225214409 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_errs	48444984158569166193424825240787161635779355097554796140000664136041673674792	6876	UVM_INFO @ 648347759 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_key_req	64692885547264161748935506316007826043848374772338502848091121243957713278041	3947	UVM_INFO @ 298250549 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	6463629836256537127931604458817881447713235992618129731495740424446508762850	739	UVM_INFO @ 556518515 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_background_chks	28670093365013343263501047262776484659925497506918045646046927872537100925916	4728	UVM_INFO @ 503252150 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	32159587907645067889465422640830782405184737160845013343701684139715970156351	4263	UVM_INFO @ 1388163529 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	83406499036342759359971612580671408400803060121589743552184460053839340880184	256	UVM_INFO @ 218977384 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	50323793283767738520890129372798060016060038100980502570293898724081750426723	2779	UVM_INFO @ 109914579 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	39402399217766612712507474874315614504365318313564813231344536093396327736633	3354	UVM_INFO @ 373979704 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	8983335085626347885820878511660122079677618989460726358318144446545012966400	16332	UVM_INFO @ 29741096300 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	36578064237754847756766991796030718974616803415758571347822228749145679909939	6727	UVM_INFO @ 421420068 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_errs	53792523066417539002878427793252785218335234340139282953562383540249923044015	5366	UVM_INFO @ 153273108 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_key_req	64325556181842623379475501554075467225176755462156246129242493960278037260060	570	UVM_INFO @ 55258949 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	86976975736674318221604744329211000024571721258071013080939740718190863720661	160	UVM_INFO @ 38583100 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	42158911035575922739713727766051779652783425547042190473593172507992596583329	7684	UVM_INFO @ 571269988 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	48577383037294329485925160145235302998148073857094087741626950441710341993275	1752	UVM_INFO @ 381883077 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_background_chks	99376719438428274840395265744859840166662615991657232270103725912833610180635	3543	UVM_INFO @ 1365060189 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	34849794881062218118883759223762033164270583341853953034708569379133078006890	880	UVM_INFO @ 708891829 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	14102303900299603462662517663469788020070372593130575057363154854053775916115	3206	UVM_INFO @ 7469572188 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	5456326234517674134114446581194768979730112272110805794050173508367842661933	630	UVM_INFO @ 1188499292 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	74342411846359667468604039914038862432214401939068065389168428871820575811309	3869	UVM_INFO @ 426762866 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	43189245082716136556244132614064931383596524408319442084627179122591892064202	37393	UVM_INFO @ 15101973272 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	34518644436922666719665610229234599812996004278720013563000772089168127625382	3963	UVM_INFO @ 2730042540 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	108936679083979330748893435381867253292085572502216590006771297974191116584733	1504	UVM_INFO @ 228298763 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	94669962735560065647146581158809715207188072215856673590011601385364529358420	2412	UVM_INFO @ 67278607 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	102733354301768925250852028180803045414209729467655484896993253292716144098941	3103	UVM_INFO @ 532843703 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	47012618504226782486251152239399887723737069490451829771601338821885578665401	2212	UVM_INFO @ 118358914 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	66384494494584037496502182630631579931555772896129350259009389302153902493603	1600	UVM_INFO @ 159579826 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	85420528291248288118570514124501436724334397676341684866134705837442463536552	2232	UVM_INFO @ 2950522562 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	57210517680702925248831349822127917592666611600241229082776860408611542567756	3727	UVM_INFO @ 2163190247 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	54112282884139823774622769720620488646437118968433117936433198046098068637674	5267	UVM_INFO @ 6758920499 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	109739288854224121974455808689067640109537019475808501909639652068921688292311	3782	UVM_INFO @ 183459924 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	24428486521024529907553303609807135900878327105903362286797379177122394069639	2976	UVM_INFO @ 314342296 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	23889314171485779000356999354807949526674643723582809998167165676492907971388	3188	UVM_INFO @ 158939169 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	23221276113081430270297897589319897525147513435638494348117105659217944837402	5186	UVM_INFO @ 339923710 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	30002995602101690486920985278438688483969297878499373005276188023002070158886	5149	UVM_INFO @ 190856411 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	73779375341517919696193607063969503695023850833232866969513382346980056174812	14190	UVM_INFO @ 19526301254 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	5294386516888418250378359633087956224177318481656648294463157176315673877669	2045	UVM_INFO @ 839121848 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	101042829204769488655213401511225543748299619588156756702290594234936461669616	5091	UVM_INFO @ 884583482 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	55145172771867551659715171833911431964534956113059784981513514400779427718142	6663	UVM_INFO @ 491729295 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	42138570403275293950907841752548345741894574366329792991491891118673539441311	1173	UVM_INFO @ 893570631 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	110696738336428569610329960768091505250017597915586833432856320054856952719979	708	UVM_INFO @ 275480554 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	62209364161939817402580090852400089026468367542976508246873691168000848665822	3720	UVM_INFO @ 985973016 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	32275903373361452677846960972657247511920519842849221888147693974815113348691	1100	UVM_INFO @ 279604261 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	69681086304336214152435884267695574590945846616746001082237444589119945966987	422	UVM_INFO @ 106345276 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	91693795730337830401040604129588165459441350052878464578433635841674524158505	4509	UVM_INFO @ 18535532571 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	58927666245423679516916349143418825671959894678328779221521615924312852212911	4425	UVM_INFO @ 2225724061 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	100735984014090365423441662731849114770696049303640262057817598073569119523526	3029	UVM_INFO @ 1550363252 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	43184886306267253476485948315985689595031377587459952075349113675600102903933	3200	UVM_INFO @ 106630966 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	63334556789653367593749428085669984269783956564574242466623271987591144202201	592	UVM_INFO @ 139419489 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	95861455582097154217607582826531732418197002413416240903417645561414691399394	2307	UVM_INFO @ 767948977 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	76331588121812833497180918607902728891683063953282523110169910096569654295274	12409	UVM_INFO @ 3747808451 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	53267037431374028990620282425889402735518364314823997938821170569122811495121	13433	UVM_INFO @ 4188344872 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	56564650293760822654638262170285280743914983977864724739529277750121748200078	20676	UVM_INFO @ 55720495032 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	88173137085464324162621348008378812364000803446880023322393635586981719059104	1615	UVM_INFO @ 534441326 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	115440808374478463897985869223321454942926021096101468125797882643809526633315	2182	UVM_INFO @ 1423747995 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	53424389203507624386566123228199014214072946789063771340879799610997655456329	896	UVM_INFO @ 157100189 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	97015234760010391619418084397684185458202449227316082223216800948463644248534	1540	UVM_INFO @ 878875833 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	114615335614310920349551145755296116150572135798922816514144466774393383773159	1446	UVM_INFO @ 247129488 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	77779803989962746656259981760106019861250874320264300300338987356283091425999	3382	UVM_INFO @ 1533415225 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	15348272638111021401974214275516010582519259187883151258648531213293610564555	1252	UVM_INFO @ 198159938 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	82293870919421906655169918170650580564372629223830046119942422553882710554278	1228	UVM_INFO @ 221994955 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs []) reg name: otp_ctrl_core_reg_block.direct_access_rdata_				33 test runs
	otp_ctrl_macro_errs	17823719983336046455495693871392600394959717780933184693686963162285397575092	4001	UVM_INFO @ 170646340 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	56057497585199404009849437833436945433547734824067200596279285567227455888455	2003	UVM_INFO @ 242929319 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	106608727944850877505150684173459944349250607153682619801989010819196743523889	5334	UVM_INFO @ 1076131481 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	49785179323580907007753123698561687366114977049219898609347180795813175833666	10642	UVM_INFO @ 723629460 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	52269105773768325722161226469565912451376957551685395349967760183858643903381	8366	UVM_INFO @ 786385887 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	31343919720146898000575398374284382959731433995571145796467273378775532998577	1424	UVM_INFO @ 321278925 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	33613432268493135834244303559625174907047823626322443856084002336352920207917	43372	UVM_INFO @ 1716699073 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	32354752834946562957329672949109747856969917854231480492226606442778625690240	3598	UVM_INFO @ 1589377347 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	72479130455936385863731381790631726875676891700926332591098773095467543026900	4942	UVM_INFO @ 1948752421 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	6300010297834643158492624227842900576075624891598040957817683274310933728937	764	UVM_INFO @ 116731168 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	106342271331020256927900281034539237044189602281095953992440640346120923071938	10910	UVM_INFO @ 988923147 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	107198914659098281289388438985303349095647076993184998836714830939303182400534	5935	UVM_INFO @ 708338068 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	86186939098834153986185573495517851019634053188890035072690189922099719291978	2925	UVM_INFO @ 7245619743 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	109951218018317941537737347987189868822669803553058813301941254393569657137056	17984	UVM_INFO @ 1101957656 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	4237578035104870485365368871969534345905476407490094545042128469297901310506	4549	UVM_INFO @ 340250603 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	110467350049074255874539405388010094351779740194309419947830602013814675195310	3715	UVM_INFO @ 156348518 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	15715710295478441808301805139531773805952998732550005226680167453481680611327	4238	UVM_INFO @ 885510821 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	21692728137068314869136457230680829077650516162750925671952529716222414615016	322	UVM_INFO @ 130073270 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	57754412482367277081068084801832508444251017730157709946137838075037407287888	3117	UVM_INFO @ 1007053205 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	54808037134854537318456919926862466049990973662346634755749478259057793411343	4651	UVM_INFO @ 1319834544 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	110336794584498122835420844129789417562315952094409168381124074594335787179600	470	UVM_INFO @ 119179936 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	10774555169797698198751070938237761558869510651890670227719886585860107128470	262	UVM_INFO @ 271987378 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	106023022632416366700744804710543064679808304959491902783797310381805351844403	7701	UVM_INFO @ 199204783 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	51858299429049845696976432039741042685333450645101104412015717460575195859534	6607	UVM_INFO @ 2602532723 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	63334771873038683071322346005220608573864728161451596758042298115393544776604	1472	UVM_INFO @ 607049804 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	101714850170689773397545805440844701049096015808865858638999877768160809444717	5434	UVM_INFO @ 7849701297 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	49999966592333064221773170392513128011655918291445767758934158264629541773699	7445	UVM_INFO @ 1395065309 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	5172498937877872572339362464317616071928556170352261781094631781770836543757	6467	UVM_INFO @ 27000342397 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	29336831699196852454263130210150327814131550771190210002170514489927626759246	16012	UVM_INFO @ 560256528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	115485644993065547682560938996000269959761913552344409656763933182262867114971	12532	UVM_INFO @ 29382899592 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	22022294917186446735407733151196403860931059875865483378380266397682532303949	930	UVM_INFO @ 339936973 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	89770413799095617017315637677443669442760573791305962194514308873723620124585	1398	UVM_INFO @ 93301925 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	48266880590137748237314806669719156442033026822086323593238381842002248861475	28196	UVM_INFO @ 1061881979 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs [*]) reg name: otp_ctrl_core_reg_block.intr_state				30 test runs
	otp_ctrl_dai_lock	91464306111024506944954463954814828830763717327509121403462154139375282218957	6249	UVM_INFO @ 2557296794 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	31456712993672880458344733868293380900311360582788098296744415874802421865395	17815	UVM_INFO @ 3701802361 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	85664301408505115279350988998835641918895643966846320914558341529356752376956	6143	UVM_INFO @ 1137806537 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_key_req	82839031577372361333793461835069762272820623403989813472395551582401041932669	11016	UVM_INFO @ 1147337544 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	79423485646823521655445605169342546674850210488133026131468362755653166268299	9743	UVM_INFO @ 377864410 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	15795033388027952742651790761409216261697202825437041041275056869808880640435	5556	UVM_INFO @ 6580090510 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	92119049028050382587530173048832612481517904969994135715481662512607446116625	3344	UVM_INFO @ 957852110 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	804451714152643650284454889184373640434557286480976881966446703202564231283	8463	UVM_INFO @ 242864222 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	73633490529764602292187575391005491560054070943657294153215742290790509155408	7464	UVM_INFO @ 3632344974 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	20471117374092330881755704281840810851669192499400946130302027851288614886860	2629	UVM_INFO @ 16837950913 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	108702990165735507642793285269590162425778847165563145156321801113636988666505	17588	UVM_INFO @ 9437504014 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	94597033302745483844939438224318459420648211181643901137873467689808223834965	27477	UVM_INFO @ 56675744032 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	23067690556886888973941626246808466350280577367113446888032240732609190498521	7249	UVM_INFO @ 1895433754 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	27997159663860899642052917988329108012614984891672733351275578252328323292667	729	UVM_INFO @ 4752337630 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	57896085910929801440439032452292132917579368611832622093081139526983565163125	1796	UVM_INFO @ 647674812 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	38176441811868289825523271025413994341695700413117999063077862246861274564089	8969	UVM_INFO @ 5487158158 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	92675393535871015020072756353875827743014092340194435777722785534263761529845	24561	UVM_INFO @ 9343963356 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	6946685511133137661289743994839187222462007823183830229964749753853500760612	2096	UVM_INFO @ 1406241851 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	112677482934397999646625547337816240515841581767690905510686420674497164888342	2966	UVM_INFO @ 1675642727 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	30314026038177536696883335226944537843087577156303491924259477844845640826165	216	UVM_INFO @ 88014040 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	39355046156146947021387540233528146772301553222550763512362739386816332074618	340	UVM_INFO @ 261948257 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	40507214197829612489427696842847095164178698837825735451143030622098643053941	2447	UVM_INFO @ 1965543725 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	43678162096900517146738580815533942595644678394061490318155788868289286858644	877	UVM_INFO @ 244244774 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	98675936176302996517924661183005608878058838756825594711180619678967079898392	10880	UVM_INFO @ 462935498 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	48830590338774037678575651176335889202594295554710698092478036720065357999945	6240	UVM_INFO @ 24860585638 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	54151191921307736689176580344625032657767707910724277821183110913901394484736	460	UVM_INFO @ 165652222 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	114056245410754641078633882915754760016679941095618610385230097505063410095471	5023	UVM_INFO @ 1910052798 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	3703546195180060735890903914913983331756673810564878592886790325738641095129	3318	UVM_INFO @ 491364315 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	112904729720898159996880673249905126959910241171057811176589132686917318131009	168	UVM_INFO @ 40795713 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	113023066352693565145689638255506351324737967921003756159054202816724664591143	1223	UVM_INFO @ 88717079 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:2213) [scoreboard] Check failed item.d_data == exp_data (* [] vs []) d_data mismatch when d_error =				14 test runs
	otp_ctrl_stress_all_with_rand_reset	59304830210746076126991800316358377165654804906072706275220264314605427721070	1408	UVM_INFO @ 17102937468 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	52700812317692633052527113323209970131167498143133297231415480668202155927247	28056	UVM_INFO @ 3282203283 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	5239445127856006579972922030517087271730638295634853413500437510303608162660	7497	UVM_INFO @ 881016253 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	41829967926183382164580157736859603022889716982435499941752441960175858494258	91	UVM_INFO @ 59763161 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	110241580046718898750230936264856101960602868279906550719061795814654231921826	165	UVM_INFO @ 63768671 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	34797296075920679194818029676160389753029134635189500283935676036329103217188	8160	UVM_INFO @ 1601417957 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	22184164729748643855522499830843959200987185588291032605946902327877541406308	2161	UVM_INFO @ 250905991 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	81018728744026656254515993339418138431912523678680006191843057984319534109378	91	UVM_INFO @ 44626577 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	2285558923041756073021135293246556450851866251842397762773072445539663794567	38753	UVM_INFO @ 22671250610 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	27048528053431107667838812499639543343607423850290190477042009544377128115289	154	UVM_INFO @ 147483952 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	102165830279265683699073433913833438280150460313145494686556724337823125340565	2064	UVM_INFO @ 11964326030 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	68109527212275049168279257411817645989226627740587977650744030597404477191543	2208	UVM_INFO @ 3516913570 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	88914734351007460572452619996116574578486538678609782676217246221974063981388	12257	UVM_INFO @ 2777673481 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	70353283583300481885564852285227587521414651370740916663476662183687092309445	91	UVM_INFO @ 94092448 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:671) [scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (* [] vs [*]) Interrupt_pin: OtpErr				12 test runs
	otp_ctrl_parallel_key_req	67293884510022103120287833133362364380243116508247898790240895413602033128341	1261	UVM_INFO @ 1793265075 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	957504873114433934659062507817382356256243214122932077872847439585980265005	25540	UVM_INFO @ 752074833 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	112081916593285013074509280038045956329062431499103611434837814410352871997948	14538	UVM_INFO @ 18348481367 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	10249802384222249161067681438487437750119370062876243112538961606200393799382	19672	UVM_INFO @ 2844821299 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	6492191934872118654669129724971516235829474076241701670544318495563637858343	5488	UVM_INFO @ 812757668 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	41108379032378971812347449974572822945799118040544561561474289298403233302788	10959	UVM_INFO @ 409114846 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	52568705813741433856523952047407188589609781959968522792618829463745777485295	7109	UVM_INFO @ 306958140 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	105268196800219953619329603802562204553779271641558008830451522196992566959703	7973	UVM_INFO @ 657746236 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	111429173902242459143733866364595909425460829839453784449510699551917203077614	22808	UVM_INFO @ 3262153998 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	111318257189851446132094292535935017608609465441531994860351074287463400340594	19486	UVM_INFO @ 1391600283 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	64464692597576640176609561817710306538617093911892301884091554776363916894399	13085	UVM_INFO @ 1263308093 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	58681671294269359850164720558360325063672147174561150229940301459496531596562	9288	UVM_INFO @ 911437619 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (cip_base_scoreboard.sv:632) [scoreboard] Check failed item.d_data == exp_data (* [] vs []) d_data mismatch when d_error =				8 test runs
	otp_ctrl_stress_all_with_rand_reset	84974743954597314956191663178844294023937208012660128647563885818152213058442	91	UVM_INFO @ 119754914 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_csr_mem_rw_with_rand_reset	68456911580623940797169387294267513306120250860424361565813118570870691495672	91	UVM_INFO @ 503613570 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	105651542330304580552591882579992443159277262581618092288583697538021785243734	20018	UVM_INFO @ 12106546377 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	71215743336593999503510944543314488841036950442200891021095150938166856305302	91	UVM_INFO @ 497984919 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	1470671302101015120654958386838667963041036607484406645073986591608029960435	91	UVM_INFO @ 31744636 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	111418469984998199974432246420250697556373415650819140016591104376529757462165	5229	UVM_INFO @ 3651628191 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	32060777575819894921350258682843333727804459663343471916478110119818010658683	92	UVM_INFO @ 500059912 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	2949090226531849952904425206751903818205115068371184411202354965987366373105	91	UVM_INFO @ 501935733 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_WARNING (uvm_reg_field.svh:1191) [RegModel] Trying to predict value of field 'err_code' while register 'otp_ctrl_core_reg_block.err_code_*' is being accessed				4 test runs
	otp_ctrl_stress_all_with_rand_reset	61437009965042463535363313491801913379027854087497802046710293797606687217547	939	UVM_INFO @ 4010917573 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 4011417574 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 4013084244 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 4014584247 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
	otp_ctrl_stress_all_with_rand_reset	25355476940925692283732910936781145678452700866285192071580302792652512481644	1810	UVM_INFO @ 502731264 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 502851264 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 502951264 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 503171264 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
	otp_ctrl_stress_all_with_rand_reset	95288982474901353440028958716351172037114747744229472328048703250331325058480	920	UVM_INFO @ 318750112 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 318770946 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 318864699 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 318937618 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
	otp_ctrl_stress_all_with_rand_reset	83372701248811061992409572773420458922412315663013596730486764757665389898224	738	UVM_INFO @ 703415881 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 703832551 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 704499223 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 705165895 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_FATAL (cip_base_vseq.sv:465) [otp_ctrl_common_vseq] wait timeout occurred!				3 test runs
	otp_ctrl_intr_test	7789988974375383197571709523750892867554293321543020703194152555415376445565	88	UVM_INFO @ 10014670665 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	96899236431309692077543563478764369451191028887959310645971734531655300897247	12477	UVM_INFO @ 1325683698538 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	43687938787215880788531880708751549320474010024917523492604556382544598076907	6337	UVM_INFO @ 14108187918 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:958) [scoreboard] Check failed (csr.get_mirrored_value() \| status_mask) == (item.d_data \| status_mask) (* [] vs []) reg name: status, compare_mask				2 test runs
	otp_ctrl_background_chks	12665766455797543174221790158217709903737102511867513426646618813496355240119	6633	UVM_INFO @ 8810972116 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_req	36780923128448005664398607173212866464062457855193155024885851403670403575206	3733	UVM_INFO @ 172671489 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
Offending '(cio_test_en_o == *)'				2 test runs
	otp_ctrl_stress_all_with_rand_reset	77903863558074965917180062065917824403257066897758515318507400236513994300413	92	UVM_ERROR @ 500564394 ps: (otp_ctrl_if.sv:389) [ASSERT FAILED] CioTestEnOWithDftOff_A UVM_INFO @ 500564394 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	13772957969375017602162610704631932241923256630710441977839654617532980335564	92	UVM_ERROR @ 62877210 ps: (otp_ctrl_if.sv:389) [ASSERT FAILED] CioTestEnOWithDftOff_A UVM_INFO @ 62877210 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [] vs []) dai addr ed* rdata* readout mismatch				1 test run
	otp_ctrl_low_freq_read	97861894693542719127867414939490268498602408615341542613337898252377272317361	89	UVM_INFO @ 26270279224 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue				1 test run
	otp_ctrl_sec_cm	16206659700352793151185141654671255380930597297473978463730710845119216574758	2357	UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:209) [scoreboard] Check failed cfg.otp_ctrl_vif.lc_data_o.error == exp_lc_data.error (* [] vs [*])				1 test run
	otp_ctrl_stress_all_with_rand_reset	98150097347764275562510897239794378296742508513828574033330651007278692432862	5410	UVM_INFO @ 766828550 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [] vs []) dai addr c rdata* readout mismatch				1 test run
	otp_ctrl_stress_all_with_rand_reset	31922111630094498399633894105213515890137168535384952939308272656953262274826	98	UVM_INFO @ 16687105694 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---