| V1 |
|
100.00% |
| V2 |
|
96.33% |
| V2S |
|
91.73% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| wake_up | 1 | 1 | 100.00 | |||
| aes_wake_up | 2.000s | 78.617us | 1 | 1 | 100.00 | |
| smoke | 10 | 10 | 100.00 | |||
| aes_smoke | 4.000s | 374.947us | 10 | 10 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| aes_csr_hw_reset | 2.000s | 59.157us | 1 | 1 | 100.00 | |
| csr_rw | 5 | 5 | 100.00 | |||
| aes_csr_rw | 2.000s | 206.860us | 5 | 5 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| aes_csr_bit_bash | 10.000s | 1636.794us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| aes_csr_aliasing | 2.000s | 130.069us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 5 | 5 | 100.00 | |||
| aes_csr_mem_rw_with_rand_reset | 3.000s | 131.642us | 5 | 5 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 6 | 6 | 100.00 | |||
| aes_csr_rw | 2.000s | 206.860us | 5 | 5 | 100.00 | |
| aes_csr_aliasing | 2.000s | 130.069us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| algorithm | 70 | 70 | 100.00 | |||
| aes_smoke | 4.000s | 374.947us | 10 | 10 | 100.00 | |
| aes_config_error | 6.000s | 332.152us | 50 | 50 | 100.00 | |
| aes_stress | 5.000s | 916.497us | 10 | 10 | 100.00 | |
| key_length | 70 | 70 | 100.00 | |||
| aes_smoke | 4.000s | 374.947us | 10 | 10 | 100.00 | |
| aes_config_error | 6.000s | 332.152us | 50 | 50 | 100.00 | |
| aes_stress | 5.000s | 916.497us | 10 | 10 | 100.00 | |
| back2back | 35 | 35 | 100.00 | |||
| aes_stress | 5.000s | 916.497us | 10 | 10 | 100.00 | |
| aes_b2b | 10.000s | 150.410us | 25 | 25 | 100.00 | |
| backpressure | 10 | 10 | 100.00 | |||
| aes_stress | 5.000s | 916.497us | 10 | 10 | 100.00 | |
| multi_message | 91 | 95 | 95.79 | |||
| aes_smoke | 4.000s | 374.947us | 10 | 10 | 100.00 | |
| aes_config_error | 6.000s | 332.152us | 50 | 50 | 100.00 | |
| aes_stress | 5.000s | 916.497us | 10 | 10 | 100.00 | |
| aes_alert_reset | 3600.000s | 0.000us | 21 | 25 | 84.00 | |
| failure_test | 81 | 85 | 95.29 | |||
| aes_man_cfg_err | 3.000s | 182.044us | 10 | 10 | 100.00 | |
| aes_config_error | 6.000s | 332.152us | 50 | 50 | 100.00 | |
| aes_alert_reset | 3600.000s | 0.000us | 21 | 25 | 84.00 | |
| trigger_clear_test | 10 | 10 | 100.00 | |||
| aes_clear | 5.000s | 240.827us | 10 | 10 | 100.00 | |
| nist_test_vectors | 1 | 1 | 100.00 | |||
| aes_nist_vectors | 6.000s | 659.937us | 1 | 1 | 100.00 | |
| reset_recovery | 21 | 25 | 84.00 | |||
| aes_alert_reset | 3600.000s | 0.000us | 21 | 25 | 84.00 | |
| stress | 10 | 10 | 100.00 | |||
| aes_stress | 5.000s | 916.497us | 10 | 10 | 100.00 | |
| sideload | 20 | 20 | 100.00 | |||
| aes_stress | 5.000s | 916.497us | 10 | 10 | 100.00 | |
| aes_sideload | 4.000s | 102.229us | 10 | 10 | 100.00 | |
| deinitialization | 10 | 10 | 100.00 | |||
| aes_deinit | 5.000s | 246.164us | 10 | 10 | 100.00 | |
| stress_all | 6 | 10 | 60.00 | |||
| aes_stress_all | 10850.000s | 0.000us | 6 | 10 | 60.00 | |
| alert_test | 10 | 10 | 100.00 | |||
| aes_alert_test | 3.000s | 97.014us | 10 | 10 | 100.00 | |
| tl_d_oob_addr_access | 25 | 25 | 100.00 | |||
| aes_tl_errors | 4.000s | 242.994us | 25 | 25 | 100.00 | |
| tl_d_illegal_access | 25 | 25 | 100.00 | |||
| aes_tl_errors | 4.000s | 242.994us | 25 | 25 | 100.00 | |
| tl_d_outstanding_access | 12 | 12 | 100.00 | |||
| aes_csr_hw_reset | 2.000s | 59.157us | 1 | 1 | 100.00 | |
| aes_csr_rw | 2.000s | 206.860us | 5 | 5 | 100.00 | |
| aes_csr_aliasing | 2.000s | 130.069us | 1 | 1 | 100.00 | |
| aes_same_csr_outstanding | 3.000s | 278.717us | 5 | 5 | 100.00 | |
| tl_d_partial_access | 12 | 12 | 100.00 | |||
| aes_csr_hw_reset | 2.000s | 59.157us | 1 | 1 | 100.00 | |
| aes_csr_rw | 2.000s | 206.860us | 5 | 5 | 100.00 | |
| aes_csr_aliasing | 2.000s | 130.069us | 1 | 1 | 100.00 | |
| aes_same_csr_outstanding | 3.000s | 278.717us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| reseeding | 4 | 10 | 40.00 | |||
| aes_reseed | 4.000s | 78.417us | 4 | 10 | 40.00 | |
| fault_inject | 598 | 660 | 90.61 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 270 | 300 | 90.00 | |
| aes_cipher_fi | 60.000s | 0.000us | 328 | 350 | 93.71 | |
| shadow_reg_update_error | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 273.953us | 20 | 20 | 100.00 | |
| shadow_reg_read_clear_staged_value | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 273.953us | 20 | 20 | 100.00 | |
| shadow_reg_storage_error | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 273.953us | 20 | 20 | 100.00 | |
| shadowed_reset_glitch | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 273.953us | 20 | 20 | 100.00 | |
| shadow_reg_update_error_with_csr_rw | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors_with_csr_rw | 6.000s | 475.836us | 20 | 20 | 100.00 | |
| tl_intg_err | 30 | 30 | 100.00 | |||
| aes_sec_cm | 24.000s | 4465.643us | 5 | 5 | 100.00 | |
| aes_tl_intg_err | 5.000s | 2506.855us | 25 | 25 | 100.00 | |
| sec_cm_bus_integrity | 25 | 25 | 100.00 | |||
| aes_tl_intg_err | 5.000s | 2506.855us | 25 | 25 | 100.00 | |
| sec_cm_lc_escalate_en_intersig_mubi | 21 | 25 | 84.00 | |||
| aes_alert_reset | 3600.000s | 0.000us | 21 | 25 | 84.00 | |
| sec_cm_main_config_shadow | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 273.953us | 20 | 20 | 100.00 | |
| sec_cm_gcm_config_shadow | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 273.953us | 20 | 20 | 100.00 | |
| sec_cm_main_config_sparse | 132 | 145 | 91.03 | |||
| aes_smoke | 4.000s | 374.947us | 10 | 10 | 100.00 | |
| aes_stress | 5.000s | 916.497us | 10 | 10 | 100.00 | |
| aes_alert_reset | 3600.000s | 0.000us | 21 | 25 | 84.00 | |
| aes_core_fi | 124.000s | 10022.929us | 91 | 100 | 91.00 | |
| sec_cm_gcm_config_sparse | 151 | 160 | 94.38 | |||
| aes_config_error | 6.000s | 332.152us | 50 | 50 | 100.00 | |
| aes_stress | 5.000s | 916.497us | 10 | 10 | 100.00 | |
| aes_core_fi | 124.000s | 10022.929us | 91 | 100 | 91.00 | |
| sec_cm_aux_config_shadow | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 273.953us | 20 | 20 | 100.00 | |
| sec_cm_aux_config_regwen | 20 | 20 | 100.00 | |||
| aes_readability | 3.000s | 121.262us | 10 | 10 | 100.00 | |
| aes_stress | 5.000s | 916.497us | 10 | 10 | 100.00 | |
| sec_cm_key_sideload | 20 | 20 | 100.00 | |||
| aes_stress | 5.000s | 916.497us | 10 | 10 | 100.00 | |
| aes_sideload | 4.000s | 102.229us | 10 | 10 | 100.00 | |
| sec_cm_key_sw_unreadable | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 121.262us | 10 | 10 | 100.00 | |
| sec_cm_data_reg_sw_unreadable | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 121.262us | 10 | 10 | 100.00 | |
| sec_cm_key_sec_wipe | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 121.262us | 10 | 10 | 100.00 | |
| sec_cm_iv_config_sec_wipe | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 121.262us | 10 | 10 | 100.00 | |
| sec_cm_data_reg_sec_wipe | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 121.262us | 10 | 10 | 100.00 | |
| sec_cm_data_reg_key_sca | 10 | 10 | 100.00 | |||
| aes_stress | 5.000s | 916.497us | 10 | 10 | 100.00 | |
| sec_cm_key_masking | 10 | 10 | 100.00 | |||
| aes_stress | 5.000s | 916.497us | 10 | 10 | 100.00 | |
| sec_cm_main_fsm_sparse | 0 | 10 | 0.00 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| sec_cm_main_fsm_redun | 623 | 685 | 90.95 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 270 | 300 | 90.00 | |
| aes_cipher_fi | 60.000s | 0.000us | 328 | 350 | 93.71 | |
| aes_ctr_fi | 3.000s | 77.005us | 25 | 25 | 100.00 | |
| sec_cm_cipher_fsm_sparse | 0 | 10 | 0.00 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| sec_cm_cipher_fsm_redun | 598 | 660 | 90.61 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 270 | 300 | 90.00 | |
| aes_cipher_fi | 60.000s | 0.000us | 328 | 350 | 93.71 | |
| sec_cm_cipher_ctr_redun | 328 | 350 | 93.71 | |||
| aes_cipher_fi | 60.000s | 0.000us | 328 | 350 | 93.71 | |
| sec_cm_ctr_fsm_sparse | 0 | 10 | 0.00 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| sec_cm_ctr_fsm_redun | 295 | 335 | 88.06 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 270 | 300 | 90.00 | |
| aes_ctr_fi | 3.000s | 77.005us | 25 | 25 | 100.00 | |
| sec_cm_ghash_fsm_sparse | 0 | 10 | 0.00 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| sec_cm_ctrl_sparse | 623 | 685 | 90.95 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 270 | 300 | 90.00 | |
| aes_cipher_fi | 60.000s | 0.000us | 328 | 350 | 93.71 | |
| aes_ctr_fi | 3.000s | 77.005us | 25 | 25 | 100.00 | |
| sec_cm_main_fsm_global_esc | 21 | 25 | 84.00 | |||
| aes_alert_reset | 3600.000s | 0.000us | 21 | 25 | 84.00 | |
| sec_cm_main_fsm_local_esc | 623 | 685 | 90.95 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 270 | 300 | 90.00 | |
| aes_cipher_fi | 60.000s | 0.000us | 328 | 350 | 93.71 | |
| aes_ctr_fi | 3.000s | 77.005us | 25 | 25 | 100.00 | |
| sec_cm_cipher_fsm_local_esc | 623 | 685 | 90.95 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 270 | 300 | 90.00 | |
| aes_cipher_fi | 60.000s | 0.000us | 328 | 350 | 93.71 | |
| aes_ctr_fi | 3.000s | 77.005us | 25 | 25 | 100.00 | |
| sec_cm_ctr_fsm_local_esc | 295 | 335 | 88.06 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 270 | 300 | 90.00 | |
| aes_ctr_fi | 3.000s | 77.005us | 25 | 25 | 100.00 | |
| sec_cm_ghash_fsm_local_esc | 0 | 10 | 0.00 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| sec_cm_data_reg_local_esc | 598 | 660 | 90.61 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 270 | 300 | 90.00 | |
| aes_cipher_fi | 60.000s | 0.000us | 328 | 350 | 93.71 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 0 | 10 | 0.00 | |||
| aes_stress_all_with_rand_reset | 46.000s | 2004.915us | 0 | 10 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| Job timed out after * minutes | 22 test runs | |||
| aes_stress_all | 66256359133134860443888139896716885139811708075319082685915382660577350823215 | None | ||
| aes_fi | 3027499881379636171380082266951940716030863890335002005981399497922472814973 | None | ||
| aes_stress_all | 30547926337440213943101880833548534298396318558738349476687870157938333248533 | None | ||
| aes_alert_reset | 60141581329803354455228316397621145712186969019815127182884920930712673210163 | None | ||
| aes_alert_reset | 40144002530138519958521378891574500774078310444253972118625146988313012794050 | None | ||
| aes_control_fi | 78808634673542642059391516030782076365917181554453038380386369601021715697610 | None | ||
| aes_cipher_fi | 94438243838273289684182230401015280380938018657371780236827747299248305774874 | None | ||
| aes_control_fi | 24906172839187267971230620864266867721998841362058575111985278168167470478242 | None | ||
| aes_cipher_fi | 82917664219970857952634247717885725386235310273441999060997494854594616113701 | None | ||
| aes_control_fi | 89207109486347621401410603890679978537602299209521580424073340031799065394933 | None | ||
| aes_cipher_fi | 111268115874027540486863515336811902237425748250691059306630576865605406336068 | None | ||
| aes_control_fi | 21637699959079075142663150338283479515305065266895145951320065159021004140963 | None | ||
| aes_control_fi | 31696843456416064342842341378863671177837826013157727294934990806833337035598 | None | ||
| aes_control_fi | 53291589390349719043491604715453214147089561966205503661422099701190431843598 | None | ||
| aes_control_fi | 42150921190671702508712054093317025638259759448915468352523306842219837185020 | None | ||
| aes_control_fi | 102627074979590123318023252177096561270103826578753654610307628005746435279698 | None | ||
| aes_control_fi | 71775900285627466411994019637669839838529892475903309693746303270945775739201 | None | ||
| aes_control_fi | 32610368650460300745509326973995486553534758788447040012061864539903405818554 | None | ||
| aes_cipher_fi | 695347829769831735200433198405433803157794889686044679135661495922747837599 | None | ||
| aes_cipher_fi | 4907729038253361455714176746388618306982939010760155040671748432075277468201 | None | ||
| aes_cipher_fi | 32751963959709516568510861014854389725269042970522075932984966454336597622816 | None | ||
| aes_cipher_fi | 27088247323150759709472145849266626006281362891765241705638188452584331848694 | None | ||
| UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred! | 20 test runs | |||
| aes_control_fi | 38574214112350585530804328641572639998427213076524786499987593550142745631559 | 153 |
UVM_INFO @ 10020553495 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 101141389389713761230116440401723832742226667241684450807318747923697882851681 | 152 |
UVM_INFO @ 10012039570 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 97284720731925174215597613856458994501022133943606112794446103300279860738740 | 150 |
UVM_INFO @ 10007509114 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 76310879659808941619304374635460421070693265934068063254488443661032459164003 | 153 |
UVM_INFO @ 10003982719 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 15698062828067159923800506345810977644019972364082192317348707548006781148237 | 160 |
UVM_INFO @ 10009668969 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 40839828239769502040220366157676084339718591266595568038137210940779744585020 | 158 |
UVM_INFO @ 10010503175 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 25084901160391282443622630650522322296549259569488457760066613752368073820253 | 153 |
UVM_INFO @ 10007701551 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 52243473180488517375214952703552814120132054636898865579869689049631962337581 | 152 |
UVM_INFO @ 10015970957 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 39260914447758424011813355520480520486522552613888180216563108851312874078145 | 148 |
UVM_INFO @ 10004566444 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 74365231287379872317096233953286089602913634062785935645898032436793592843514 | 145 |
UVM_INFO @ 10011213268 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 31879829180743552612843833748508092513513494206952464669529928107799831846136 | 155 |
UVM_INFO @ 10014639439 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 111401109077463840605032350633142241743287164579829265814463197173080402449182 | 151 |
UVM_INFO @ 10015758325 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 39450086334481043377763087211588044825763130325056411848148147003013993653707 | 148 |
UVM_INFO @ 10134586317 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 3475305924665072358964674710535295903548432984345355553375694983471072237066 | 147 |
UVM_INFO @ 10015018486 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 88776567894620516172100781892780884813778617204799283709159851243171523029775 | 142 |
UVM_INFO @ 10011339074 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 34587503614517648261302278746601793740234626045223548470488431473801900301382 | 149 |
UVM_INFO @ 10005846500 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 11347244632260730955263252169458427708631863247513593921840981607762602762086 | 142 |
UVM_INFO @ 10005518304 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 21445415089498980382028335980910504744667326561802631002927756439583262490370 | 145 |
UVM_INFO @ 10022958865 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 65028968753471161147449805772167509035716689363291415645203130610624862729784 | 149 |
UVM_INFO @ 10011272328 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 6842310446413987987523292318967976613337625909490209873447225397836592213947 | 147 |
UVM_INFO @ 10015285271 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred! | 13 test runs | |||
| aes_cipher_fi | 34213707803928404765688638386423039671630474929238300654325257500695371529373 | 155 |
UVM_INFO @ 10008660722 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 105144803651062323189749114043463328940768345518013161045792085943136916623820 | 159 |
UVM_INFO @ 10016578028 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 43849355953153013176496859708842881875847170064379973780187783806944582671080 | 151 |
UVM_INFO @ 10011074719 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 44556325470629812988009112455980521892863950837194917044045236688524487377343 | 148 |
UVM_INFO @ 10006894361 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 39050578984935601670392432702974246678616128791126908019504768932942324835265 | 143 |
UVM_INFO @ 10011328770 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 21652431142032664670050718409122126955908980167433235180729026132453419481171 | 149 |
UVM_INFO @ 10020448444 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 114355248476072908449956003922962798318582815509615763348652031948954419155548 | 147 |
UVM_INFO @ 10016813326 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 78079063472274921262073565503082822636154497571658483745054042148743076785412 | 151 |
UVM_INFO @ 10021031402 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 4297426820764803493796356278877871227595507373108599418342288182405466670171 | 149 |
UVM_INFO @ 10017639435 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 94524453117277351039447692867542274775384836824996030784664736969902836682398 | 145 |
UVM_INFO @ 10009697092 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 81291396394747367512265024102828554258428213671453389262647644100420927780685 | 150 |
UVM_INFO @ 10037731460 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 56707114130623402835132352166265235801157838153167932924597115452222266455301 | 145 |
UVM_INFO @ 10073758290 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 41076266972643491430794469112274803554679796158203201369725499340475039805739 | 151 |
UVM_INFO @ 10029248952 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'parent_sequence' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues | 12 test runs | |||
| aes_stress_all | 85969336661718693245039706954679149404706457135058522871855408717386868032066 | 22943 |
UVM_INFO @ 271885031 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_reseed | 1796579299349799744930994529339793673414812298757759469628443325224549467459 | 6239 |
UVM_INFO @ 78416879 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all | 34517576571895876033291230270482904929860618060741480162099475058537453677954 | 3722 |
UVM_INFO @ 130323777 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_reseed | 4648172155593258692976433160896316844409679037320174489172458640607773764782 | 3835 |
UVM_INFO @ 232846529 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 4739300279957384881975179455001260500493335373012052062882383066471846506869 | 344 |
UVM_INFO @ 93207432 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 106938414475587442286593553564659401632554429975870702431685830229564416221536 | 340 |
UVM_INFO @ 751058635 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 43942724327306169908046601471000969501300415027303951273144248979758714544781 | 388 |
UVM_INFO @ 4274616205 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_reseed | 57969677806219180195627304394697023482705108034993515575099301700279981611353 | 5172 |
UVM_INFO @ 29228925 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_reseed | 57200464382068803083963163453613461815155203877224159354149825170019307349422 | 4154 |
UVM_INFO @ 15600506 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 17973610060742421407142706742939407605083451621936284508237854906969568314744 | 654 |
UVM_INFO @ 2121946452 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_reseed | 4329413643906422489058370135521954135365533032032185344021126715986667672812 | 2290 |
UVM_INFO @ 27544002 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 89847162707314245460536914578488106914294210292966361795107723113040016941011 | 276 |
UVM_INFO @ 1494353181 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_scoreboard.sv:926) scoreboard [scoreboard] | 7 test runs | |||
| aes_fi | 86795010294264199579117575931812584837980868233318545732087521875537534488180 | 4740 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 3
----| Expected corrupted: 0
|
|
| aes_fi | 34406293442454109152269964121316936740358110075420731881028972170722621579554 | 5620 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 2
----| Expected corrupted: 0
|
|
| aes_fi | 49997563304965123391186292384403439792501610396167699539175352823466755898746 | 7191 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 2
----| Expected corrupted: 0
|
|
| aes_fi | 56650295714020362198603517623341342083265905120246837870015281849905156943570 | 8379 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 5
----| Seen: 4
----| Expected corrupted: 0
|
|
| aes_fi | 21840515537862412715871036490513119689288394758100028878986345607667062248756 | 5998 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 1
----| Expected corrupted: 0
|
|
| aes_fi | 78584419786831482544698287955432112461072606191256272053103478254802803057143 | 8564 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 5
----| Expected corrupted: 0
|
|
| aes_fi | 21893640781936034915804771500548815735132402761805970497908080775390597667176 | 6868 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 3
----| Expected corrupted: 0
|
|
| UVM_FATAL (aes_core_fi_vseq.sv:70) [aes_core_fi_vseq] wait timeout occurred! | 6 test runs | |||
| aes_core_fi | 98209851906035261254259236085644923569523773281184158832636663503771109695878 | 150 |
UVM_INFO @ 10027165832 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 99725592753185084655209848863498352537211867707664279236004980574481314409556 | 143 |
UVM_INFO @ 10010210889 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 63772904353081453584779393222168681343774550397683366008777279506352938431354 | 149 |
UVM_INFO @ 10023035464 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 8605077298644559018446441585571230431109706128773565406099263399090758548091 | 145 |
UVM_INFO @ 10006434832 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 54258704955618291030217450241247297660110780459623791412130700281002608529036 | 141 |
UVM_INFO @ 10010436282 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 86838758866518190045146475603118739205136665497792200537141590744774240033532 | 154 |
UVM_INFO @ 10006823667 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (cip_base_vseq.sv:1220) [aes_common_vseq] Check failed (vseq_done) | 4 test runs | |||
| aes_stress_all_with_rand_reset | 65549617236865864173062807351491174700737340409717173047440299280991944352181 | 138 |
UVM_INFO @ 7802279 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 13469143192280999134872091633603216151257104607026882949870932637009881359302 | 174 |
UVM_INFO @ 11680888 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 36626809174891648348221694812759273739457146035855673299787632361852513020956 | 704 |
UVM_INFO @ 6615907752 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 93507051530077816872935551882907285483267422809545254476625512031545747532861 | 653 |
UVM_INFO @ 2004915364 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (cip_base_scoreboard.sv:255) scoreboard [scoreboard] alert fatal_fault has unexpected timeout error | 2 test runs | |||
| aes_fi | 19094580784038335696690084571934126636547313797981790760146635399287054442338 | 662 |
UVM_INFO @ 49203169 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_alert_reset | 97825299197137729863137553037362793549539468338323657426904150502291738197251 | 12576 |
UVM_INFO @ 282953185 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue | 2 test runs | |||
| aes_alert_reset | 92102384545209150253082671113205052526346383828376496604295995427503296663504 | 15998638 |
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_fi | 85755561816218641610184910617939076631348064797637534557499143790292386077239 | 7716087 |
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_scoreboard.sv:785) scoreboard [scoreboard] # * | 1 test run | |||
| aes_reseed | 106949060087096726138004162416830013369473173932957768388883736970430904748403 | 3088 |
TEST FAILED MESSAGES DID NOT MATCH
0 d6 57 b3 0
1 00 f4 bc 0
|
|
| UVM_FATAL (aes_base_vseq.sv:87) [aes_reseed_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) | 1 test run | |||
| aes_stress_all_with_rand_reset | 73239733984647565710134133680373988599947966093904612254051364667443206988171 | 114 |
UVM_INFO @ 97687773 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=5) | 1 test run | |||
| aes_core_fi | 92128348276501319211472635935762601310615376219160120657894263978307044800045 | 147 |
UVM_INFO @ 10027684156 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_core_fi_vseq.sv:93) [aes_core_fi_vseq] wait timeout occurred! | 1 test run | |||
| aes_core_fi | 93395688922602134470249638284495705270127614723061098780781160260792501286386 | 150 |
UVM_INFO @ 10188207446 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=9) | 1 test run | |||
| aes_core_fi | 6454393848021594211849440115922583895511807455909947209566105549284238640479 | 143 |
UVM_INFO @ 10022929242 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=4) | 1 test run | |||
| aes_cipher_fi | 55246749661817956806230157721457454442556652384516452464338054855117691164397 | 145 |
UVM_INFO @ 10050019766 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3) | 1 test run | |||
| aes_cipher_fi | 112727049992349188462538524229994503995598201784449386949008272149721408894632 | 138 |
UVM_INFO @ 10049837513 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|