Simulation Results

Simulation Results: alert_handler

17/07/2026 15:00:31 DVSim: v1.49.0 sha: df7ce05 json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
99.01 %

code
98.98 %

assert
98.92 %

func
99.14 %

line
99.99 %

branch
99.99 %

cond
97.56 %

toggle
97.34 %

FSM
100.00 %

Validation stages

V1		100.00%
V2		87.97%
V2S		95.61%
V3		20.00%

23/23 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				10	10	100.00
	alert_handler_smoke	77.960s	1330.436us	10	10	100.00
csr_hw_reset				1	1	100.00
	alert_handler_csr_hw_reset	11.980s	315.025us	1	1	100.00
csr_rw				5	5	100.00
	alert_handler_csr_rw	8.090s	271.275us	5	5	100.00
csr_bit_bash				1	1	100.00
	alert_handler_csr_bit_bash	348.050s	5531.604us	1	1	100.00
csr_aliasing				1	1	100.00
	alert_handler_csr_aliasing	410.500s	5065.922us	1	1	100.00
csr_mem_rw_with_rand_reset				5	5	100.00
	alert_handler_csr_mem_rw_with_rand_reset	12.110s	71.039us	5	5	100.00
regwen_csr_and_corresponding_lockable_csr				6	6	100.00
	alert_handler_csr_rw	8.090s	271.275us	5	5	100.00
	alert_handler_csr_aliasing	410.500s	5065.922us	1	1	100.00

446/507 passed

87.97 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
esc_accum				25	25	100.00
	alert_handler_esc_alert_accum	383.040s	106985.084us	25	25	100.00
esc_timeout				50	50	100.00
	alert_handler_esc_intr_timeout	92.690s	5637.990us	50	50	100.00
entropy				21	25	84.00
	alert_handler_entropy	3600.132s	0.000us	21	25	84.00
sig_int_fail				47	50	94.00
	alert_handler_sig_int_fail	102.870s	5328.816us	47	50	94.00
clk_skew				10	10	100.00
	alert_handler_smoke	77.960s	1330.436us	10	10	100.00
random_alerts				10	10	100.00
	alert_handler_random_alerts	101.490s	7097.848us	10	10	100.00
random_classes				50	50	100.00
	alert_handler_random_classes	101.920s	16701.719us	50	50	100.00
ping_timeout				23	50	46.00
	alert_handler_ping_timeout	464.280s	25111.395us	23	50	46.00
lpg				93	100	93.00
	alert_handler_lpg	3600.124s	0.000us	48	50	96.00
	alert_handler_lpg_stub_clk	3600.129s	0.000us	45	50	90.00
stress_all				50	50	100.00
	alert_handler_stress_all	4912.690s	500662.368us	50	50	100.00
alert_handler_entropy_stress_test				0	20	0.00
	alert_handler_entropy_stress	39.390s	1457.016us	0	20	0.00
alert_handler_alert_accum_saturation				20	20	100.00
	alert_handler_alert_accum_saturation	7.080s	201.374us	20	20	100.00
intr_test				10	10	100.00
	alert_handler_intr_test	2.580s	8.061us	10	10	100.00
tl_d_oob_addr_access				25	25	100.00
	alert_handler_tl_errors	35.810s	428.351us	25	25	100.00
tl_d_illegal_access				25	25	100.00
	alert_handler_tl_errors	35.810s	428.351us	25	25	100.00
tl_d_outstanding_access				12	12	100.00
	alert_handler_csr_hw_reset	11.980s	315.025us	1	1	100.00
	alert_handler_csr_rw	8.090s	271.275us	5	5	100.00
	alert_handler_csr_aliasing	410.500s	5065.922us	1	1	100.00
	alert_handler_same_csr_outstanding	80.600s	1574.095us	5	5	100.00
tl_d_partial_access				12	12	100.00
	alert_handler_csr_hw_reset	11.980s	315.025us	1	1	100.00
	alert_handler_csr_rw	8.090s	271.275us	5	5	100.00
	alert_handler_csr_aliasing	410.500s	5065.922us	1	1	100.00
	alert_handler_same_csr_outstanding	80.600s	1574.095us	5	5	100.00

V2S

196/205 passed

95.61 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
shadow_reg_update_error				20	20	100.00
	alert_handler_shadow_reg_errors	431.400s	21771.303us	20	20	100.00
shadow_reg_read_clear_staged_value				20	20	100.00
	alert_handler_shadow_reg_errors	431.400s	21771.303us	20	20	100.00
shadow_reg_storage_error				20	20	100.00
	alert_handler_shadow_reg_errors	431.400s	21771.303us	20	20	100.00
shadowed_reset_glitch				20	20	100.00
	alert_handler_shadow_reg_errors	431.400s	21771.303us	20	20	100.00
shadow_reg_update_error_with_csr_rw				20	20	100.00
	alert_handler_shadow_reg_errors_with_csr_rw	1272.240s	164300.035us	20	20	100.00
tl_intg_err				30	30	100.00
	alert_handler_sec_cm	35.220s	544.633us	5	5	100.00
	alert_handler_tl_intg_err	87.250s	14898.556us	25	25	100.00
sec_cm_bus_integrity				25	25	100.00
	alert_handler_tl_intg_err	87.250s	14898.556us	25	25	100.00
sec_cm_config_shadow				20	20	100.00
	alert_handler_shadow_reg_errors	431.400s	21771.303us	20	20	100.00
sec_cm_ping_timer_config_regwen				10	10	100.00
	alert_handler_smoke	77.960s	1330.436us	10	10	100.00
sec_cm_alert_config_regwen				10	10	100.00
	alert_handler_smoke	77.960s	1330.436us	10	10	100.00
sec_cm_alert_loc_config_regwen				10	10	100.00
	alert_handler_smoke	77.960s	1330.436us	10	10	100.00
sec_cm_class_config_regwen				10	10	100.00
	alert_handler_smoke	77.960s	1330.436us	10	10	100.00
sec_cm_alert_intersig_diff				47	50	94.00
	alert_handler_sig_int_fail	102.870s	5328.816us	47	50	94.00
sec_cm_lpg_intersig_mubi				48	50	96.00
	alert_handler_lpg	3600.124s	0.000us	48	50	96.00
sec_cm_esc_intersig_diff				47	50	94.00
	alert_handler_sig_int_fail	102.870s	5328.816us	47	50	94.00
sec_cm_alert_rx_intersig_bkgn_chk				21	25	84.00
	alert_handler_entropy	3600.132s	0.000us	21	25	84.00
sec_cm_esc_tx_intersig_bkgn_chk				21	25	84.00
	alert_handler_entropy	3600.132s	0.000us	21	25	84.00
sec_cm_esc_timer_fsm_sparse				5	5	100.00
	alert_handler_sec_cm	35.220s	544.633us	5	5	100.00
sec_cm_ping_timer_fsm_sparse				5	5	100.00
	alert_handler_sec_cm	35.220s	544.633us	5	5	100.00
sec_cm_esc_timer_fsm_local_esc				5	5	100.00
	alert_handler_sec_cm	35.220s	544.633us	5	5	100.00
sec_cm_ping_timer_fsm_local_esc				5	5	100.00
	alert_handler_sec_cm	35.220s	544.633us	5	5	100.00
sec_cm_esc_timer_fsm_global_esc				5	5	100.00
	alert_handler_sec_cm	35.220s	544.633us	5	5	100.00
sec_cm_accu_ctr_redun				5	5	100.00
	alert_handler_sec_cm	35.220s	544.633us	5	5	100.00
sec_cm_esc_timer_ctr_redun				5	5	100.00
	alert_handler_sec_cm	35.220s	544.633us	5	5	100.00
sec_cm_ping_timer_ctr_redun				5	5	100.00
	alert_handler_sec_cm	35.220s	544.633us	5	5	100.00
sec_cm_ping_timer_lfsr_redun				5	5	100.00
	alert_handler_sec_cm	35.220s	544.633us	5	5	100.00

2/10 passed

20.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
stress_all_with_rand_reset				2	10	20.00
	alert_handler_stress_all_with_rand_reset	380.860s	7010.859us	2	10	20.00

Error Messages

	Test	seed	line	log context
UVM_ERROR (alert_handler_scoreboard.sv:486) [scoreboard] Check failed intr_state_val == item.d_data (* [] vs [*]) reg name: intr_state				20 test runs
	alert_handler_ping_timeout	80474071914833137671631496977529833635072705473042313497302069880010805717528	84	UVM_INFO @ 1436182298 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	83444785421592632269337498125452606042749447501575974524449940686797262778936	96	UVM_INFO @ 7458959480 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	28594310045524392387878288646912531822606982515587268890992637689974832900235	159	UVM_INFO @ 38265663776 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	88076761866518438865341538574724813375565451491997824227640893562030233988119	114	UVM_INFO @ 11129977540 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	25755201620676240153519106289597795557532789394838254019216137947481881847945	102	UVM_INFO @ 4308343001 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	69956755864934031920300327892290702683285179619190699207878233442323146598508	108	UVM_INFO @ 4914550816 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	28200627033430125604087624058721161398732135844501684782537199550231583679120	87	UVM_INFO @ 4839093839 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	56828138543243601024196135811160180546045918380918504781290904792824465081407	102	UVM_INFO @ 15667333382 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	5857106283627530303413936965407315892299777255596904798272068745067848310502	130	UVM_INFO @ 141535184906 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	61746866266053030539689554270768949083969436543719380309438052856700899824085	84	UVM_INFO @ 2196274066 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	15407187184302403805098013904506033544674049677884719770909023608410486760219	111	UVM_INFO @ 8785912388 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	60228905048724443283092401328154013837773626580744527727969678461909309283044	84	UVM_INFO @ 687073317 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	110069534132612463635753563337140144776104712071140861371042920627500558100722	93	UVM_INFO @ 5214204228 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	7883016706613446160018544975372248028881676925557456910569277212350607940803	111	UVM_INFO @ 14007269953 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	47253881629682968230051140008484120185478630472715789524946975023364695294073	108	UVM_INFO @ 14159111408 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	79449749554207822843820518269970501990273455889447816294570215765758720664977	99	UVM_INFO @ 8803723879 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	22267730478717845425773307560311660305083137766833356557275022107369762781871	99	UVM_INFO @ 15951744851 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	33840036881746075283030062425252213181082540458662749380463074165863318191793	93	UVM_INFO @ 1830801612 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	4120067517832419464858982572178688754261992142919648681237339361985135268396	102	UVM_INFO @ 13895269429 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	79076685940808381575424921922491125940994866527067981596476450500554762040690	114	UVM_INFO @ 3731687745 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR sequencer [alert_sender_ping_rsp_seq] Response queue overflow, response was dropped				20 test runs
	alert_handler_entropy_stress	45490109304667679818421394497689531681600343579504805458016366754190664627730	180	UVM_INFO @ 283898829 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	27962934303291115076082831586805446217442817479207729706559963769362633088968	222	UVM_INFO @ 188016731 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	94848655653538418490940441303132938467378180562214391726640325663387504604367	194	UVM_INFO @ 113815859 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	85375061295280887516819574483068089485042490308985062340341215032428123380969	192	UVM_INFO @ 1724019315 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	65978215356989174883492067495724400327874499836466866452991615671683600391173	170	UVM_INFO @ 771131324 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	11134447736692285939003156424290998913301709754823486269736327183738560267514	118	UVM_INFO @ 413805528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	27160598354720014727286066605404922983664642159893677524306156958308987569791	226	UVM_INFO @ 2253672209 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	25319458417835384520073801614396891518047568486100587334725672704293306184312	218	UVM_INFO @ 1457016320 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	50859103004515466673587819946231887019472300873871844276396850404350304765266	186	UVM_INFO @ 105046010 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	61489177977401443402111076112170602890729455096293305073582671943197361940740	148	UVM_INFO @ 170995231 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	99035762707403114335410488765478546219280622953380717929407398824138164392920	222	UVM_INFO @ 339740943 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	57734530380022858056509617754084433932239314272341287096090211214565294437589	190	UVM_INFO @ 665158392 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	24089210395229006844762868952418394494348360659421261386146303861735133818848	188	UVM_INFO @ 639912928 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	31735352506191216809436142525474148852303217704904385574012514600975618511762	194	UVM_INFO @ 1520003211 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	24127607190015258381424462964304816395236365403082276146013079068541114644923	164	UVM_INFO @ 545324894 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	16643542845854396275825049772422904832416267722931254060860787891823269247933	190	UVM_INFO @ 101911757 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	39034203985584445037798487722253159637702621885284159710781939735304463633631	166	UVM_INFO @ 1029766307 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	114560265686624463670199202865082939497056220382813520620596153460807406317977	178	UVM_INFO @ 243913119 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	104940968297303712444719886274019897212208106392614159218871044680081869900588	212	UVM_INFO @ 132260216 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	13780021790501330210326991270359611178211945514487896079742802400295968081217	220	UVM_INFO @ 240077082 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
Job timed out after * minutes				11 test runs
	alert_handler_lpg_stub_clk	64642690254874268866496817319242335609217419492969044362480942704611599800570	None
	alert_handler_entropy	6342258187361618790516048185280091749977411408531186415239876273669460446170	None
	alert_handler_lpg_stub_clk	9620726431079212232650946172454915206921247866390900414753530816531060757584	None
	alert_handler_entropy	93037318763194672009506032697294715814878885571856965822925504146093789065463	None
	alert_handler_entropy	4619196918183486426700585086225044217368608298967689164817465136001066951907	None
	alert_handler_entropy	82656912670381190732752366129922234218476589668405738813024554191357421508401	None
	alert_handler_lpg_stub_clk	57978241927668253566310434129788995162047932111711911018348582630552053129308	None
	alert_handler_lpg_stub_clk	86798070664246230293825640784398611843731145312314840931855354960781465650838	None
	alert_handler_lpg	7513682226878973355537186752670178201525106748328750187997100429780202497608	None
	alert_handler_lpg_stub_clk	11450019459239017165504352830176560069011610349274779783732903629010406833831	None
	alert_handler_lpg	13710741697262161466213842222288301262430268065075019333258601310750249524269	None
UVM_ERROR (cip_base_vseq.sv:1286) [alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.				8 test runs
	alert_handler_stress_all_with_rand_reset	85267446256067368260942692028610511297483779367281924096726383341322161839618	91	UVM_INFO @ 329176316 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_stress_all_with_rand_reset	33690551337587120060851636302186487667531625281722862578504471662833440045114	276	UVM_INFO @ 7010858721 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_stress_all_with_rand_reset	8233238986324634242097434613033517634934514224455268290443256755929544431039	82	UVM_INFO @ 458345796 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_stress_all_with_rand_reset	91237774694662297734930401654504881175016424710510402035949239358930190239056	83	UVM_INFO @ 217398749 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_stress_all_with_rand_reset	52366125704287479878123838454084490759561326822589229725335300439388482506424	129	UVM_INFO @ 1948763130 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_stress_all_with_rand_reset	79471416474505612169407479302305540591103045153312960442071165712674324676269	93	UVM_INFO @ 843756020 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_stress_all_with_rand_reset	52983623690184709549373340601611309521201193077478288059965036484732425270679	83	UVM_INFO @ 139607701 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_stress_all_with_rand_reset	65821345695355561937061951801755921143635995830561684203803548181148704302497	100	UVM_INFO @ 3079724327 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (alert_handler_scoreboard.sv:608) scoreboard [scoreboard] Register/crashdump mismatch. loc_alert_cause[] is in the crashdump and * in the register model.				6 test runs
	alert_handler_ping_timeout	22597598783209228238557424862248569729349711913493025425378893777844864767158	80	UVM_INFO @ 615691019 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	15589952219641445813269634128376384626051712710383469316620166226775445060359	86	UVM_INFO @ 906736866 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	79662301041430175848371194890344788137298619934955727029688832386683252797489	80	UVM_INFO @ 645458362 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	4729801951355865114116370843228792139206639950899738269502732294324914766313	80	UVM_INFO @ 1889684062 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	31279482027937358104379881921174500538988794847228931522155518609978430131691	80	UVM_INFO @ 189941774 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	59962884601107583587945146556890739871999230521522380969612563312503764147947	80	UVM_INFO @ 2384670514 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (alert_handler_scoreboard.sv:490) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs [*]) reg name: alert_handler_reg_block.classb_state				2 test runs
	alert_handler_sig_int_fail	11551436554277411322296093954387060783495352699875799451012608910209734313946	81	UVM_INFO @ 233352086 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	2227288152859636478004919841791380900237580880776636499726969852366823869866	97	UVM_INFO @ 1996140362 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:858) [alert_handler_sig_int_fail_vseq] Check failed data & ~ro_mask == * (* [] vs [*])				1 test run
	alert_handler_sig_int_fail	59317446243927516407311446500669925215398298301369246012169096438613980661196	83	UVM_INFO @ 2766466114 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (alert_handler_scoreboard.sv:490) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs [*]) reg name: alert_handler_reg_block.classa_esc_cnt				1 test run
	alert_handler_sig_int_fail	36495307533817308278257235413126179336588768629715822038956800250667362825881	86	UVM_INFO @ 667287831 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---