Simulation Results

Simulation Results: gpio

17/07/2026 15:00:31 DVSim: v1.49.0 sha: df7ce05 json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
96.99 %

code
92.24 %

assert
98.73 %

func
100.00 %

line
99.89 %

branch
97.61 %

cond
94.53 %

toggle
94.19 %

FSM
75.00 %

Validation stages

V1		100.00%
V2		92.99%
V2S		93.33%
V3		45.00%
unmapped		100.00%

53/53 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				40	40	100.00
	gpio_smoke	1.780s	138.099us	10	10	100.00
	gpio_smoke_no_pullup_pulldown	2.280s	113.097us	10	10	100.00
	gpio_smoke_en_cdc_prim	1.770s	65.994us	10	10	100.00
	gpio_smoke_no_pullup_pulldown_en_cdc_prim	2.220s	294.520us	10	10	100.00
csr_hw_reset				1	1	100.00
	gpio_csr_hw_reset	1.110s	17.355us	1	1	100.00
csr_rw				5	5	100.00
	gpio_csr_rw	1.170s	83.536us	5	5	100.00
csr_bit_bash				1	1	100.00
	gpio_csr_bit_bash	8.320s	1635.885us	1	1	100.00
csr_aliasing				1	1	100.00
	gpio_csr_aliasing	1.560s	49.304us	1	1	100.00
csr_mem_rw_with_rand_reset				5	5	100.00
	gpio_csr_mem_rw_with_rand_reset	1.880s	58.020us	5	5	100.00
regwen_csr_and_corresponding_lockable_csr				6	6	100.00
	gpio_csr_rw	1.170s	83.536us	5	5	100.00
	gpio_csr_aliasing	1.560s	49.304us	1	1	100.00

146/157 passed

92.99 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
direct_and_masked_out				20	20	100.00
	gpio_random_dout_din	2.060s	78.306us	10	10	100.00
	gpio_random_dout_din_no_pullup_pulldown	1.680s	63.683us	10	10	100.00
out_in_regs_read_write				10	10	100.00
	gpio_dout_din_regs_random_rw	1.370s	59.856us	10	10	100.00
gpio_interrupt_programming				10	10	100.00
	gpio_intr_rand_pgm	2.090s	228.477us	10	10	100.00
random_interrupt_trigger				10	10	100.00
	gpio_rand_intr_trigger	4.110s	122.797us	10	10	100.00
interrupt_and_noise_filter				10	10	100.00
	gpio_intr_with_filter_rand_intr_event	3.650s	85.877us	10	10	100.00
noise_filter_stress				10	10	100.00
	gpio_filter_stress	31.890s	1098.018us	10	10	100.00
regs_long_reads_and_writes				10	10	100.00
	gpio_random_long_reg_writes_reg_reads	8.640s	5423.195us	10	10	100.00
full_random				10	10	100.00
	gpio_full_random	1.560s	416.873us	10	10	100.00
stress_all				0	10	0.00
	gpio_stress_all	68.440s	30710.777us	0	10	0.00
alert_test				10	10	100.00
	gpio_alert_test	0.920s	68.826us	10	10	100.00
intr_test				10	10	100.00
	gpio_intr_test	0.980s	17.803us	10	10	100.00
tl_d_oob_addr_access				25	25	100.00
	gpio_tl_errors	3.830s	259.357us	25	25	100.00
tl_d_illegal_access				25	25	100.00
	gpio_tl_errors	3.830s	259.357us	25	25	100.00
tl_d_outstanding_access				11	12	91.67
	gpio_csr_rw	1.170s	83.536us	5	5	100.00
	gpio_same_csr_outstanding	1.320s	443.691us	4	5	80.00
	gpio_csr_aliasing	1.560s	49.304us	1	1	100.00
	gpio_csr_hw_reset	1.110s	17.355us	1	1	100.00
tl_d_partial_access				11	12	91.67
	gpio_csr_rw	1.170s	83.536us	5	5	100.00
	gpio_same_csr_outstanding	1.320s	443.691us	4	5	80.00
	gpio_csr_aliasing	1.560s	49.304us	1	1	100.00
	gpio_csr_hw_reset	1.110s	17.355us	1	1	100.00

V2S

28/30 passed

93.33 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
tl_intg_err				28	30	93.33
	gpio_tl_intg_err	3.870s	355.325us	23	25	92.00
	gpio_sec_cm	1.390s	598.682us	5	5	100.00
sec_cm_bus_integrity				23	25	92.00
	gpio_tl_intg_err	3.870s	355.325us	23	25	92.00

9/20 passed

45.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
straps_data				9	10	90.00
	gpio_rand_straps	0.910s	16.149us	9	10	90.00
stress_all_with_rand_reset				0	10	0.00
	gpio_stress_all_with_rand_reset	15.040s	1011.974us	0	10	0.00

unmapped

50/50 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
Unmapped				50	50	100.00
	gpio_inp_prd_cnt	0.930s	12.432us	50	50	100.00

Error Messages

	Test	seed	line	log context
UVM_ERROR (gpio_scoreboard.sv:248) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs [*])				11 test runs
	gpio_stress_all	35719324085574778501030377945992916952901014002155374231350615746907571966084	78	UVM_INFO @ 109166629 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	109029031128190634990908311420366612635960059399346619142402246900640589173527	76	UVM_INFO @ 255357206 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	1042266656510691413767010033487194494713630903621670962941372006679779612282	853	UVM_INFO @ 2669440810 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	106004621874250178001193193411738788827877929820119398675653810944625079845235	560	UVM_INFO @ 22710824351 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	32785631451762720653044459235564437051556504990842719566286670593428347801100	704	UVM_INFO @ 6826968954 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	73826147968797679675426998124471159036199044291647332595859922103541909865340	1857	UVM_INFO @ 30710777128 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	102098511456810356050714211984420469190243558228242505254170890496671061261150	367	UVM_INFO @ 1088242176 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_rand_straps	114970854223598826126199421075136150935216790003689400705935387282401000352068	75	UVM_INFO @ 1631266 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	82615510350277235844253470287252803865841147636602043466310852126257367610787	1136	UVM_INFO @ 29381701022 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	71353352921251906630175138615936601558169519107242019242266207893994973682585	78	UVM_INFO @ 984472005 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	74096747854214905233882339628859945287192262324262916507836538331838609069426	1285	UVM_INFO @ 6203807265 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -*				7 test runs
	gpio_stress_all_with_rand_reset	89151066750964280365276195840057802089146688458179347385139281547807989204803	144	UVM_INFO @ 1348066494 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	72336190163708108103261387909452326692193018990243956088469654007803637366064	302	UVM_INFO @ 1051900304 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	39078822602519380208488695145076080707665056678691612213280688668295356452861	79	UVM_INFO @ 258828105 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	97628594793609461993044908577782107063203066054200547397745840125578246849413	257	UVM_INFO @ 2829669608 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	105323392255055500178029658087921695804995482656349112550101592393870829170934	78	UVM_INFO @ 11460271 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	3412240495146750482902823114253900854486709273018036896683270399424137206660	79	UVM_INFO @ 858271404 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	70664599042686744381930061409505641557365337451106302501306152318678592141957	78	UVM_INFO @ 60547999 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1220) [gpio_common_vseq] Check failed (vseq_done)				3 test runs
	gpio_stress_all_with_rand_reset	51507649574278804437417198998083698017648423445202392698264319856932024773557	383	UVM_INFO @ 1011974294 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	43262080550546890390167054358766778264603043893184265287871062217699960784347	80	UVM_INFO @ 2415914 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	21965774998402888072748746688824149460640945244791010514259721349809546652671	80	UVM_INFO @ 68279251 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:660) [gpio_common_vseq] Check failed masked_data == exp_data (* [] vs []) addr read out mismatch				1 test run
	gpio_same_csr_outstanding	31905787493958387469092019152928473084219114913080883720345448804143966344815	77	UVM_INFO @ 112095700 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_] Check failed obs == exp ( [] vs []) Regname: gpio_reg_block.inp_prd_cnt_ctrl_ reset value: *				1 test run
	gpio_tl_intg_err	66474118620621245088816603470651110006959852340667734487912122676652595757449	196	UVM_INFO @ 88890207 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_] Check failed obs == exp ( [] vs []) Regname: gpio_reg_block.inp_prd_cnt_ctrl_.enable reset value: *				1 test run
	gpio_tl_intg_err	94119132830462393484287323793295275555596670400464111952433810690480794684968	209	UVM_INFO @ 165183587 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---