| V1 |
|
96.15% |
| V2 |
|
67.07% |
| V2S |
|
68.33% |
| V3 |
|
6.93% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| wake_up | 1 | 1 | 100.00 | |||
| otp_ctrl_wake_up | 2.490s | 849.369us | 1 | 1 | 100.00 | |
| smoke | 10 | 10 | 100.00 | |||
| otp_ctrl_smoke | 25.440s | 12160.735us | 10 | 10 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| otp_ctrl_csr_hw_reset | 3.230s | 124.601us | 1 | 1 | 100.00 | |
| csr_rw | 5 | 5 | 100.00 | |||
| otp_ctrl_csr_rw | 2.510s | 760.556us | 5 | 5 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| otp_ctrl_csr_bit_bash | 4.470s | 249.106us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| otp_ctrl_csr_aliasing | 10.370s | 420.489us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 4 | 5 | 80.00 | |||
| otp_ctrl_csr_mem_rw_with_rand_reset | 3.770s | 2010.860us | 4 | 5 | 80.00 | |
| regwen_csr_and_corresponding_lockable_csr | 6 | 6 | 100.00 | |||
| otp_ctrl_csr_rw | 2.510s | 760.556us | 5 | 5 | 100.00 | |
| otp_ctrl_csr_aliasing | 10.370s | 420.489us | 1 | 1 | 100.00 | |
| mem_walk | 1 | 1 | 100.00 | |||
| otp_ctrl_mem_walk | 1.600s | 52.796us | 1 | 1 | 100.00 | |
| mem_partial_access | 1 | 1 | 100.00 | |||
| otp_ctrl_mem_partial_access | 1.670s | 55.876us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| dai_access_partition_walk | 0 | 1 | 0.00 | |||
| otp_ctrl_partition_walk | 135.820s | 13826.063us | 0 | 1 | 0.00 | |
| init_fail | 201 | 300 | 67.00 | |||
| otp_ctrl_init_fail | 8.280s | 3159.092us | 201 | 300 | 67.00 | |
| partition_check | 17 | 60 | 28.33 | |||
| otp_ctrl_background_chks | 19.680s | 4037.883us | 3 | 10 | 30.00 | |
| otp_ctrl_check_fail | 51.620s | 9030.145us | 14 | 50 | 28.00 | |
| regwen_during_otp_init | 14 | 30 | 46.67 | |||
| otp_ctrl_regwen | 9.120s | 5045.565us | 14 | 30 | 46.67 | |
| partition_lock | 6 | 30 | 20.00 | |||
| otp_ctrl_dai_lock | 37.610s | 2171.956us | 6 | 30 | 20.00 | |
| interface_key_check | 1 | 10 | 10.00 | |||
| otp_ctrl_parallel_key_req | 31.310s | 15173.954us | 1 | 10 | 10.00 | |
| lc_interactions | 178 | 210 | 84.76 | |||
| otp_ctrl_parallel_lc_req | 15.080s | 1367.866us | 5 | 10 | 50.00 | |
| otp_ctrl_parallel_lc_esc | 72.150s | 33043.296us | 173 | 200 | 86.50 | |
| otp_dai_errors | 22 | 25 | 88.00 | |||
| otp_ctrl_dai_errs | 75.440s | 50989.690us | 22 | 25 | 88.00 | |
| otp_macro_errors | 3 | 10 | 30.00 | |||
| otp_ctrl_macro_errs | 26.250s | 2631.080us | 3 | 10 | 30.00 | |
| test_access | 5 | 10 | 50.00 | |||
| otp_ctrl_test_access | 32.810s | 12262.603us | 5 | 10 | 50.00 | |
| stress_all | 1 | 10 | 10.00 | |||
| otp_ctrl_stress_all | 119.600s | 74640.619us | 1 | 10 | 10.00 | |
| intr_test | 10 | 10 | 100.00 | |||
| otp_ctrl_intr_test | 2.310s | 49.204us | 10 | 10 | 100.00 | |
| alert_test | 10 | 10 | 100.00 | |||
| otp_ctrl_alert_test | 3.450s | 501.836us | 10 | 10 | 100.00 | |
| tl_d_oob_addr_access | 25 | 25 | 100.00 | |||
| otp_ctrl_tl_errors | 7.020s | 221.722us | 25 | 25 | 100.00 | |
| tl_d_illegal_access | 25 | 25 | 100.00 | |||
| otp_ctrl_tl_errors | 7.020s | 221.722us | 25 | 25 | 100.00 | |
| tl_d_outstanding_access | 12 | 12 | 100.00 | |||
| otp_ctrl_csr_hw_reset | 3.230s | 124.601us | 1 | 1 | 100.00 | |
| otp_ctrl_csr_rw | 2.510s | 760.556us | 5 | 5 | 100.00 | |
| otp_ctrl_csr_aliasing | 10.370s | 420.489us | 1 | 1 | 100.00 | |
| otp_ctrl_same_csr_outstanding | 3.280s | 183.482us | 5 | 5 | 100.00 | |
| tl_d_partial_access | 12 | 12 | 100.00 | |||
| otp_ctrl_csr_hw_reset | 3.230s | 124.601us | 1 | 1 | 100.00 | |
| otp_ctrl_csr_rw | 2.510s | 760.556us | 5 | 5 | 100.00 | |
| otp_ctrl_csr_aliasing | 10.370s | 420.489us | 1 | 1 | 100.00 | |
| otp_ctrl_same_csr_outstanding | 3.280s | 183.482us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| sec_cm_additional_check | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 359.710s | 47035.903us | 5 | 5 | 100.00 | |
| tl_intg_err | 30 | 30 | 100.00 | |||
| otp_ctrl_sec_cm | 359.710s | 47035.903us | 5 | 5 | 100.00 | |
| otp_ctrl_tl_intg_err | 32.340s | 6013.922us | 25 | 25 | 100.00 | |
| prim_count_check | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 359.710s | 47035.903us | 5 | 5 | 100.00 | |
| prim_fsm_check | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 359.710s | 47035.903us | 5 | 5 | 100.00 | |
| sec_cm_bus_integrity | 25 | 25 | 100.00 | |||
| otp_ctrl_tl_intg_err | 32.340s | 6013.922us | 25 | 25 | 100.00 | |
| sec_cm_secret_mem_scramble | 10 | 10 | 100.00 | |||
| otp_ctrl_smoke | 25.440s | 12160.735us | 10 | 10 | 100.00 | |
| sec_cm_part_mem_digest | 10 | 10 | 100.00 | |||
| otp_ctrl_smoke | 25.440s | 12160.735us | 10 | 10 | 100.00 | |
| sec_cm_dai_fsm_sparse | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 359.710s | 47035.903us | 5 | 5 | 100.00 | |
| sec_cm_kdi_fsm_sparse | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 359.710s | 47035.903us | 5 | 5 | 100.00 | |
| sec_cm_lci_fsm_sparse | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 359.710s | 47035.903us | 5 | 5 | 100.00 | |
| sec_cm_part_fsm_sparse | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 359.710s | 47035.903us | 5 | 5 | 100.00 | |
| sec_cm_scrmbl_fsm_sparse | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 359.710s | 47035.903us | 5 | 5 | 100.00 | |
| sec_cm_timer_fsm_sparse | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 359.710s | 47035.903us | 5 | 5 | 100.00 | |
| sec_cm_dai_ctr_redun | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 359.710s | 47035.903us | 5 | 5 | 100.00 | |
| sec_cm_kdi_seed_ctr_redun | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 359.710s | 47035.903us | 5 | 5 | 100.00 | |
| sec_cm_kdi_entropy_ctr_redun | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 359.710s | 47035.903us | 5 | 5 | 100.00 | |
| sec_cm_lci_ctr_redun | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 359.710s | 47035.903us | 5 | 5 | 100.00 | |
| sec_cm_part_ctr_redun | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 359.710s | 47035.903us | 5 | 5 | 100.00 | |
| sec_cm_scrmbl_ctr_redun | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 359.710s | 47035.903us | 5 | 5 | 100.00 | |
| sec_cm_timer_integ_ctr_redun | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 359.710s | 47035.903us | 5 | 5 | 100.00 | |
| sec_cm_timer_cnsty_ctr_redun | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 359.710s | 47035.903us | 5 | 5 | 100.00 | |
| sec_cm_timer_lfsr_redun | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 359.710s | 47035.903us | 5 | 5 | 100.00 | |
| sec_cm_dai_fsm_local_esc | 178 | 205 | 86.83 | |||
| otp_ctrl_parallel_lc_esc | 72.150s | 33043.296us | 173 | 200 | 86.50 | |
| otp_ctrl_sec_cm | 359.710s | 47035.903us | 5 | 5 | 100.00 | |
| sec_cm_lci_fsm_local_esc | 173 | 200 | 86.50 | |||
| otp_ctrl_parallel_lc_esc | 72.150s | 33043.296us | 173 | 200 | 86.50 | |
| sec_cm_kdi_fsm_local_esc | 173 | 200 | 86.50 | |||
| otp_ctrl_parallel_lc_esc | 72.150s | 33043.296us | 173 | 200 | 86.50 | |
| sec_cm_part_fsm_local_esc | 176 | 210 | 83.81 | |||
| otp_ctrl_parallel_lc_esc | 72.150s | 33043.296us | 173 | 200 | 86.50 | |
| otp_ctrl_macro_errs | 26.250s | 2631.080us | 3 | 10 | 30.00 | |
| sec_cm_scrmbl_fsm_local_esc | 173 | 200 | 86.50 | |||
| otp_ctrl_parallel_lc_esc | 72.150s | 33043.296us | 173 | 200 | 86.50 | |
| sec_cm_timer_fsm_local_esc | 178 | 205 | 86.83 | |||
| otp_ctrl_parallel_lc_esc | 72.150s | 33043.296us | 173 | 200 | 86.50 | |
| otp_ctrl_sec_cm | 359.710s | 47035.903us | 5 | 5 | 100.00 | |
| sec_cm_dai_fsm_global_esc | 178 | 205 | 86.83 | |||
| otp_ctrl_parallel_lc_esc | 72.150s | 33043.296us | 173 | 200 | 86.50 | |
| otp_ctrl_sec_cm | 359.710s | 47035.903us | 5 | 5 | 100.00 | |
| sec_cm_lci_fsm_global_esc | 173 | 200 | 86.50 | |||
| otp_ctrl_parallel_lc_esc | 72.150s | 33043.296us | 173 | 200 | 86.50 | |
| sec_cm_kdi_fsm_global_esc | 173 | 200 | 86.50 | |||
| otp_ctrl_parallel_lc_esc | 72.150s | 33043.296us | 173 | 200 | 86.50 | |
| sec_cm_part_fsm_global_esc | 176 | 210 | 83.81 | |||
| otp_ctrl_parallel_lc_esc | 72.150s | 33043.296us | 173 | 200 | 86.50 | |
| otp_ctrl_macro_errs | 26.250s | 2631.080us | 3 | 10 | 30.00 | |
| sec_cm_scrmbl_fsm_global_esc | 173 | 200 | 86.50 | |||
| otp_ctrl_parallel_lc_esc | 72.150s | 33043.296us | 173 | 200 | 86.50 | |
| sec_cm_timer_fsm_global_esc | 178 | 205 | 86.83 | |||
| otp_ctrl_parallel_lc_esc | 72.150s | 33043.296us | 173 | 200 | 86.50 | |
| otp_ctrl_sec_cm | 359.710s | 47035.903us | 5 | 5 | 100.00 | |
| sec_cm_part_data_reg_integrity | 201 | 300 | 67.00 | |||
| otp_ctrl_init_fail | 8.280s | 3159.092us | 201 | 300 | 67.00 | |
| sec_cm_part_data_reg_bkgn_chk | 14 | 50 | 28.00 | |||
| otp_ctrl_check_fail | 51.620s | 9030.145us | 14 | 50 | 28.00 | |
| sec_cm_part_mem_regren | 6 | 30 | 20.00 | |||
| otp_ctrl_dai_lock | 37.610s | 2171.956us | 6 | 30 | 20.00 | |
| sec_cm_part_mem_sw_unreadable | 6 | 30 | 20.00 | |||
| otp_ctrl_dai_lock | 37.610s | 2171.956us | 6 | 30 | 20.00 | |
| sec_cm_part_mem_sw_unwritable | 6 | 30 | 20.00 | |||
| otp_ctrl_dai_lock | 37.610s | 2171.956us | 6 | 30 | 20.00 | |
| sec_cm_lc_part_mem_sw_noaccess | 6 | 30 | 20.00 | |||
| otp_ctrl_dai_lock | 37.610s | 2171.956us | 6 | 30 | 20.00 | |
| sec_cm_access_ctrl_mubi | 6 | 30 | 20.00 | |||
| otp_ctrl_dai_lock | 37.610s | 2171.956us | 6 | 30 | 20.00 | |
| sec_cm_token_valid_ctrl_mubi | 10 | 10 | 100.00 | |||
| otp_ctrl_smoke | 25.440s | 12160.735us | 10 | 10 | 100.00 | |
| sec_cm_lc_ctrl_intersig_mubi | 6 | 30 | 20.00 | |||
| otp_ctrl_dai_lock | 37.610s | 2171.956us | 6 | 30 | 20.00 | |
| sec_cm_test_bus_lc_gated | 10 | 10 | 100.00 | |||
| otp_ctrl_smoke | 25.440s | 12160.735us | 10 | 10 | 100.00 | |
| sec_cm_test_tl_lc_gate_fsm_sparse | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 359.710s | 47035.903us | 5 | 5 | 100.00 | |
| sec_cm_direct_access_config_regwen | 14 | 30 | 46.67 | |||
| otp_ctrl_regwen | 9.120s | 5045.565us | 14 | 30 | 46.67 | |
| sec_cm_check_trigger_config_regwen | 10 | 10 | 100.00 | |||
| otp_ctrl_smoke | 25.440s | 12160.735us | 10 | 10 | 100.00 | |
| sec_cm_check_config_regwen | 10 | 10 | 100.00 | |||
| otp_ctrl_smoke | 25.440s | 12160.735us | 10 | 10 | 100.00 | |
| sec_cm_macro_mem_integrity | 3 | 10 | 30.00 | |||
| otp_ctrl_macro_errs | 26.250s | 2631.080us | 3 | 10 | 30.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| otp_ctrl_low_freq_read | 0 | 1 | 0.00 | |||
| otp_ctrl_low_freq_read | 145.430s | 62803.754us | 0 | 1 | 0.00 | |
| stress_all_with_rand_reset | 7 | 100 | 7.00 | |||
| otp_ctrl_stress_all_with_rand_reset | 157.060s | 80994.875us | 7 | 100 | 7.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: * | 115 test runs | |||
| otp_ctrl_init_fail | 87224617714995765748806648071325281144063230972624634723563048787785343416209 | 1535 |
UVM_INFO @ 59219596 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 7636587952688622918769841552083624534171346667499808596345311546952438970890 | 691 |
UVM_INFO @ 657785605 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 27581838367164468117520983191978146951515605758428371450603567445007202165614 | 6142 |
UVM_INFO @ 784204452 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 38635443117412467388511084165669767902304090277115344972388731005829704340868 | 903 |
UVM_INFO @ 151595247 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 82939516670737593884615089922951478701115047672656719885373691471298317744453 | 3230 |
UVM_INFO @ 110187891 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 115139014959667512966001216422427068599505379956338094662662761763934834104947 | 1483 |
UVM_INFO @ 257137857 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 97190536341907718999393177806182691107849749435819318606486892052050171463811 | 298 |
UVM_INFO @ 274163821 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 101346746804545756531210904041349898534810726853920292000224660633681858073823 | 6400 |
UVM_INFO @ 952213315 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 53379868671923027045890581580112598861420093442187379401487484572976885333512 | 3608 |
UVM_INFO @ 881010178 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 9618185065897880975529821808765960602819277931832720975955547672674726999768 | 332 |
UVM_INFO @ 59132070 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 92068215916793026807715557806654482472594285810830022427533771357646937633206 | 225 |
UVM_INFO @ 139024219 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 15128616057075054746303770662340704837157596183136077453050359943769808280675 | 183 |
UVM_INFO @ 542462818 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 112247902516179032684858383053966357416993398973163791921113986042596294675270 | 2747 |
UVM_INFO @ 1564291615 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 38607010045733036910720295604298042511825625944996925389515364839983565893614 | 367 |
UVM_INFO @ 83053577 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 79786375192606610559183714058842397790536158961354336108528843387581394972115 | 1728 |
UVM_INFO @ 63661109 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 21458165707758787651793177833518610158348559673879176237231845579109093234003 | 3288 |
UVM_INFO @ 144457776 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 32516753419547567038072619675315879258599449358168497682405566849823449703756 | 183 |
UVM_INFO @ 71954696 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 39271375115648705354506813805146909487872627418807848152513660598277492540676 | 367 |
UVM_INFO @ 586056402 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 65110331546653124921161915195678044519876593935197864136047921136439313570015 | 890 |
UVM_INFO @ 45169166 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 3411744843575437716052604963685099584525041150582470224920817255238598861601 | 341 |
UVM_INFO @ 84273621 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 46754761323353486947436119115472440629318410505054897914161056962830316321596 | 3150 |
UVM_INFO @ 182980847 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 105797594243454079910485295117741471973797351581601793863549213831956965112560 | 2992 |
UVM_INFO @ 207259528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 110267900752997153459525054239057623042172304485902031670520482816217644991662 | 1180 |
UVM_INFO @ 840044438 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 87075859670520670534332786037735283581467696253970941531972450027768086060293 | 3408 |
UVM_INFO @ 1603145144 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 20948794873796495120093565123851705691687931319611131617705583750277054429257 | 3056 |
UVM_INFO @ 196920116 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 52678693635581971311745025453870910215205492482564341169354588624528600215627 | 1786 |
UVM_INFO @ 209193553 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 12962523441727596899156503388146503578701182418033035551380305085313912698412 | 1029 |
UVM_INFO @ 828496532 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 931706967075823431755651072863897389777249215887489575448409721730036966170 | 10126 |
UVM_INFO @ 5045564700 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 81330827872898382788455200430811343509359919160203559196876229021308364080391 | 99 |
UVM_INFO @ 62783412 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 20758742047082698518625892698320196798324568019246766966629106125961002180079 | 701 |
UVM_INFO @ 54886924 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 98578917586050988083493710536112422215265589033276970193310248295840996869905 | 863 |
UVM_INFO @ 182329891 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 6032443005546294832482025226741129532215114689296219191191821109484639485494 | 1101 |
UVM_INFO @ 1191682988 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 99058733351853691102715257003022157537597963624452792245021109887118987391845 | 467 |
UVM_INFO @ 153338270 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 38509803318327147290232938706051870595262691721483027494409721753485623883005 | 969 |
UVM_INFO @ 146574213 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 37376173990998566200499719907545440888681944639697517218157908137590506367132 | 1365 |
UVM_INFO @ 851344042 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 40412351050824281476116270517390872008407627919994424419199523363106477233904 | 427 |
UVM_INFO @ 39937587 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 73197984330967160046271673732745046903758325922610332684569489599721133330347 | 1007 |
UVM_INFO @ 846856949 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 22340033973266174750904858860522015721030211795349042430350236067589667260258 | 1153 |
UVM_INFO @ 100787873 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 33426603565896522189959262778890063915465301607714012145455153375326611188982 | 1247 |
UVM_INFO @ 57970713 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 85908057968868237902469740400019804261301612714971457602201373656230493121255 | 717 |
UVM_INFO @ 94826505 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 5963311643533102381374386589987288359869167344405407926497326409547369322729 | 267 |
UVM_INFO @ 565600927 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 110068893998632638477190425078933020716845852092638976119129036812656572581982 | 761 |
UVM_INFO @ 43815426 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 21668192207074974889042051256613349853567546585530551030432335996348674510514 | 733 |
UVM_INFO @ 172860417 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 109815445871166915951904087824978460045021597560145271382365391086432811709629 | 267 |
UVM_INFO @ 110150190 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 50658587867744040378373692111171000472180083956141384827783655919524782335411 | 1885 |
UVM_INFO @ 1255386543 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 91716960875248007469955503911538071024592224108306932859835809166749551044674 | 183 |
UVM_INFO @ 73039390 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 83917083645732929096731505879127507447158488969752183161317858452256644589356 | 443 |
UVM_INFO @ 144454690 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 57477457349356148151388377850025834824096098875434025080923581844692766455606 | 383 |
UVM_INFO @ 68675894 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 74577146667511620929102625428355819867450571184192357430328370924176744651356 | 533 |
UVM_INFO @ 51725669 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 93740539444958174944991841037965964052646242324057836785164760887496280755871 | 351 |
UVM_INFO @ 41210631 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 24555847183988626071052340973971239677555320267047535081021426895304664964067 | 2107 |
UVM_INFO @ 133801218 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 79604704708465821451428389931523106791773605834267286473916494901201745337061 | 1711 |
UVM_INFO @ 944987571 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 44787930959334669400021170026231729732208640692891233169274785280474347560930 | 433 |
UVM_INFO @ 55404946 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 14208245195472621533120905681606679783282094106506253977385882137830690094754 | 309 |
UVM_INFO @ 58746424 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 53373574241977561873857048361600300950301659768572053185856047060801662304080 | 449 |
UVM_INFO @ 606294768 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 105971855732082831044877019453225670544198590723070462416474512189374010035066 | 493 |
UVM_INFO @ 629027401 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 36057407486172424531219535764394779301294924709698361502813329517986521363907 | 491 |
UVM_INFO @ 80480433 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 68550462202900373948562727505433770507285789857841279321358952623887493063481 | 2391 |
UVM_INFO @ 88810488 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 109201309357950141698935716958824036722090364854779068033475724817101189769364 | 309 |
UVM_INFO @ 87897223 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 46816582625761034908701608044904005660414411241075691343373957171601222445281 | 1045 |
UVM_INFO @ 185683616 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 44474896254793142755635165009496225357785331745610195473736178639459020144233 | 183 |
UVM_INFO @ 134441268 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 100262007534723689929379680496272563861726708236613611991616297656697600140227 | 589 |
UVM_INFO @ 830656687 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 72266153302312242404700294560858714754224663054281937714775702804900771273885 | 225 |
UVM_INFO @ 97878437 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 34096614221488855864315501249191725619500689588930145312758192256707017128477 | 409 |
UVM_INFO @ 40656708 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 72842324179094434232357714753602130816676193432134764134697033744317625408323 | 225 |
UVM_INFO @ 36341526 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 91983398980824323653421620957600555441447246672401567853720686530749469209660 | 183 |
UVM_INFO @ 44613210 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 84768322669833430017423056034086011467242169121972701902802885997200444028531 | 1027 |
UVM_INFO @ 1029378979 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 88069146820396743146184300163401025022064662010405503787690478445910411921029 | 351 |
UVM_INFO @ 49668686 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 7427965987745664965939891189141426513805387923111104247388897371987759719388 | 1675 |
UVM_INFO @ 96068734 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 109051463742333473166293121327706839858922696300646188340546897382610908871628 | 225 |
UVM_INFO @ 130293008 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 49163364070415229057668276312589237923293216276258543474380954171627292063765 | 267 |
UVM_INFO @ 40875771 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 91736530374380546364643941135324686233744895519847029774735515821471470014547 | 265 |
UVM_INFO @ 140877849 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 82974430565720982490362597884669637919212053157718159612173680062572948448674 | 2857 |
UVM_INFO @ 1240432512 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 69230144882117922003668865976429449937679564629450703880756585904873308735243 | 379 |
UVM_INFO @ 161025996 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 46905030943195610127130234849287615306232467996273120369444898021711576463958 | 141 |
UVM_INFO @ 39054289 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 10930652138962440797180492390867363119161842034450726801609906026783304213926 | 1221 |
UVM_INFO @ 805722393 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 100074528894610890903701523314028713648604947141969660091519371951494872999627 | 635 |
UVM_INFO @ 40281758 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 98104568205400438682903664330319808868914377566439792569716917162049518773766 | 1113 |
UVM_INFO @ 793770931 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 75597685612023749270717925375497675060927476811426888948863208539958206686221 | 835 |
UVM_INFO @ 708288412 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 99727515447368308732015740951416279384937693369467158331810696983502477971331 | 1179 |
UVM_INFO @ 69678695 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 32092839167540164597481582657542114823847506608500506665735082714424231122526 | 349 |
UVM_INFO @ 44848017 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 71998864983988118947190555952512565305621819548680213456232454895080408894195 | 99 |
UVM_INFO @ 111704212 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 20962486964592727429689045430413786988163332105738811357025811918911141231862 | 1417 |
UVM_INFO @ 847502920 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 4060983739192948848725352957272379533956939386693334344223973501143924420001 | 723 |
UVM_INFO @ 302316749 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 91089451217432143132794251890028985462579590679344993136310404451848720490592 | 651 |
UVM_INFO @ 42945407 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 61734001975132650330103219612604473230746944266512609228943589949596052137392 | 927 |
UVM_INFO @ 738875349 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 83844868568518605088934407091423001516438749877213959809106859121307919425030 | 867 |
UVM_INFO @ 125504810 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 8931645015391108495264584899720993187223612563515882633222043229284974790566 | 961 |
UVM_INFO @ 60681475 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 71753264885119363695863123069260423630502962493768997662931659513846720688205 | 505 |
UVM_INFO @ 43717731 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 54076631024257601232422766685050730082035182532878573504257537592442907457122 | 2393 |
UVM_INFO @ 143033094 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 53337275014707715484854426014110991022265925260506635766916673370191017833969 | 1319 |
UVM_INFO @ 199019279 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 62807610755118238818349509327469983036018633253409267705207941871715437484716 | 733 |
UVM_INFO @ 83506420 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 52607677155040987082336728643329215241742584644887181776798782592130880649494 | 799 |
UVM_INFO @ 222451003 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 10296732612439689048941309433172817842067080854023837427990214785538314794334 | 1527 |
UVM_INFO @ 221827601 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 4028291102165274120320207284637404951618399090817291319614263416883717019393 | 1723 |
UVM_INFO @ 116775804 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 84625461582370315579741242257313357452938433811903937631337752837004625697184 | 619 |
UVM_INFO @ 63627245 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 1375139664536727139251100261182858678032469968370458283307351218070033138046 | 465 |
UVM_INFO @ 143818534 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 83221255878027547211520436893252452660557234549999432452943007238526137395234 | 1079 |
UVM_INFO @ 99966503 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 60194387762507811906077828365674920420479990051920150645192777131332085358334 | 99 |
UVM_INFO @ 71930531 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 70474647701319595916598357895994724365002895706183464723314662797413907826904 | 1305 |
UVM_INFO @ 56118487 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 113662480694631931935457916591740675426507275242735635617349390621728699287010 | 1753 |
UVM_INFO @ 243676630 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 13734275709994993076094179722076942064052225002955754561743898007521097253761 | 681 |
UVM_INFO @ 50239386 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 65172625484467508919364699810588351840195322613970071872038580115477375574982 | 2209 |
UVM_INFO @ 160819359 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 84368412566586014095756529642490383518182781202766746201848478002741707361256 | 307 |
UVM_INFO @ 65088637 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 14706007488600156040328502418285321133957868122904036485409948800227481312269 | 1877 |
UVM_INFO @ 1003569583 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 59983308533702226254892367769413913673914401792813115386812349251643179763370 | 1823 |
UVM_INFO @ 58451435 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 12429152059559393690775053668253995191136452765165231979414793511565290339306 | 2007 |
UVM_INFO @ 63773380 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 99730022332592241345772453883421162435798537265803643480705205676748920816332 | 1503 |
UVM_INFO @ 221719178 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 1169869578101798957401378283611821887788043921567035010535294032426447232950 | 1085 |
UVM_INFO @ 768353958 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 14077316521741414505620152230728007934203317529922218681404743402678336933321 | 1615 |
UVM_INFO @ 63342431 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 15457676270786733149764058427929491816578753049693654419537175482357706634657 | 451 |
UVM_INFO @ 43697790 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 85501039114715416470131554853493558440660150753364915436077134425996173807822 | 307 |
UVM_INFO @ 41614277 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 42055751869431831082815366448332156420414625022258799244399305992784661480656 | 1123 |
UVM_INFO @ 59065375 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 3975324523658914009199947361276132903538704408536603777147105175483812832012 | 2917 |
UVM_INFO @ 371190023 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 67655070816234406327962120165633007711398723942711964914880771719582527962060 | 283 |
UVM_INFO @ 43125207 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.err_code_* | 83 test runs | |||
| otp_ctrl_dai_lock | 6264237075486605125833505636653430612581111014869242754595593067710885190836 | 922 |
UVM_INFO @ 425276305 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 17584284601451725501506690411785684281834636210830362523288185776323721351193 | 12616 |
UVM_INFO @ 696216833 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 36609928706192536117273291941680544868070394843074420843638336013068269608081 | 2672 |
UVM_INFO @ 3324285806 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 108290327116676203432377234467609351398912382486966920387338346398820118858050 | 5111 |
UVM_INFO @ 386004218 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 102359586326542017450774796522077176254816449916039133641260747950625308087966 | 40330 |
UVM_INFO @ 2874841980 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 79121237754282338169949979003879989960363973507163025014379301213855666478954 | 23676 |
UVM_INFO @ 10176575608 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 25239216316419108579657348761575838680756218044360987767296882846156546579185 | 4626 |
UVM_INFO @ 410547894 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_background_chks | 100759987316993683363098199536561956034256933784633245147346929997993028863808 | 454 |
UVM_INFO @ 291655309 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 111680930422534133242217502319451894718871083213002166463271583230475246212900 | 1528 |
UVM_INFO @ 232851450 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 61182093583808545345857582171213625087919530944730475993121229235761087777636 | 4282 |
UVM_INFO @ 654802643 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_background_chks | 70103081605823304284207231198524507032793034978067298641296511230934969172065 | 556 |
UVM_INFO @ 1667711225 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 95748205268103242930394209011218526124074805260068558997605923246012124059491 | 844 |
UVM_INFO @ 457607312 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_background_chks | 93593817622263742818630185673885633151503002508233727403264339878032125246459 | 5199 |
UVM_INFO @ 1574122740 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 6204879316344937898332270960571537937413466903736145225966792906938979542917 | 986 |
UVM_INFO @ 199759937 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 100342277453627927946764921800497283484947877857055773230138719678305577286777 | 59831 |
UVM_INFO @ 4804472540 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 34046674600393050682492174165441815371273922989538481188926639905560817267374 | 1696 |
UVM_INFO @ 115285484 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 111718157238929570842558748126538622427946393264006907911103220853808850230390 | 2294 |
UVM_INFO @ 209083446 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 18997752473543562568751815782218024439597416155716071895561396587703949114542 | 4170 |
UVM_INFO @ 228263480 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 40998085154127921224716812412651972083445610888741304328296590737321351630120 | 4028 |
UVM_INFO @ 95201141 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 64789482974938837468871720229466393323450444207794858081910005229817688831934 | 1107 |
UVM_INFO @ 1480296589 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 1399718449976543294848525224528995364686981887846631635886648058882902903499 | 1004 |
UVM_INFO @ 101896517 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 252557559435262265993084570674601912330728538569403981313859589107557161026 | 2881 |
UVM_INFO @ 535412937 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 25611922226869263454225099551101267399201670158422160158523733470024174948579 | 392 |
UVM_INFO @ 112349494 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 104882276604846627929301749730018256524496560280941654265316898125366393154684 | 4074 |
UVM_INFO @ 206600915 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 114425897418720211667944476893945595761331752593976871612789884634393363646619 | 2870 |
UVM_INFO @ 188679276 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 14358696873527438357638564736899850605567815353507157523908146152047936886219 | 818 |
UVM_INFO @ 90359640 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 19637639517579747377720254462558945747470478482876085280063161776803778075836 | 1443 |
UVM_INFO @ 2335159694 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 48447241598001803706456118816886474464620366957647518547393357685649368580144 | 530 |
UVM_INFO @ 264994435 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 38512984611204647999180795524674793988044433764194225727222821538317458120554 | 2771 |
UVM_INFO @ 7577637802 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 37855754470468070968764001835199236389806710797186197365575114176650347024550 | 4336 |
UVM_INFO @ 98097531 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 69294853673304622873108267653389059849208652629529539905844428162945235196434 | 164 |
UVM_INFO @ 257003005 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 94339568484560955406869649400733416150533700072590628298657483517942568540869 | 2562 |
UVM_INFO @ 117702673 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 78387715050464678742063465210855910112410051742403185316816176897494449812753 | 1148 |
UVM_INFO @ 124142761 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 108379318465821555777852247825029759925191908051279727922792674793981940829588 | 1820 |
UVM_INFO @ 129939492 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 60666995002342036156137200947479333190235293795915246593108209945311674855896 | 1630 |
UVM_INFO @ 259030183 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 61499315244552769481180956605947542729164334639280224154920265861617032871931 | 9094 |
UVM_INFO @ 803095525 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 48253332100232336525304284573358260338101433241984519522683853712193769250902 | 4328 |
UVM_INFO @ 113248068 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 115771481083427801713288303370479786778780944004733660249295625155481154038517 | 1535 |
UVM_INFO @ 263685625 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 41270398112071420420158045848624790921758917307526844843545464690364735500868 | 1446 |
UVM_INFO @ 295462211 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 19313323951480499060692638200086593796386984018266558041540803375520845611717 | 8716 |
UVM_INFO @ 2852344923 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 42927863720759912454746112722119210804514084766536989376333815047382827240165 | 1814 |
UVM_INFO @ 2630004720 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 13065332851931410270496636212977541365500459622687168435348515197935260404655 | 11293 |
UVM_INFO @ 2101173151 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 80342852077329452865731365077737271079452937360826374799426291354588104618824 | 2284 |
UVM_INFO @ 105608350 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 93502450761119761380211573752685120438671574346011822338367349952794394784897 | 6859 |
UVM_INFO @ 8020058470 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 58134062778796125884214098030868268886592217254459779699352392691164777213472 | 884 |
UVM_INFO @ 110342535 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 58362559090732361098248692769729979372989740140688723030209047160623908806036 | 2505 |
UVM_INFO @ 309901250 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 8876069238203650320544575953065658177703417677834150535349640484492597430455 | 654 |
UVM_INFO @ 262572778 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 44100690725636786433912022674740555555571511094390513075630370131085061386932 | 2702 |
UVM_INFO @ 354036384 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 94924881663389720767450753504598512680366236566455230033116353392944143173188 | 15660 |
UVM_INFO @ 1763286538 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 100203304230058066440266712676717218572161459171789279385422957196878467862913 | 8943 |
UVM_INFO @ 591401783 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 29284700806939982042623669900815872070195880420933683961434419083192537255249 | 490 |
UVM_INFO @ 84135742 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 20441669701976352183931305812623174436103065407413198058897104609265454230342 | 15757 |
UVM_INFO @ 3350417463 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 13577970271502899100124563756926868590590942477368971208685707733550351039745 | 3842 |
UVM_INFO @ 330038097 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 42798970801175991231390271646600986271315425863273306418540941359756214566574 | 160 |
UVM_INFO @ 1690788389 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 23013873758185238146265360211529616333878627940650878920854280214994143136490 | 1808 |
UVM_INFO @ 3322475080 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 15454984681693247845261594192465064572454968271171940467089959410072672796403 | 1558 |
UVM_INFO @ 63871261 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 18859198403924243285640664777210067022288869306909053631340167204793745762721 | 160 |
UVM_INFO @ 213537576 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 53463853895784605154187160425659406276462178023434813211539250270262918191453 | 4627 |
UVM_INFO @ 1776146349 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 41725443802162601892261924902650160827356945404770560205369815291587315433211 | 162 |
UVM_INFO @ 859879780 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 75811581636429846503272018884573872270018624200848197518557059147599497681727 | 920 |
UVM_INFO @ 209379626 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 22709649559112353940089956737195176293648035574854708377741473410370216313040 | 13600 |
UVM_INFO @ 38473235919 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 15739964397822934517371573666187118311453721640382981023121723105552795236984 | 6152 |
UVM_INFO @ 4310466000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 31895699001197197720813211492711967181051509648716055048005991765522284560423 | 3696 |
UVM_INFO @ 91391002 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 34841906849519499063748575497910677454409984222068282616387733894065247698983 | 17652 |
UVM_INFO @ 5415436260 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 94562247303454374328308584109279426991638544568702175576713538624201544879255 | 8260 |
UVM_INFO @ 14767721373 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 44222130868024339379667400723678627875842837041113935159445673836281503148620 | 584 |
UVM_INFO @ 45291126 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 71494294277690619907400843269689402908479913165319221524470564129484230394361 | 1160 |
UVM_INFO @ 74064740 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 99358858303650853821851450714025679376565939753105436950159330176211661598879 | 2934 |
UVM_INFO @ 123745813 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 102397464748212398165556010424369421970183134616333898550206886774490380844181 | 516 |
UVM_INFO @ 318399076 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 113501059813098442940935359735336440780253599825443052029352426078933274856961 | 250 |
UVM_INFO @ 47059501 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 56879325133682804229307488630294276518675840299557193008869266332496412588544 | 2148 |
UVM_INFO @ 180959529 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 74589928990728108687362150589906004903452385487225219230239993882418799530936 | 362 |
UVM_INFO @ 66628058 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 43186891819067891035179330748648192119359776230493469793961235775922543857317 | 294 |
UVM_INFO @ 801341508 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 20069988831216981693656052233484449727747143179228045462856499651176540726105 | 4392 |
UVM_INFO @ 97888627 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 68609539418789297566316193431470805735890459272006576901399443316211475201534 | 1928 |
UVM_INFO @ 71023081 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 38426930271304903018967092465536606177797793355746135200418239551014646645127 | 1470 |
UVM_INFO @ 234437106 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 112519305473243143516794119493415188132214824624043701597622922151070909964154 | 3754 |
UVM_INFO @ 90412136 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 86643263858054597264034177127295575968492287528273485839147166516998006785744 | 362 |
UVM_INFO @ 586058935 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 98750335296152622609303237519103801976175470144990698087247974929995261079201 | 328 |
UVM_INFO @ 776847054 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 23735799387049807932197392772671563695502111054028414419856834097760768708821 | 2800 |
UVM_INFO @ 1408972512 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 21691206610749805618783441716611339879438136372324877869588593347120327441556 | 362 |
UVM_INFO @ 35832570 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 114833501626319687063533270727794765206397505626927444662956811692970546834164 | 1736 |
UVM_INFO @ 199366806 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 35354126445561708268250421267907730640749906738099325064813954586032723133369 | 570 |
UVM_INFO @ 174838298 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.intr_state | 43 test runs | |||
| otp_ctrl_stress_all | 84771391843872385015644422136793252468131591582887118463023406783774962127334 | 13075 |
UVM_INFO @ 6230686401 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 7390787903738544055463126828523865783788499193856221022109326936658683572037 | 8521 |
UVM_INFO @ 12481511043 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 87013704142215430120355302473993741759662793084957072421510481198470578928843 | 10752 |
UVM_INFO @ 875629135 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 90240862720954893976424042605549331353936224339706481576554810332805589016325 | 12064 |
UVM_INFO @ 13501239232 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 87476547371077969782990328549018465778208040545350322779227396360694916909358 | 9659 |
UVM_INFO @ 1932723601 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 82142584908577635360911305655083872509582092666031969848058786894129954602823 | 1764 |
UVM_INFO @ 4792392770 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 86545822658563359279107033677478383854483856840055199070487080410506381831312 | 3513 |
UVM_INFO @ 416191884 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 70699423174329878559276754559960910502702087583552421233711490558738275100841 | 3233 |
UVM_INFO @ 1007848932 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 107554707398874096640862130653198903112623841548786249508219129816569943587158 | 5219 |
UVM_INFO @ 665487997 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 30805457455670182322205171522313551199260537025559976460539134536662329794312 | 6623 |
UVM_INFO @ 839131337 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 106726953368369096324245008415086393102541859824584222212106831492379170386325 | 29459 |
UVM_INFO @ 12262603149 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 13908228469965059641370514033006963693915546844624619271434549952402981837395 | 11615 |
UVM_INFO @ 15173953776 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 107851826532754146302117735100355128613339603853146066816448129833160175812794 | 454 |
UVM_INFO @ 540169665 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 110510296810929723428735579534480369474058241335668068833613227136010227051117 | 108 |
UVM_INFO @ 66013385 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 107450960338258979899497883454515748086922864057535803893828142233562612176622 | 9604 |
UVM_INFO @ 1925633769 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 79822683936682208532856392031213587876007039130323841169643680371629523218206 | 14572 |
UVM_INFO @ 1606856870 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 34436782984086536445570478379386558422267665634015321249065276223294220829684 | 28602 |
UVM_INFO @ 2171956178 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 34785833498386104850147626747460735922391246274712300586365523433344053904991 | 12597 |
UVM_INFO @ 1084985042 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 24910290684321870621596479610813597921387377486055819543929228158566908674892 | 7748 |
UVM_INFO @ 22415824719 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 89228370606834854960447600087574399353301514838166459012311596705822934561844 | 5394 |
UVM_INFO @ 1067303291 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 107753039100697375737243854304672287306830326589594905109509491972009511543927 | 7452 |
UVM_INFO @ 963333118 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 6458261085117561347258991172522663523985873745682142149940304765893016359424 | 9881 |
UVM_INFO @ 1745989705 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 39576685953402965967047966031715702095901848410058960294265649876272379390858 | 234 |
UVM_INFO @ 87123135 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 37771929058758646048112065172664355045297343309670612745067142739135486991654 | 10724 |
UVM_INFO @ 13298610615 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 94241941288157287970515154646811188935659986994721182138135806696919415694193 | 3748 |
UVM_INFO @ 2922563827 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 39310517717086025125237621919088273050684143800862136713318716132243380870659 | 1547 |
UVM_INFO @ 3344051785 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 89141787994506793520227059832804026471775036371162702455409188584990721025417 | 6867 |
UVM_INFO @ 289628208 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 55272331621754438381272118655509631320818422114648035393037001422849890633699 | 10899 |
UVM_INFO @ 3246682903 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 95844929243795895129787464914472015183311005691837895498270286273079831007860 | 2270 |
UVM_INFO @ 1325946942 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 8541055713804310076479400187921718095494379025736998743035465237779501451371 | 18550 |
UVM_INFO @ 8163806184 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 46334504061599672864147912096922295993502645987816312926361198369366547112161 | 2576 |
UVM_INFO @ 2180488764 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 81446290887420136199889963397513664277617882244788642379953250346865232285210 | 444 |
UVM_INFO @ 362445239 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 26125795071333851978609639358960844985409412593898231111555321391768032540740 | 1991 |
UVM_INFO @ 396593862 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 80454878250400525239640114630866620734073815037673613704490264255793350860347 | 9735 |
UVM_INFO @ 13758294065 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 87713314864926551087700798996543442197380127724301328194209730437604077661184 | 164 |
UVM_INFO @ 161178208 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 70175096603670440726005058846284265227368247481591513389696201905763740604268 | 2624 |
UVM_INFO @ 721752420 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 6135626506707021362750803090969151138105503723664942304694117868247656691511 | 1000 |
UVM_INFO @ 3674697020 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 69640945442590291186969742593428814933841070428038773128189739988853472358065 | 12201 |
UVM_INFO @ 3019363358 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 15053891067606604099253449028526347463517250600515131542024041838186007873879 | 19410 |
UVM_INFO @ 4230139605 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 66849542084705411558758610877405616809248213590418479168305843092057404248252 | 11956 |
UVM_INFO @ 3206341008 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 58780077690544975247423297705551528156986370801323116062332774713381785031258 | 7394 |
UVM_INFO @ 1044477720 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 98009057714775152708830376899748394428561337721332296997611648875024547288607 | 11106 |
UVM_INFO @ 22908832875 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 52912641788945245695839090029987300345809884279568733853265928748023813797495 | 12280 |
UVM_INFO @ 4943523305 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_* | 29 test runs | |||
| otp_ctrl_macro_errs | 110932733005791054935790376148052129361254504093104009446289131861542067374777 | 512 |
UVM_INFO @ 216249348 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 107809961017329920639439176297088140361710211284447403475166597213336826800434 | 2680 |
UVM_INFO @ 867193906 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 77416612009764981519234902862695774159952748638254410640103641161117875826432 | 584 |
UVM_INFO @ 176026820 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 58112892396454724080083376610388001926863937738570848032445886289048128860884 | 488 |
UVM_INFO @ 38946104 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 38190314743403254320385590332134867585796265436532901273042750610764786805892 | 18183 |
UVM_INFO @ 1065728734 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 91681438921877158030538349913373648548915299310268512492415849203595336505964 | 594 |
UVM_INFO @ 908073648 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 34675606541222320357022498908962473808459230409536362238511649116853950164307 | 5711 |
UVM_INFO @ 465343362 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 17664087254095244928071972746664881671759041178101234458788967447837435012716 | 5779 |
UVM_INFO @ 400397662 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 22338306515147685524438197105145671936862681816431940124261208786192546799867 | 2575 |
UVM_INFO @ 674521004 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 110270175189311229145531254844336055220664266705353810514504576726457701129565 | 11404 |
UVM_INFO @ 798262110 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 48304285268851157182150892111976963449268638591568990392559784256364582289349 | 704 |
UVM_INFO @ 725081087 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 69735885055992493708312583780216281814002433578432774867808508699399415416062 | 5181 |
UVM_INFO @ 7264074416 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 108330797431169501686776450065508480310745239018881520268189910276229255853407 | 11919 |
UVM_INFO @ 3758823293 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 98978961010627502755398679628692696296064033309208915863240319491477748090727 | 168 |
UVM_INFO @ 154065133 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 48515343555352103062309212488120906925362832919455402485034487070658124716573 | 2157 |
UVM_INFO @ 522839242 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 94808522559937890930798654396965545950603050358765394720404046200868066379886 | 11911 |
UVM_INFO @ 1812806203 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 71777182021425309073051712747373047418730097682582408936281621341666154127849 | 4557 |
UVM_INFO @ 1409476297 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 18419357781360878275455667634341685465455388607342033727858017167466039010700 | 12218 |
UVM_INFO @ 2810604557 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 40386988777853785195954893962117969737472175108811310209061089745503210138681 | 13270 |
UVM_INFO @ 7277284997 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 103896060364754825356155765314286871151571752544331460182841425560772033008497 | 1190 |
UVM_INFO @ 249818424 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 97028631662269605934583476128936492988643503389575602238108973258344204146420 | 10131 |
UVM_INFO @ 15663041131 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 37398006579294614211021793465177280727472740243176305932165086309720027718861 | 7059 |
UVM_INFO @ 2911606940 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 58929165574631978016589093726782546085229981997926753824771884281703672311520 | 3983 |
UVM_INFO @ 339487295 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 90602744910773531529211460024502876839476545682470757558107565637413207644842 | 3909 |
UVM_INFO @ 546952171 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 47900176406208738290311502258246758356152572735219244250628578205081010231671 | 5461 |
UVM_INFO @ 8152707651 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 58207647363351361796496456736377154592461367484643201029161719694206621883405 | 6651 |
UVM_INFO @ 2957390887 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 44356902662881123562571530601300707160546330496340443546726638782629166393087 | 11175 |
UVM_INFO @ 971953973 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 22560244058165492933842196906975678488598344925046727596156436625146831234116 | 170 |
UVM_INFO @ 88746194 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 64762607696641256720841280577268756214108723360175862618736941693385529923324 | 14596 |
UVM_INFO @ 26201657828 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_scoreboard.sv:2213) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) d_data mismatch when d_error = * | 21 test runs | |||
| otp_ctrl_stress_all_with_rand_reset | 96610149501682227775694022639950634007471105552621949090184335625319490820572 | 19175 |
UVM_INFO @ 3843044743 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 34614241187190056680749296808887512622859669071585328508300870704730174994267 | 6827 |
UVM_INFO @ 1570906508 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 97837330663555193984048786424438634157484291605216565261002269356619270675418 | 91 |
UVM_INFO @ 41682473 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 89950460801066812708276519462232913676713852973784727428602312032056245778400 | 91 |
UVM_INFO @ 495998872 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 59601853129707436929912342195379666918941126373458425525077886363100271954735 | 13754 |
UVM_INFO @ 1711767276 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 17793188648301421138462923442915567484956939981439629720586264795764471791535 | 91 |
UVM_INFO @ 500176067 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 47841233183136300399746105620893718161615630088397293201413863696638678420133 | 18653 |
UVM_INFO @ 8283252997 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 32647789625185470828623684392944805122114969910618831764158300792954799333796 | 423 |
UVM_INFO @ 83930068 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 60634864903822311415081125928944643774671431314378871918467836589893030464332 | 92 |
UVM_INFO @ 119227681 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 49754754537618163838213325840700953116839776166320314389718428570327547338963 | 91 |
UVM_INFO @ 108372635 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 7750845063867058041749847718789598272374086422125207577207796392501308383975 | 3832 |
UVM_INFO @ 3195037739 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 40750536000782206098144976302326334520492280200625704088253937044733474824971 | 92 |
UVM_INFO @ 30290344 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 50999396494810859669061042365665867668951611494994791468711357820660321097021 | 263 |
UVM_INFO @ 266125631 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 83132167141362439338422874102066766188444041911488981890167994804872939835481 | 4549 |
UVM_INFO @ 1179697051 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 64834643331069349528994422716212440025362638217838333663524274588613494971459 | 275 |
UVM_INFO @ 1099965764 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 60743335477950240344527421927747147803857631524040446002175852770757718571522 | 7323 |
UVM_INFO @ 10792957220 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 90823526446515081258093580560468504504058251898141146825990752425257934551473 | 5686 |
UVM_INFO @ 2632543495 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 91272147473104036684928440947162976431820123374897470881093315875172910034049 | 91 |
UVM_INFO @ 124986341 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 89537279579585725601893482488785433896617031418064859091952167086310660234367 | 1350 |
UVM_INFO @ 1566293650 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 31800851242647700528232447894891414642849603777986468410937005374606023035654 | 11623 |
UVM_INFO @ 1671223462 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 106919309829771059328873726144072331543831791459703162901987962308159404659119 | 1495 |
UVM_INFO @ 85318855 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_scoreboard.sv:671) [scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (* [*] vs * [*]) Interrupt_pin: OtpErr | 16 test runs | |||
| otp_ctrl_background_chks | 31713136322451191714290920813334121295072610621921080898323536542015708692034 | 10034 |
UVM_INFO @ 4037882919 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 22742874243270350107332770304451671116343248306658741827393356945830009078631 | 1965 |
UVM_INFO @ 2539594272 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_background_chks | 70178257820875766399556708937562288919393872127983234001670933737373408418506 | 15293 |
UVM_INFO @ 1784151636 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 21839110960938918155683449756279972931171415104002469951421500550444902262782 | 6237 |
UVM_INFO @ 1238429725 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_background_chks | 55028915996714232474190018136494724132156072182185143422121525675917860439561 | 5619 |
UVM_INFO @ 3068253378 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 39320484798144592620944871946758458720116632768071386968880071420526855815779 | 7457 |
UVM_INFO @ 10818099036 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 538785559161681083842800995742398401599094267215309385940651218447352163932 | 19845 |
UVM_INFO @ 2120792412 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 113650081157577289529471818063262079604616802667106737556761325386557327215816 | 7727 |
UVM_INFO @ 732330466 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 15981645482279146879336123051701201542110217716858206353655077664889292800923 | 6533 |
UVM_INFO @ 1773175717 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_background_chks | 114976754544485096706716884017044426862591649137512797615638701408904916694066 | 10288 |
UVM_INFO @ 12309575310 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 109368325901357879232205094481540669535958053885387433936266417108068999504574 | 5270 |
UVM_INFO @ 671123001 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 74133581214243409072772728153522983474202691139218718819245809503619232161962 | 9201 |
UVM_INFO @ 2959361869 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 113072144167181215720977373075227270689336753620780018356535432387202277298299 | 3493 |
UVM_INFO @ 4287150105 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 13790200008091544026493300387396365826650587690065478125243224466881512304390 | 4789 |
UVM_INFO @ 257029166 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 100346231253743705620636259827833464794741211727017602959656685511486756803852 | 7729 |
UVM_INFO @ 1233731302 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 53954029024770118193931679202926048258395321913602562975972053799267801513165 | 8627 |
UVM_INFO @ 1765417723 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (cip_base_scoreboard.sv:632) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) d_data mismatch when d_error = * | 12 test runs | |||
| otp_ctrl_stress_all_with_rand_reset | 5916966423657999100990483503907804641452550732742571642638211819622381281242 | 91 |
UVM_INFO @ 50216622 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 2814074684008931419469560251899988924853899321616422481338966181026641559174 | 6314 |
UVM_INFO @ 13785892123 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 66031417371974619166646726605735640308431366407519692570073227776789161125828 | 159 |
UVM_INFO @ 6202634285 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 41198881583534502763097594429129854371292011763669811527778990488953101408831 | 4637 |
UVM_INFO @ 14180757300 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 12338175510867767455601345280199241993883880111302848709696427583970959487864 | 268 |
UVM_INFO @ 16034684161 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 63193635261663420535849761426959017430179654530039880853411615164938481619846 | 91 |
UVM_INFO @ 31152580 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 20351323767082655595602665405874280656042297675204671293661427155548358368440 | 5075 |
UVM_INFO @ 24453580240 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 112667972274198629487739158078530765835776177503898975853829405106007158898976 | 165 |
UVM_INFO @ 70682619 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 109624817846247715299439332757312123742834222939103636210019697470132332141413 | 112213 |
UVM_INFO @ 3838631597 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 67753034571198389213487369754063891902565419448384858235424753780892863521285 | 1270 |
UVM_INFO @ 9833707150 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 90231344746138764737062586437447180289421283587793826758706361627427611400049 | 1300 |
UVM_INFO @ 1369637990 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 64127701173175384724735137057385479859065872024759058388833156860313217759781 | 24872 |
UVM_INFO @ 661752482 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_scoreboard.sv:958) [scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (* [*] vs * [*]) reg name: status, compare_mask * | 8 test runs | |||
| otp_ctrl_parallel_lc_req | 45941852640929065460512537390193891716108813675966993442165973335267400522388 | 10877 |
UVM_INFO @ 625392236 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 78627633943876005861422823116886963265953285609590119045607553267882761335948 | 2986 |
UVM_INFO @ 187152332 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 53828223738885747135295515301098090511380861032199056382784430737062454120115 | 38626 |
UVM_INFO @ 6717378884 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 86132579653419103493629285735712648218457182467378990490065099027103295592820 | 8227 |
UVM_INFO @ 3968310403 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 13439075538897434125986338572224469860432667324001892599558424113866264659222 | 12266 |
UVM_INFO @ 733516887 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 95628679476923227788382166021254166896154770788699734490049363453604410770799 | 8718 |
UVM_INFO @ 1461880034 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 100203872368049377592838787928939875986438432428209232547369187612215419614122 | 26899 |
UVM_INFO @ 36385990550 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 822267870787491934124221294032633859348667343607597863003485656645229693524 | 3985 |
UVM_INFO @ 696373698 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr *ed* rdata* readout mismatch | 3 test runs | |||
| otp_ctrl_low_freq_read | 36822848244708911906780945300417740480507373634478182738274513874183222574237 | 89 |
UVM_INFO @ 62803753838 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 115217655797766747851252142152021410418821329697381118800733094355993439223203 | 3260 |
UVM_INFO @ 74640619302 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 96719433273473967442969228140224846786992053893251665595023826143751483869084 | 3943 |
UVM_INFO @ 27159864066 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.direct_access_regwen | 2 test runs | |||
| otp_ctrl_stress_all_with_rand_reset | 16993406544773244193962383990768928531711776324694180034451077231039467501169 | 6073 |
UVM_INFO @ 296576481 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 19732235559085121955366506461893114603095594690575331132080553215377983540451 | 3654 |
UVM_INFO @ 1222120999 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr * rdata* readout mismatch | 2 test runs | |||
| otp_ctrl_stress_all_with_rand_reset | 46382995740574783075981595052020896197728941534620864448810116119130781148766 | 95 |
UVM_INFO @ 10736661571 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 30093862241304697891618677694382287907894039089162202898574499730674575510201 | 3434 |
UVM_INFO @ 15550542417 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_partition_walk_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr *ed* rdata* readout mismatch | 1 test run | |||
| otp_ctrl_partition_walk | 52130407074043661745493601050437675793299933925261940523134648704654393328925 | 112825 |
UVM_INFO @ 13826063433 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| Offending '(cio_test_en_o == *)' | 1 test run | |||
| otp_ctrl_csr_mem_rw_with_rand_reset | 72910024639126188695877311467482097032286965897752385093132005272666809885812 | 98 |
UVM_ERROR @ 290559658 ps: (otp_ctrl_if.sv:389) [ASSERT FAILED] CioTestEnOWithDftOff_A
UVM_INFO @ 290559658 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| UVM_FATAL (cip_base_vseq.sv:465) [otp_ctrl_parallel_lc_esc_vseq] wait timeout occurred! | 1 test run | |||
| otp_ctrl_parallel_lc_esc | 79099717228076727351771611699632061401665628065142193944435671424243955998290 | 88 |
UVM_INFO @ 10012031921 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| UVM_WARNING (uvm_reg_field.svh:1191) [RegModel] Trying to predict value of field 'err_code' while register 'otp_ctrl_core_reg_block.err_code_*' is being accessed | 1 test run | |||
| otp_ctrl_stress_all_with_rand_reset | 106031431058907692034503984127782451584896077705363246480671087993253666102555 | 5112 |
UVM_INFO @ 3890677203 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 3891010539 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 3891052206 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 3891135540 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
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| UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr *c rdata* readout mismatch | 1 test run | |||
| otp_ctrl_stress_all_with_rand_reset | 10419098422477529402155632132779374131198012964344299924077874713141831568150 | 97 |
UVM_INFO @ 10959175821 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| UVM_ERROR (cip_base_vseq.sv:1286) [otp_ctrl_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. | 1 test run | |||
| otp_ctrl_stress_all_with_rand_reset | 9046995311968435248713776424904921252044931836209096864412469053894535556828 | 1920 |
UVM_INFO @ 184892634 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr *cc rdata* readout mismatch | 1 test run | |||
| otp_ctrl_stress_all_with_rand_reset | 50294344736896481015355760942676185234319885524108972697394553325144876933704 | 13662 |
UVM_INFO @ 3359390369 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| UVM_FATAL (cip_base_vseq.sv:465) [otp_ctrl_common_vseq] wait timeout occurred! | 1 test run | |||
| otp_ctrl_stress_all_with_rand_reset | 90746009906970209849638033475783955909626970512746977995250737761787548706704 | 7198 |
UVM_INFO @ 10618199332 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr d* rdata* readout mismatch | 1 test run | |||
| otp_ctrl_stress_all_with_rand_reset | 49105271671344245315648970178657489697224611071749473486758699730942799721781 | 93 |
UVM_INFO @ 4539162180 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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