Simulation Results

Simulation Results: gpio

24/07/2026 15:00:35 DVSim: v1.49.0 sha: ffebaba json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
96.99 %

code
92.24 %

assert
98.73 %

func
100.00 %

line
99.89 %

branch
97.61 %

cond
94.53 %

toggle
94.19 %

FSM
75.00 %

Validation stages

V1		100.00%
V2		93.63%
V2S		93.33%
V3		35.00%
unmapped		100.00%

53/53 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				40	40	100.00
	gpio_smoke	2.240s	361.412us	10	10	100.00
	gpio_smoke_no_pullup_pulldown	2.330s	78.743us	10	10	100.00
	gpio_smoke_en_cdc_prim	2.200s	273.450us	10	10	100.00
	gpio_smoke_no_pullup_pulldown_en_cdc_prim	2.050s	193.485us	10	10	100.00
csr_hw_reset				1	1	100.00
	gpio_csr_hw_reset	1.060s	67.060us	1	1	100.00
csr_rw				5	5	100.00
	gpio_csr_rw	1.160s	62.031us	5	5	100.00
csr_bit_bash				1	1	100.00
	gpio_csr_bit_bash	4.580s	752.354us	1	1	100.00
csr_aliasing				1	1	100.00
	gpio_csr_aliasing	3.040s	161.209us	1	1	100.00
csr_mem_rw_with_rand_reset				5	5	100.00
	gpio_csr_mem_rw_with_rand_reset	1.550s	538.151us	5	5	100.00
regwen_csr_and_corresponding_lockable_csr				6	6	100.00
	gpio_csr_rw	1.160s	62.031us	5	5	100.00
	gpio_csr_aliasing	3.040s	161.209us	1	1	100.00

147/157 passed

93.63 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
direct_and_masked_out				20	20	100.00
	gpio_random_dout_din	2.240s	147.215us	10	10	100.00
	gpio_random_dout_din_no_pullup_pulldown	2.080s	295.881us	10	10	100.00
out_in_regs_read_write				10	10	100.00
	gpio_dout_din_regs_random_rw	1.250s	26.729us	10	10	100.00
gpio_interrupt_programming				10	10	100.00
	gpio_intr_rand_pgm	1.970s	188.878us	10	10	100.00
random_interrupt_trigger				10	10	100.00
	gpio_rand_intr_trigger	5.670s	484.486us	10	10	100.00
interrupt_and_noise_filter				10	10	100.00
	gpio_intr_with_filter_rand_intr_event	4.220s	1028.740us	10	10	100.00
noise_filter_stress				10	10	100.00
	gpio_filter_stress	25.070s	1024.255us	10	10	100.00
regs_long_reads_and_writes				10	10	100.00
	gpio_random_long_reg_writes_reg_reads	7.220s	1975.803us	10	10	100.00
full_random				10	10	100.00
	gpio_full_random	1.580s	371.478us	10	10	100.00
stress_all				0	10	0.00
	gpio_stress_all	163.210s	14286.371us	0	10	0.00
alert_test				10	10	100.00
	gpio_alert_test	0.960s	12.760us	10	10	100.00
intr_test				10	10	100.00
	gpio_intr_test	0.970s	14.223us	10	10	100.00
tl_d_oob_addr_access				25	25	100.00
	gpio_tl_errors	4.060s	192.205us	25	25	100.00
tl_d_illegal_access				25	25	100.00
	gpio_tl_errors	4.060s	192.205us	25	25	100.00
tl_d_outstanding_access				12	12	100.00
	gpio_csr_rw	1.160s	62.031us	5	5	100.00
	gpio_same_csr_outstanding	1.500s	160.520us	5	5	100.00
	gpio_csr_aliasing	3.040s	161.209us	1	1	100.00
	gpio_csr_hw_reset	1.060s	67.060us	1	1	100.00
tl_d_partial_access				12	12	100.00
	gpio_csr_rw	1.160s	62.031us	5	5	100.00
	gpio_same_csr_outstanding	1.500s	160.520us	5	5	100.00
	gpio_csr_aliasing	3.040s	161.209us	1	1	100.00
	gpio_csr_hw_reset	1.060s	67.060us	1	1	100.00

V2S

28/30 passed

93.33 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
tl_intg_err				28	30	93.33
	gpio_tl_intg_err	3.560s	717.516us	23	25	92.00
	gpio_sec_cm	1.360s	715.297us	5	5	100.00
sec_cm_bus_integrity				23	25	92.00
	gpio_tl_intg_err	3.560s	717.516us	23	25	92.00

7/20 passed

35.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
straps_data				7	10	70.00
	gpio_rand_straps	0.910s	44.455us	7	10	70.00
stress_all_with_rand_reset				0	10	0.00
	gpio_stress_all_with_rand_reset	21.340s	3282.933us	0	10	0.00

unmapped

50/50 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
Unmapped				50	50	100.00
	gpio_inp_prd_cnt	0.940s	21.782us	50	50	100.00

Error Messages

	Test	seed	line	log context
UVM_ERROR (gpio_scoreboard.sv:248) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs [*])				13 test runs
	gpio_stress_all	29996053703720970240764544689495446357517720277379461541371666809548427582115	76	UVM_INFO @ 31441984 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	83567561038778240413187382717152107810616598420833368610302887383918440515579	182	UVM_INFO @ 8488640475 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	27859760704297877930185772278521352680721169106291939849333795388849323983255	673	UVM_INFO @ 12826829375 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_rand_straps	82495507832924871622550495871760788887911771337832712140697774268915710717086	75	UVM_INFO @ 1332305 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	64254701252457018963982521620177974005438391361991467779324892195813138581863	3980	UVM_INFO @ 14286371409 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	78860240479515753784332825939007388117046008324338607143416780179019517452624	319	UVM_INFO @ 2370731403 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_rand_straps	106443721612977416276104880427711876916431797941047281931172852801391053410065	75	UVM_INFO @ 11044195 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	115039908159287236228024297753441686189918353944320758714431716124923074010570	1759	UVM_INFO @ 3030936963 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	6178416137256984339369634107631776240799443606157394224772134267428282615290	989	UVM_INFO @ 3337607965 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_rand_straps	21303923047344851500280016658392813123557824597562560644972134032897821880483	75	UVM_INFO @ 2761725 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	21528563845269441049418255904828205232426420920887180670046321138489842142015	1373	UVM_INFO @ 23417708525 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	73960801313525889044063496732112898290749795319051246808530157359071503373727	79	UVM_INFO @ 280581463 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	41814132862069946293405181595813855861924805079300671434523925439972672000771	950	UVM_INFO @ 10878352410 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -*				5 test runs
	gpio_stress_all_with_rand_reset	71132512074304496426326720382063770224880102406699766662908398021491045915667	78	UVM_INFO @ 287503593 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	30878680087573595750113962642359958751766538954721426904590322308520008116973	461	UVM_INFO @ 616230465 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	39614908667655822585238292339935895566431378409254100438678961754059354551884	78	UVM_INFO @ 3310412 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	72624732667285298735754836161647911390031034039329734981992592416533731214747	353	UVM_INFO @ 3282932567 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	97582698948164902013610724392774391217772860434453598602146595087139920364377	383	UVM_INFO @ 233422556 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1220) [gpio_common_vseq] Check failed (vseq_done)				5 test runs
	gpio_stress_all_with_rand_reset	14818013824445797055991095045352877704981340974055668914981260344225780773154	125	UVM_INFO @ 745474508 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	66315114237833272302628414311130842565066503654052028314552721452188340411975	225	UVM_INFO @ 862897125 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	85623339687118604619260305286416222575627509955604150476866379290913648747981	170	UVM_INFO @ 1394503863 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	19413277213588090993882154490056975525563548928156813281678178501871967745091	80	UVM_INFO @ 1663319 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	2971757180668156441787830740906149889089180365505596069069911255819705950065	185	UVM_INFO @ 660483672 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_] Check failed obs == exp ( [] vs []) Regname: gpio_reg_block.inp_prd_cnt_ctrl_ reset value: *				1 test run
	gpio_tl_intg_err	56956210711342107115226751903841348644546613972286067743327934592900267937081	244	UVM_INFO @ 116697264 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_] Check failed obs == exp ( [] vs []) Regname: gpio_reg_block.inp_prd_cnt_val_.value_* reset value: *				1 test run
	gpio_tl_intg_err	64214796064802739017494518757216012761798409337644689888927377116891954207789	91	UVM_INFO @ 23653650 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---