Simulation Results: keymgr_dpe

 
24/07/2026 15:00:35 DVSim: v1.49.0 sha: ffebaba json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 66.31 %
  • code
  • 83.91 %
  • assert
  • 97.14 %
  • func
  • 17.88 %
  • block
  • 98.09 %
  • line
  • 98.74 %
  • branch
  • 93.62 %
  • toggle
  • 61.74 %
  • FSM
  • 81.54 %
Validation stages
V1
95.65%
V2
100.00%
V2S
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 9 10 90.00
keymgr_dpe_smoke 22.000s 1356.475us 9 10 90.00
csr_hw_reset 1 1 100.00
keymgr_dpe_csr_hw_reset 2.000s 24.930us 1 1 100.00
csr_rw 5 5 100.00
keymgr_dpe_csr_rw 2.000s 75.333us 5 5 100.00
csr_bit_bash 1 1 100.00
keymgr_dpe_csr_bit_bash 7.000s 1776.646us 1 1 100.00
csr_aliasing 1 1 100.00
keymgr_dpe_csr_aliasing 3.000s 141.027us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
keymgr_dpe_csr_mem_rw_with_rand_reset 2.000s 40.667us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
keymgr_dpe_csr_rw 2.000s 75.333us 5 5 100.00
keymgr_dpe_csr_aliasing 3.000s 141.027us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
intr_test 10 10 100.00
keymgr_dpe_intr_test 2.000s 10.946us 10 10 100.00
alert_test 10 10 100.00
keymgr_dpe_alert_test 2.000s 63.928us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
keymgr_dpe_tl_errors 4.000s 1816.817us 25 25 100.00
tl_d_illegal_access 25 25 100.00
keymgr_dpe_tl_errors 4.000s 1816.817us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
keymgr_dpe_csr_hw_reset 2.000s 24.930us 1 1 100.00
keymgr_dpe_csr_rw 2.000s 75.333us 5 5 100.00
keymgr_dpe_csr_aliasing 3.000s 141.027us 1 1 100.00
keymgr_dpe_same_csr_outstanding 3.000s 318.543us 5 5 100.00
tl_d_partial_access 12 12 100.00
keymgr_dpe_csr_hw_reset 2.000s 24.930us 1 1 100.00
keymgr_dpe_csr_rw 2.000s 75.333us 5 5 100.00
keymgr_dpe_csr_aliasing 3.000s 141.027us 1 1 100.00
keymgr_dpe_same_csr_outstanding 3.000s 318.543us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 30 30 100.00
keymgr_dpe_sec_cm 14.000s 2983.486us 5 5 100.00
keymgr_dpe_tl_intg_err 6.000s 244.810us 25 25 100.00
shadow_reg_update_error 20 20 100.00
keymgr_dpe_shadow_reg_errors 3.000s 73.237us 20 20 100.00
shadow_reg_read_clear_staged_value 20 20 100.00
keymgr_dpe_shadow_reg_errors 3.000s 73.237us 20 20 100.00
shadow_reg_storage_error 20 20 100.00
keymgr_dpe_shadow_reg_errors 3.000s 73.237us 20 20 100.00
shadowed_reset_glitch 20 20 100.00
keymgr_dpe_shadow_reg_errors 3.000s 73.237us 20 20 100.00
shadow_reg_update_error_with_csr_rw 20 20 100.00
keymgr_dpe_shadow_reg_errors_with_csr_rw 6.000s 1011.626us 20 20 100.00
prim_count_check 5 5 100.00
keymgr_dpe_sec_cm 14.000s 2983.486us 5 5 100.00
prim_fsm_check 5 5 100.00
keymgr_dpe_sec_cm 14.000s 2983.486us 5 5 100.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_scoreboard.sv:255) scoreboard [scoreboard] alert recov_operation_err has unexpected timeout error 1 test run
keymgr_dpe_smoke 6729634809462956877986901639060184063035874902296990163788752649276852392844 2451
UVM_INFO @ 3220242695 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---