Simulation Results: otp_ctrl

 
24/07/2026 15:00:35 DVSim: v1.49.0 sha: ffebaba json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 86.16 %
  • code
  • 80.83 %
  • assert
  • 94.89 %
  • func
  • 82.76 %
  • line
  • 88.38 %
  • branch
  • 86.43 %
  • cond
  • 88.49 %
  • toggle
  • 88.92 %
  • FSM
  • 51.91 %
Validation stages
V1
96.15%
V2
69.72%
V2S
70.45%
V3
10.89%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
otp_ctrl_wake_up 3.010s 839.813us 1 1 100.00
smoke 10 10 100.00
otp_ctrl_smoke 22.660s 11719.105us 10 10 100.00
csr_hw_reset 1 1 100.00
otp_ctrl_csr_hw_reset 4.490s 1695.396us 1 1 100.00
csr_rw 5 5 100.00
otp_ctrl_csr_rw 2.550s 744.717us 5 5 100.00
csr_bit_bash 1 1 100.00
otp_ctrl_csr_bit_bash 11.350s 2373.640us 1 1 100.00
csr_aliasing 1 1 100.00
otp_ctrl_csr_aliasing 5.030s 336.204us 1 1 100.00
csr_mem_rw_with_rand_reset 4 5 80.00
otp_ctrl_csr_mem_rw_with_rand_reset 3.830s 1991.556us 4 5 80.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
otp_ctrl_csr_rw 2.550s 744.717us 5 5 100.00
otp_ctrl_csr_aliasing 5.030s 336.204us 1 1 100.00
mem_walk 1 1 100.00
otp_ctrl_mem_walk 1.860s 114.941us 1 1 100.00
mem_partial_access 1 1 100.00
otp_ctrl_mem_partial_access 2.260s 620.802us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
dai_access_partition_walk 0 1 0.00
otp_ctrl_partition_walk 124.500s 13843.478us 0 1 0.00
init_fail 206 300 68.67
otp_ctrl_init_fail 8.590s 2935.140us 206 300 68.67
partition_check 18 60 30.00
otp_ctrl_background_chks 19.330s 1194.982us 3 10 30.00
otp_ctrl_check_fail 40.860s 2263.812us 15 50 30.00
regwen_during_otp_init 13 30 43.33
otp_ctrl_regwen 9.460s 4389.128us 13 30 43.33
partition_lock 12 30 40.00
otp_ctrl_dai_lock 50.720s 23344.141us 12 30 40.00
interface_key_check 0 10 0.00
otp_ctrl_parallel_key_req 21.110s 1145.275us 0 10 0.00
lc_interactions 185 210 88.10
otp_ctrl_parallel_lc_req 19.220s 10186.900us 6 10 60.00
otp_ctrl_parallel_lc_esc 57.750s 24833.134us 179 200 89.50
otp_dai_errors 25 25 100.00
otp_ctrl_dai_errs 117.350s 45428.167us 25 25 100.00
otp_macro_errors 3 10 30.00
otp_ctrl_macro_errs 37.120s 5430.409us 3 10 30.00
test_access 6 10 60.00
otp_ctrl_test_access 25.980s 3891.947us 6 10 60.00
stress_all 0 10 0.00
otp_ctrl_stress_all 157.830s 68849.920us 0 10 0.00
intr_test 10 10 100.00
otp_ctrl_intr_test 2.660s 698.816us 10 10 100.00
alert_test 10 10 100.00
otp_ctrl_alert_test 3.220s 251.627us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
otp_ctrl_tl_errors 12.160s 3404.477us 25 25 100.00
tl_d_illegal_access 25 25 100.00
otp_ctrl_tl_errors 12.160s 3404.477us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
otp_ctrl_csr_hw_reset 4.490s 1695.396us 1 1 100.00
otp_ctrl_csr_rw 2.550s 744.717us 5 5 100.00
otp_ctrl_csr_aliasing 5.030s 336.204us 1 1 100.00
otp_ctrl_same_csr_outstanding 3.670s 128.575us 5 5 100.00
tl_d_partial_access 12 12 100.00
otp_ctrl_csr_hw_reset 4.490s 1695.396us 1 1 100.00
otp_ctrl_csr_rw 2.550s 744.717us 5 5 100.00
otp_ctrl_csr_aliasing 5.030s 336.204us 1 1 100.00
otp_ctrl_same_csr_outstanding 3.670s 128.575us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 2 5 40.00
otp_ctrl_sec_cm 384.710s 70718.993us 2 5 40.00
tl_intg_err 27 30 90.00
otp_ctrl_sec_cm 384.710s 70718.993us 2 5 40.00
otp_ctrl_tl_intg_err 29.540s 5541.928us 25 25 100.00
prim_count_check 2 5 40.00
otp_ctrl_sec_cm 384.710s 70718.993us 2 5 40.00
prim_fsm_check 2 5 40.00
otp_ctrl_sec_cm 384.710s 70718.993us 2 5 40.00
sec_cm_bus_integrity 25 25 100.00
otp_ctrl_tl_intg_err 29.540s 5541.928us 25 25 100.00
sec_cm_secret_mem_scramble 10 10 100.00
otp_ctrl_smoke 22.660s 11719.105us 10 10 100.00
sec_cm_part_mem_digest 10 10 100.00
otp_ctrl_smoke 22.660s 11719.105us 10 10 100.00
sec_cm_dai_fsm_sparse 2 5 40.00
otp_ctrl_sec_cm 384.710s 70718.993us 2 5 40.00
sec_cm_kdi_fsm_sparse 2 5 40.00
otp_ctrl_sec_cm 384.710s 70718.993us 2 5 40.00
sec_cm_lci_fsm_sparse 2 5 40.00
otp_ctrl_sec_cm 384.710s 70718.993us 2 5 40.00
sec_cm_part_fsm_sparse 2 5 40.00
otp_ctrl_sec_cm 384.710s 70718.993us 2 5 40.00
sec_cm_scrmbl_fsm_sparse 2 5 40.00
otp_ctrl_sec_cm 384.710s 70718.993us 2 5 40.00
sec_cm_timer_fsm_sparse 2 5 40.00
otp_ctrl_sec_cm 384.710s 70718.993us 2 5 40.00
sec_cm_dai_ctr_redun 2 5 40.00
otp_ctrl_sec_cm 384.710s 70718.993us 2 5 40.00
sec_cm_kdi_seed_ctr_redun 2 5 40.00
otp_ctrl_sec_cm 384.710s 70718.993us 2 5 40.00
sec_cm_kdi_entropy_ctr_redun 2 5 40.00
otp_ctrl_sec_cm 384.710s 70718.993us 2 5 40.00
sec_cm_lci_ctr_redun 2 5 40.00
otp_ctrl_sec_cm 384.710s 70718.993us 2 5 40.00
sec_cm_part_ctr_redun 2 5 40.00
otp_ctrl_sec_cm 384.710s 70718.993us 2 5 40.00
sec_cm_scrmbl_ctr_redun 2 5 40.00
otp_ctrl_sec_cm 384.710s 70718.993us 2 5 40.00
sec_cm_timer_integ_ctr_redun 2 5 40.00
otp_ctrl_sec_cm 384.710s 70718.993us 2 5 40.00
sec_cm_timer_cnsty_ctr_redun 2 5 40.00
otp_ctrl_sec_cm 384.710s 70718.993us 2 5 40.00
sec_cm_timer_lfsr_redun 2 5 40.00
otp_ctrl_sec_cm 384.710s 70718.993us 2 5 40.00
sec_cm_dai_fsm_local_esc 181 205 88.29
otp_ctrl_parallel_lc_esc 57.750s 24833.134us 179 200 89.50
otp_ctrl_sec_cm 384.710s 70718.993us 2 5 40.00
sec_cm_lci_fsm_local_esc 179 200 89.50
otp_ctrl_parallel_lc_esc 57.750s 24833.134us 179 200 89.50
sec_cm_kdi_fsm_local_esc 179 200 89.50
otp_ctrl_parallel_lc_esc 57.750s 24833.134us 179 200 89.50
sec_cm_part_fsm_local_esc 182 210 86.67
otp_ctrl_parallel_lc_esc 57.750s 24833.134us 179 200 89.50
otp_ctrl_macro_errs 37.120s 5430.409us 3 10 30.00
sec_cm_scrmbl_fsm_local_esc 179 200 89.50
otp_ctrl_parallel_lc_esc 57.750s 24833.134us 179 200 89.50
sec_cm_timer_fsm_local_esc 181 205 88.29
otp_ctrl_parallel_lc_esc 57.750s 24833.134us 179 200 89.50
otp_ctrl_sec_cm 384.710s 70718.993us 2 5 40.00
sec_cm_dai_fsm_global_esc 181 205 88.29
otp_ctrl_parallel_lc_esc 57.750s 24833.134us 179 200 89.50
otp_ctrl_sec_cm 384.710s 70718.993us 2 5 40.00
sec_cm_lci_fsm_global_esc 179 200 89.50
otp_ctrl_parallel_lc_esc 57.750s 24833.134us 179 200 89.50
sec_cm_kdi_fsm_global_esc 179 200 89.50
otp_ctrl_parallel_lc_esc 57.750s 24833.134us 179 200 89.50
sec_cm_part_fsm_global_esc 182 210 86.67
otp_ctrl_parallel_lc_esc 57.750s 24833.134us 179 200 89.50
otp_ctrl_macro_errs 37.120s 5430.409us 3 10 30.00
sec_cm_scrmbl_fsm_global_esc 179 200 89.50
otp_ctrl_parallel_lc_esc 57.750s 24833.134us 179 200 89.50
sec_cm_timer_fsm_global_esc 181 205 88.29
otp_ctrl_parallel_lc_esc 57.750s 24833.134us 179 200 89.50
otp_ctrl_sec_cm 384.710s 70718.993us 2 5 40.00
sec_cm_part_data_reg_integrity 206 300 68.67
otp_ctrl_init_fail 8.590s 2935.140us 206 300 68.67
sec_cm_part_data_reg_bkgn_chk 15 50 30.00
otp_ctrl_check_fail 40.860s 2263.812us 15 50 30.00
sec_cm_part_mem_regren 12 30 40.00
otp_ctrl_dai_lock 50.720s 23344.141us 12 30 40.00
sec_cm_part_mem_sw_unreadable 12 30 40.00
otp_ctrl_dai_lock 50.720s 23344.141us 12 30 40.00
sec_cm_part_mem_sw_unwritable 12 30 40.00
otp_ctrl_dai_lock 50.720s 23344.141us 12 30 40.00
sec_cm_lc_part_mem_sw_noaccess 12 30 40.00
otp_ctrl_dai_lock 50.720s 23344.141us 12 30 40.00
sec_cm_access_ctrl_mubi 12 30 40.00
otp_ctrl_dai_lock 50.720s 23344.141us 12 30 40.00
sec_cm_token_valid_ctrl_mubi 10 10 100.00
otp_ctrl_smoke 22.660s 11719.105us 10 10 100.00
sec_cm_lc_ctrl_intersig_mubi 12 30 40.00
otp_ctrl_dai_lock 50.720s 23344.141us 12 30 40.00
sec_cm_test_bus_lc_gated 10 10 100.00
otp_ctrl_smoke 22.660s 11719.105us 10 10 100.00
sec_cm_test_tl_lc_gate_fsm_sparse 2 5 40.00
otp_ctrl_sec_cm 384.710s 70718.993us 2 5 40.00
sec_cm_direct_access_config_regwen 13 30 43.33
otp_ctrl_regwen 9.460s 4389.128us 13 30 43.33
sec_cm_check_trigger_config_regwen 10 10 100.00
otp_ctrl_smoke 22.660s 11719.105us 10 10 100.00
sec_cm_check_config_regwen 10 10 100.00
otp_ctrl_smoke 22.660s 11719.105us 10 10 100.00
sec_cm_macro_mem_integrity 3 10 30.00
otp_ctrl_macro_errs 37.120s 5430.409us 3 10 30.00
Testpoint Test Max Runtime Sim Time Pass Total %
otp_ctrl_low_freq_read 0 1 0.00
otp_ctrl_low_freq_read 77.880s 26643.777us 0 1 0.00
stress_all_with_rand_reset 11 100 11.00
otp_ctrl_stress_all_with_rand_reset 114.950s 13058.191us 11 100 11.00

Error Messages

   Test seed line log context
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: * 109 test runs
otp_ctrl_regwen 82751536366605252272763689526509710512727936004990938938071173944112192242611 1250
UVM_INFO @ 192935350 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 99934360017095609209275196059921340652311496198787017645934088114946772231343 719
UVM_INFO @ 58870199 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 52898668969564809507752792878322497850736011941759872949742730186489664218422 5838
UVM_INFO @ 893658467 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 95907441565566389046627961416790632584384534398108602942726113613867140996832 835
UVM_INFO @ 47117492 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 63453617659627830569750585910212253542941262125718804290164531368501161837033 4462
UVM_INFO @ 125946930 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 99691719599399828085795307255957705777963560597155215292863447256238027255167 1457
UVM_INFO @ 222964849 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 95174551389011532867279577410103529372453085583188222888629465966278229804538 584
UVM_INFO @ 69379028 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 64849988121796764790208803275412799010613582421592221787890348452167235422126 382
UVM_INFO @ 73671939 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 98846923299926369367483631473694976539337250993828062668355038231869860978933 1488
UVM_INFO @ 249844895 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 38614484060957056551020513375179031744146389647995651612508785942126365081319 99
UVM_INFO @ 53395553 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 1784319936910849881736883339655669525072944822592721696662101367341236295619 1140
UVM_INFO @ 124726137 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 57863481358746886432132149236331331320996448542557009803940141858848367635260 654
UVM_INFO @ 119424567 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 110991581012109387913370707279687278101136923541237548175390047443526765587083 3550
UVM_INFO @ 87366962 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 112668602727277524468277983051415992093220537862990598872780670442541370328829 1352
UVM_INFO @ 77102636 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 69795630909838920144109612771508162341806367451310878532604655361872823746245 567
UVM_INFO @ 641497826 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 76237329323561723916780976647866598401624398272528284087968680057800641621807 2252
UVM_INFO @ 338829180 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 11895745288575139390934371051855312856425016115079335287718783935904650325203 1275
UVM_INFO @ 52538091 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 6919367866682859982808364916733588486644469760407888744770904088611612422751 1816
UVM_INFO @ 172594702 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 87445319062416622880862392646351587339801303164183339381955238894973569555308 1101
UVM_INFO @ 237662685 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 109730416890049191454173532509205047439441317416825781985415839870240288652501 1030
UVM_INFO @ 90753146 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 52884368008501727389170960029653888952037750339525942546141300932076774994570 2422
UVM_INFO @ 139951107 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 53595830649340254359012874877324496864270906400251965831899261220371296451860 1731
UVM_INFO @ 251791281 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 43300469265348184296594055738614330441077376083773295982132264003664410649734 139
UVM_INFO @ 42341599 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 73267053939228796767444432862614939760186160478038253200323720220192277664631 776
UVM_INFO @ 70896507 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 71697787934719846494876531602203759772603064315164806834570184016199911483810 7150
UVM_INFO @ 3808558465 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 1946973691433081577175969048338685579392365670308545352761906080241607618912 793
UVM_INFO @ 683401565 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 96228159147700112901858587597055413357643309330979563883694079584597813942091 267
UVM_INFO @ 70687970 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 42647067481948927681924967654975554598894783573461716554164633891181841117226 7620
UVM_INFO @ 4389128028 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 99085145844925558364329196544084540475752136177293324885473612308295586178173 665
UVM_INFO @ 41177019 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 61427146575572418463091113400186229300251224763376466422269778106256373641101 1057
UVM_INFO @ 241436416 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 20610355503441871192259896151969561328635915745627399987703982976187460235480 365
UVM_INFO @ 140068604 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 112903608415817573872285883557032440040979756644962284804108828639910981620479 183
UVM_INFO @ 151226729 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 37473278916840041191922899213721639440538405249538371146309095265901149154365 709
UVM_INFO @ 170987115 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 81643816945863203090385737392152011896052722774918021435148990003868480758305 435
UVM_INFO @ 38456056 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 102886276543214301992092427128500778882082188171472549687659776404580205643955 903
UVM_INFO @ 105002745 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 3550060173871724403023183650416081427584420188712912301623490999968025867946 451
UVM_INFO @ 850694688 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 42429949535059873512252441161302768211179996003922618481908378738068895803098 99
UVM_INFO @ 518624205 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 46391992536609735030164403119224552474883475680067201498978594044297257974501 99
UVM_INFO @ 49747604 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 56742747831325977362531615244744762711189545869527085838902671475068806021358 2197
UVM_INFO @ 273444765 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 52220651801995915446851221710824392215286901043554373250248850102851127673829 1413
UVM_INFO @ 187100029 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 92224452148879491663267620722949370335874049977596636214316477085976828299047 565
UVM_INFO @ 233259542 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 63366373444387391360282096346227071527526621934252213965065594713032954776193 775
UVM_INFO @ 75204565 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 37888058404728773586664175772266738914015155582998112728733731407889835965368 327
UVM_INFO @ 63454796 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 107097001442621653436980807524360296201199630616000378333215741302801297965301 633
UVM_INFO @ 149567003 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 51323113897390644874363930067953872320611155180767858995568093366231551261176 1341
UVM_INFO @ 66663896 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 25272271750174508754565034220837719695658036338905302958356674645318372319329 2275
UVM_INFO @ 274624004 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 59369008612956547537330378024852442710350552112508666887737424974585070310688 281
UVM_INFO @ 36857579 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 45274709518651423666122054085205264489604586145333026397842275270997910397683 619
UVM_INFO @ 83675186 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 92202700984533677834484962669733013608341311624056065904252569325547483537328 225
UVM_INFO @ 115154041 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 20537968315845564751546645067449551518724880823963336725694877625831759784049 1999
UVM_INFO @ 123410588 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 76301397155438513687478688039402597293981353639114427418837343714843313515332 367
UVM_INFO @ 40548502 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 19980739606157628865839983556527485875737674163252679925529929690082714154565 877
UVM_INFO @ 720468492 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 109953347128508048974396743933637494273780843178762066479439811850443662885929 1119
UVM_INFO @ 49214014 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 43558636227793750270951024531447680487206568365684966465368797441826602163820 181
UVM_INFO @ 147763215 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 3595276328895000674257510348710305074262168826351406123463964798263133429690 859
UVM_INFO @ 54521926 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 24700508248133233772062646531778347214452101685122256778266848414944495662467 225
UVM_INFO @ 122781760 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 83220798844845416649245352326504514694969882612143151446067859408321120702559 1597
UVM_INFO @ 126877725 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 103917682827252148857675510857138406061310668790630498269011691040162939985346 1323
UVM_INFO @ 64766542 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 110149016009001279718460481506535201388399341023821841235774451303075607842451 99
UVM_INFO @ 55083586 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 62544596641829575017987799651897459444321407791503482475943597125552624186413 677
UVM_INFO @ 51616979 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 34679774236765622602692476890509728474533895919035985785097195020687000496178 1083
UVM_INFO @ 147584882 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 20747986578442654677302895238538080435375622743480961093399384272346304673099 1909
UVM_INFO @ 85115967 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 76402512339842057369388014939634889950384229389341017816092442480068059276512 1659
UVM_INFO @ 130264142 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 88887288878938215640831052307199665477737762577555793972000189794548415332938 99
UVM_INFO @ 68081522 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 107990340792006028622089862330922511730998768823949804600778538696404359490499 99
UVM_INFO @ 938439452 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 20428299755232402162515737564940074715683541264078470810576031909319420240959 1639
UVM_INFO @ 142418247 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 30930146546563214573033577786117261681295597500206389970428518815575300565792 1883
UVM_INFO @ 123341538 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 17222681627577300008511593172838092562287936911287331664306266029249718277571 1025
UVM_INFO @ 135953118 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 75481315875819847494633235287368928138530098953096916562874231735703895111022 309
UVM_INFO @ 84102279 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 97060160675441342985866326366148329282038966751468765593609331573833541981069 1065
UVM_INFO @ 46827621 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 55004987242051365587584354286587934174550420240429549536223701653470224181349 99
UVM_INFO @ 104120317 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 95476526978036065363858749602793805477347614959804373263690198427680110957415 99
UVM_INFO @ 60744443 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 103981119846309875889810281209910275748172398299173215346671375016074816067806 241
UVM_INFO @ 548736727 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 22558112060420797081356756706189712771332404715096563348121794379597022906875 1667
UVM_INFO @ 289842544 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 98839854941449361805782405281444627120210808084234220135972021529786842747868 551
UVM_INFO @ 951854101 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 42034911244854453177328888959902407320933247497568859489870035031107677363798 351
UVM_INFO @ 675587251 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 53207815478498917449333232731666763703592456375456016557407856626561168234133 559
UVM_INFO @ 164197381 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 69950778115075603559363991969521992548907040432111518144118888000333206304386 889
UVM_INFO @ 142543377 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 23975839283580184857745824489777173415954005470900957212378157800078822998160 225
UVM_INFO @ 35234295 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 52238985892662851588723450601772252824516463068209885178743034049883612262569 575
UVM_INFO @ 254998744 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 4781500714066681312552225254245330986222956976023388096968128503839225709975 615
UVM_INFO @ 239205901 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 64144169712498158518718701254422784184882289011734930029234950529669452886133 741
UVM_INFO @ 263973861 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 50666840447385885346284332426141977577239793064832890292050654298685461712226 775
UVM_INFO @ 43964009 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 77842745859140976350832812290571430352558144452770461267873370150459665325395 465
UVM_INFO @ 38543367 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 92944533111436478464797905000994360331390391964472733608193120049415787123047 1565
UVM_INFO @ 1248924604 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 111373780837364503397151812813939476200216568236621323405551657047886164223602 987
UVM_INFO @ 60302603 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 32041563142164868982655401212950299741296808439615258132860851879643139931908 141
UVM_INFO @ 510918270 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 85943490002944785230281130315875795969545131484081809715815924673519159555545 1639
UVM_INFO @ 119530014 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 77912847455825648943791862616443539534637548785551189153226521679901938367818 1879
UVM_INFO @ 992176623 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 38393269671550079008420746229679489909103879430884521047641124229846100319356 2065
UVM_INFO @ 151304729 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 38480399727211047589247970367321917573096532183443690055254464229840715259207 349
UVM_INFO @ 40686425 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 79930326619619104023958248342667743260551397204137370569441050805572832798250 1077
UVM_INFO @ 779639554 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 44572751241314125075304597732335328093079915218150238688053999528421912378572 99
UVM_INFO @ 586212683 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 59052358585644708908106334701410386520063335162014168323454487892047994595583 937
UVM_INFO @ 818340025 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 3564569182930492570893598858237724263358204131306432431737130989809023814065 1179
UVM_INFO @ 798727997 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 5532143105282477658141466023574703338603634081955887591063009383052021321082 99
UVM_INFO @ 34892586 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 53859679190967292212014685508567148478413698084017414261990318446835351396082 1173
UVM_INFO @ 195723282 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 108888869294122536662802085409300349692783199212376885767045082448664588711930 1913
UVM_INFO @ 62685974 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 22330798600232743895001209763068595382548747360697055991238181364381140363127 99
UVM_INFO @ 41390565 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 69447731023325579095783064155893377352420540134950306117148908617599179456276 1269
UVM_INFO @ 133624417 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 31247899007119492496894001203205632477282879827970807122477465392265455267134 491
UVM_INFO @ 53283214 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 95794090665728933667598655917435537203022921638610284094412430827051471126826 199
UVM_INFO @ 69794376 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 87832590326210938989310808987038123561054848789393716300437433205610136897953 393
UVM_INFO @ 36066117 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 49083185098508932395069230947088298835579144297288637675265623311761808216678 933
UVM_INFO @ 99534363 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 29035302039312594693539559836991031473301408850119986605468848651496202027503 365
UVM_INFO @ 573057002 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 100406593065182084308599536088612289056249361795634972406842882114976623565242 309
UVM_INFO @ 95362132 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 61107053793558549810231971849850980657567451460425219015995188719186642569247 659
UVM_INFO @ 52143839 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 82511372554234892521242989785979649170454564962462138453377889453466550364178 1195
UVM_INFO @ 100348116 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 63392776560591604913954946722246027637329630946109919826610870605113523255126 407
UVM_INFO @ 49419777 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1326) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.err_code_* 81 test runs
otp_ctrl_dai_lock 38732798561525980527859386450915634189131655018995079918901791873445338209269 2593
UVM_INFO @ 582792190 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 41024926763659885792490527727442618937842110364409590150721958887607850649522 3974
UVM_INFO @ 160497500 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 9901656186212997228430457995899274637690082617303264781408843212137104319693 4123
UVM_INFO @ 5166385130 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 74732384366357873067504943445008994367591541760735063367411711532779479541725 8385
UVM_INFO @ 333988345 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 42271795531664844629824256436178794660955921818820744924181627774771785484881 8127
UVM_INFO @ 3349760271 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 73415758978506808798100722543877933668411350339619848427560782311635147725368 216
UVM_INFO @ 58889181 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 16746624821979951768089260899283201443047541513039159281815443807524884256745 1402
UVM_INFO @ 147971264 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 84672196428296648267147816309951483186602535975326794247920168653666829231356 338
UVM_INFO @ 54253379 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 40711611741352443425102822622051372312009619343887297895957682896332926132443 4230
UVM_INFO @ 449000752 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 16866894312838799959411693191668973634293498991795183432507931147978654169769 1708
UVM_INFO @ 1269416088 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 71614823662633880094053556196318708090167252730963031820376814255920130268210 474
UVM_INFO @ 61441246 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 32865899946979930985807706535999818822733575993296043192372822702483291730168 8513
UVM_INFO @ 454903065 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 97096311211417170311795353287575258164754880113700001982081986651064595403447 2288
UVM_INFO @ 430595132 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 101681371149121508853296864203739909418670327474672928955991259209400280844005 3228
UVM_INFO @ 485514060 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 91742417496706669323030116575304693327092849658627045027666075563498029563658 2012
UVM_INFO @ 189578215 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 29671082371904588597993989474313511204889486963085052783142898368540167441943 2324
UVM_INFO @ 119738889 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 105445066798210623531788690916248953050632306020206317864325315591308615080481 1186
UVM_INFO @ 927175993 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 82044120050018644862945337358973566997722132972830984369576240764916064771270 1097
UVM_INFO @ 157553726 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 40241436061324500159512572650404405539644493007450138642151844783928132630302 5845
UVM_INFO @ 1244159975 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 112628997457950076714566329876549680701941849184363502168319818347657994537142 3284
UVM_INFO @ 157888736 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 7178053216158273119965384299148163669931451746665856901863339375039853537635 4047
UVM_INFO @ 1427364760 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 80401897757022589423423087281673959280333992985333754837013648557457093222455 1008
UVM_INFO @ 15175076163 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 36117493192957129471112882596024746935722837773297401687197940705358461672457 1722
UVM_INFO @ 280097190 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 42662794363381496606396042600292254893592867254898643661220427612806433853911 2945
UVM_INFO @ 1030220141 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 54939839266732397663223737666918886329802579930975978162475433796636080526372 2812
UVM_INFO @ 657173740 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 52680040569400603258854190114869071850498809046937445589754515802521414153996 3140
UVM_INFO @ 4251969838 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 50089000550488941201337560207250834796486261108885504921408972136085005780735 4087
UVM_INFO @ 1294270075 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 67751717205012425440344680802807167577276562343144931873621472934015916582362 690
UVM_INFO @ 360194373 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 20859890762494675867292312238951943412919725200476891946279419843533107966360 16535
UVM_INFO @ 464919135 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 111440447884980116600059945918225796098594596919798259620928468470989720748134 13678
UVM_INFO @ 2434453880 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 56240857748220256884804387959271851407935573534044039507043972932383251198910 1274
UVM_INFO @ 239797166 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 94963662947999976092607880361235163763032116267441374093635695053318006085794 3485
UVM_INFO @ 2930501869 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 30179262544884637042840365674739989197721598276480879078747797819505979116346 1036
UVM_INFO @ 93115931 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 46626967044732485613388647621803861555434601407262727635496407968554755757314 4709
UVM_INFO @ 794531330 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 32755158637498843150308864138949233516090635463514955846493308802809906080130 825
UVM_INFO @ 596054404 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 9813390811623168447507766436338170691067057505196881223339174197660672574676 3996
UVM_INFO @ 4417271646 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 106646976491680007894695534263512577230271873778184572652333368710139634349236 2584
UVM_INFO @ 70439277 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 95052927660527563903988993015521628521803564999592430377441406285174375629118 1042
UVM_INFO @ 1080875661 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 86006228501642071083601317632173912016347898703681082732555223311230855312983 9242
UVM_INFO @ 13219354410 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 63699493425853112831773910833800704743152945912464829535073309417539822859934 53681
UVM_INFO @ 2428498999 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 2132010211676470981099344223675296508116552074481375553890190641619876207477 1472
UVM_INFO @ 93451088 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 36391576629299582020825014443573745360299694167418204040885101968518700474199 3240
UVM_INFO @ 575666609 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 44958415341456171391950830774132360237675765480896731517170205713473317501596 2705
UVM_INFO @ 477255485 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 24180709065210779137132308719258193265036448402284461681750733558160444159376 20067
UVM_INFO @ 31466856828 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 23399765964527017182531193183832157096502037439868143135732243819176548220681 6863
UVM_INFO @ 9706462783 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 114426863459336701600278995235735638837250303712817314923896272087980794612359 1946
UVM_INFO @ 69337772 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 72610196000269176420940567592680345720723205356219193348619358168457979509560 1080
UVM_INFO @ 108894793 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 95697731270534215909733459589801274777293840221194843816618011398861027820088 178
UVM_INFO @ 395924616 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 54682339076959753545047272338960106540404790326566778871610923356924396794211 6769
UVM_INFO @ 16918987712 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 114578299860263336351689451421601253209504310391287928576037445582840449961326 4731
UVM_INFO @ 634298903 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 76466439511196730373101697961270169228213462066216840472558514736849661585723 1312
UVM_INFO @ 437056044 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 90282440501447514141146308558313796093953409118914708492757206165853230606357 2412
UVM_INFO @ 1096222694 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 96004547724733809394152566755194733988820620643253675386588016174160162185070 15906
UVM_INFO @ 2209929170 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 12958740376066059687100347628532982667431163203225771044557827984010403826751 19191
UVM_INFO @ 1037111914 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 17586123703257691447771885604195037414823219073456416192134677793328352850952 2030
UVM_INFO @ 259156286 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 91219997625646529314251870430573033631924995323521911969150060963961590667605 1520
UVM_INFO @ 283148778 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 105506830053551024809943082352681073037463158988744076657048664279945636873096 8508
UVM_INFO @ 3795579897 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 25227298220779276116167934024694716458723342955631978065036143031369231180031 22533
UVM_INFO @ 13854714545 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 29002896825981071609672423532898339310223686643744521829689917148147801337991 2569
UVM_INFO @ 5248597666 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 55278831543475233683009515140556626195899231944266430069286833621283093864883 2586
UVM_INFO @ 317899914 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 24428050416907011038969910827423334837176955739976001345216103463294446657964 1094
UVM_INFO @ 65261499 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 92265790575262437124462934041662275106045153576307553654285167704961728460088 886
UVM_INFO @ 411901249 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 105531564344642452130283951575022758183097164418231575778159029082801075979388 1022
UVM_INFO @ 77981333 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 24023934072406529260087091062565815514215932518106281723083267613322186184487 10844
UVM_INFO @ 5732253822 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 32854954105325095343884227802094809144364423327571309426041764377315652414180 526
UVM_INFO @ 255151556 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 50741853113913915704978112937278418858357433222510822068441587822872299374451 1856
UVM_INFO @ 64495371 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 32583762757018626589113378606165388374580282598280118052493135116313907511149 12280
UVM_INFO @ 6424750218 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 19212037359257907474356487157308914725164421368758221553727523999079156982236 3982
UVM_INFO @ 502397110 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 39542201816576458557121096735588744153660305430135903766957370559409833458328 2536
UVM_INFO @ 206017020 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 56335583292039073748657795489979113312311979731137249956121158178505309573213 3666
UVM_INFO @ 8646484557 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 82350059438790833868745733347264902615065622691909565029276407965272569523562 4417
UVM_INFO @ 2802241346 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 8692782025523905038278671195913759013684774743086911785722325617624095242675 2848
UVM_INFO @ 97775145 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 27279377533813663989633382466691101302449562184459834440071975227926168430439 1154
UVM_INFO @ 782208109 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 105887884448411161686071773083332932142695397701130941853316496860850310774874 1758
UVM_INFO @ 290474321 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 38828491692513530774735431752216512551371732639189104532688595688554601046206 1398
UVM_INFO @ 51672965 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 96883088496057349654085439428361837716521165074659278472742229416359019368629 1384
UVM_INFO @ 106627874 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 79552534848989566675435496330360237067195196363826280558020581625999203202119 1272
UVM_INFO @ 463577595 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 67558653682434650814235234618285182236080221152918905881134459606984258139653 682
UVM_INFO @ 186065918 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 55880660844506142737728959923597103514566858151288100317875842005556968634484 3110
UVM_INFO @ 188606677 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 110735548480792802962000377106335093871838478840597129130616618109688363612505 1378
UVM_INFO @ 504972898 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 40879174690666386653666048504382443034329183092748914075469184084524650503140 210
UVM_INFO @ 77916383 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1326) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.intr_state 42 test runs
otp_ctrl_background_chks 2357757974238039995217706740037104761235550609573394508655779765479495622630 18017
UVM_INFO @ 1178636342 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 49220207988261523906367253814034488420694228459475813135047772210131146123447 14639
UVM_INFO @ 1145274676 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 74837588267234015522837797921909112181304671196505543846550037096159470514412 7390
UVM_INFO @ 712377999 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 53300098493774382624629980182200115423481977996416933944978210955123437437900 5207
UVM_INFO @ 3013193334 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 16877137436240012277903539411354185528807837308215955699593777088829770477185 9682
UVM_INFO @ 22160630450 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 52500211010417028877897513486972492988118887731677428427007962683174802190225 9209
UVM_INFO @ 11981647829 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 105113265837819998829058758488626457631628023891266275273541124338875428870549 13592
UVM_INFO @ 1194981528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 13110415522255785552910164160425125492858931932602156784145059271771853606780 5135
UVM_INFO @ 1863208675 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 112301284824694226199639289741905543811003387965591438253034501431776468052335 7169
UVM_INFO @ 890216452 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 24910433230398973754254901614429089663083734907823161898021029841679508801701 5282
UVM_INFO @ 16042423969 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 93464216826307829835516852269983445278779686515797485296163392794304427515492 22529
UVM_INFO @ 12095235279 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 63679067415496407283034545096599403155561260345934904685347739314334904239069 1352
UVM_INFO @ 4389890185 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 71771946647001000347161311249283269592498727980558241780163996107335176193671 16992
UVM_INFO @ 5403226938 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 31018498917077748498320126229236148986651579105865901795294836766493872423941 5343
UVM_INFO @ 170437861 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 113741213638398622284562260811583313107773574734490914224786550633774987284614 8387
UVM_INFO @ 930559699 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 68411372475173933395658542437038398874416615123010718349400807101215274510475 17306
UVM_INFO @ 1390001950 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 35448705727388904230254200615259257672312002282005521352655918919141137655028 6843
UVM_INFO @ 19773030366 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 101169564602116827979013968993757190885859788805104497389453106773913494797338 4826
UVM_INFO @ 2569158765 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 42306933668649613697517634102438795094320158698047688291506999320530073913457 10402
UVM_INFO @ 6000504927 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 102456583844239361596088338959462318155310658713299931289889219674678026622461 7727
UVM_INFO @ 246488607 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 38098510958563340779400063938721022224383607037506528459978877104753856824357 7463
UVM_INFO @ 17007298242 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 4134492729648174513340979364711765036940435995771656177413758092763048035451 4502
UVM_INFO @ 3141597644 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 76506495343263631738290247460683886700605826176514813928784788518269960718309 308
UVM_INFO @ 48943656 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 7820298683358378057885728204855665294176777890185774665798249069271749135113 4224
UVM_INFO @ 183782764 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 89127891847921520371581485582603342215471208811223649552786584514884876299332 614
UVM_INFO @ 3759243523 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 55535732149225320405664970694137431516156376582813121809139892516589747203093 4858
UVM_INFO @ 10637990816 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 106566698911563465254331357531834658006127362600851024492539920509306884230653 4077
UVM_INFO @ 1388912331 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 1461656162261941173532504704135171254116203912152611142991585101765055962211 15916
UVM_INFO @ 6597707287 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 311376916305301789306103641085898306796850192217216848355722722609031345692 168
UVM_INFO @ 38058095 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 2109512173186159540727557556337718154706552156632057199529698503094072028594 943
UVM_INFO @ 2447734711 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 41618086014543874486273537500343722457299811020980959660595772915483381711473 9738
UVM_INFO @ 34062815609 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 17136723255396761126162800490068968938222381148841990062204742161076439954717 1318
UVM_INFO @ 1873048227 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 81409737601855703381081338456876660461380150904016386921565487634770486383110 172
UVM_INFO @ 42759400 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 52282379778616812502151876101980280579506601975144599979391127710060468848783 16630
UVM_INFO @ 5448373425 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 97562518766657123509622386775659948279835160079702124017400709974328231484509 5616
UVM_INFO @ 4681744822 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 49368226149600604441866973109032623021389497236475262077810123119445393221359 4654
UVM_INFO @ 10478657351 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 30307434709499149039473753769939425775624252042824966697195699385401040429375 14648
UVM_INFO @ 4257881743 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 31529216741657087241533331139151575136852937195920397158789210737712595675370 5404
UVM_INFO @ 2871464132 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 41767711650063904450500362508077707613724614949990524823886128053752246407144 521
UVM_INFO @ 637421594 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 9505624160362171709709724209010959575490876387685952282111602183288633701223 7700
UVM_INFO @ 1016650716 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 28085644951640191335406130665607084594940783098014646679676483365429322809666 334
UVM_INFO @ 9502908317 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 56711630711602618823573036554009638080699468546213219443047796930191197387492 4388
UVM_INFO @ 1473611741 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1326) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_* 33 test runs
otp_ctrl_check_fail 61816732160581869615964227570179360580427326475259048325110532611307251460752 696
UVM_INFO @ 457680002 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 107126626439107594846208989332909842948584018494000171602378484117181571446107 8729
UVM_INFO @ 4846257612 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 1925636924222658766481345389365136058210513274363435226075035164697729296633 347
UVM_INFO @ 2260600961 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 89282966986113376520206737526710939071612769977324497739300930358392893373289 7278
UVM_INFO @ 1124339644 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 75360421996056845177174375988620552183530458218792666026475441348345199907961 14551
UVM_INFO @ 3465734457 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 46574097492566942399266777922646971110706050195645249177771533612760887055981 20019
UVM_INFO @ 5430408605 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 95606716358541107333802096901686800368341815648716563796480507274152587687185 8332
UVM_INFO @ 1360981045 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 22898352989321708853509164827175804911412122347913516623498998847527798226085 6809
UVM_INFO @ 10858136444 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 35394420386973129464747853013299371653492605062128709317899327394711344021927 7306
UVM_INFO @ 2781450424 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 107907989378635985144485138948672437121359015923791702788069720283366635260688 1472
UVM_INFO @ 84018079 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 61914192196120491791688611652695735910309372079195179582005240561347597092577 24253
UVM_INFO @ 780221125 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 38485430366921251868696132200982541002829458097035059855825665783984994829745 482
UVM_INFO @ 58940748 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 37245814465693901945097088834404328974922141212692037048585113513754533808150 9318
UVM_INFO @ 444306157 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 93165644970603515780821045655626758340673791479668932591896754802334539268107 1731
UVM_INFO @ 888064439 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 59455540380809001276046858015733892465272754395836022214277882102285064735224 1104
UVM_INFO @ 411038308 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 73393079700794881543250748471803171971941406227185853331490570322405686413819 4883
UVM_INFO @ 299714708 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 29025037392238469168785435465831616273602576281413886637642610807767456826549 1586
UVM_INFO @ 211291746 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 67517041944558724102134620297650435521867742949008009749509762085552933136614 10479
UVM_INFO @ 2333025448 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 39191495713848404978973884148329299577171699851204974597967674608122637528248 15482
UVM_INFO @ 4723384261 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 48714076609540648407856651066902971002095725152580450133065683509454966503726 2764
UVM_INFO @ 165649825 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 75650582675468851079070873243076535770430669479895468897060343340354319076139 8644
UVM_INFO @ 3084479418 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 95210711055028301643064570098174000272482238055499739489845348872701912438768 8198
UVM_INFO @ 755302607 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 6361554379662975839722172502619226053097389041144762230028214831057901154923 3255
UVM_INFO @ 4894675856 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 63247963278117480622267036071811910377425274136190228510875422936840735510459 2793
UVM_INFO @ 21580497576 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 15791032477191725947212712737236000558006744541454819808269034096653500405661 9704
UVM_INFO @ 1283980132 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 38827162836218781197125258158129298060307653495341780139203465574653352020437 986
UVM_INFO @ 407195572 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 65949752091790444544914718537928135108955789636215149419459223524602246627369 51175
UVM_INFO @ 2589936669 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 8590483598812024436365935357961580635346813116147986077967168644658030757223 1666
UVM_INFO @ 114497527 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 95233325123690971868850470208929633447056116941103690055613555979886077920923 360
UVM_INFO @ 84878296 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 90374145087002818196389064102089501717664512255397917885623856303117945877360 4047
UVM_INFO @ 899941991 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 112959804998817835464636961441545796758313359958175350653389776129943977330906 7220
UVM_INFO @ 2202388030 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 25881676522058292028411358455831713799691436105923225867972395837361971074046 6141
UVM_INFO @ 500725255 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 2302561622794109637555072944262782594224202727628814992187723688998719942170 7654
UVM_INFO @ 3858756393 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:2219) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) d_data mismatch when d_error = * 15 test runs
otp_ctrl_stress_all_with_rand_reset 114625771018129746219735377217589995077501054380234798253203323630394054190776 91
UVM_INFO @ 99894392 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 113113452030060325092232916372899291977798482653861862637622956223347671850546 10715
UVM_INFO @ 389145777 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 63546764662024178804116613595394669064851164111740129526386088277580061398445 92
UVM_INFO @ 501036280 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 100693671929655588837174080073563861819742706812506189632034194028886496553705 74231
UVM_INFO @ 5778831719 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 25237853754817839703946010140276450437213772421107632306727312639379156904887 8002
UVM_INFO @ 6068973172 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 88537996673279312755309417678780325279917208339149597651963175273945359715337 1031
UVM_INFO @ 175426556 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 73400957950058520314389044802876132744520045970791952343213475869948750117215 12037
UVM_INFO @ 1456398199 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 106243214991424353944077189639481126483324657785857177887129845715133918063835 91
UVM_INFO @ 61641211 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 111553788485520392252101054878338314705203560009993173630324383114896554007741 8776
UVM_INFO @ 22502331438 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 40010395666622934824553830265428728007761841639162688600279129000597572041689 27736
UVM_INFO @ 4821717678 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 7775179177733684855002051111811623876637820406431999765286392324145974879080 4225
UVM_INFO @ 1046323629 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 41246887739885088512741191045222770000190113569633268519233715126504664707811 91
UVM_INFO @ 64497952 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 59349600756925974823979409892127441469124224469633089747688824355890863499273 9197
UVM_INFO @ 4020742891 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 61207645007789919233565682883324160913058574453164876225666904292041973112017 10460
UVM_INFO @ 3782676245 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 16276338194903440224463774455893647619781235795258856338140420157938688222191 91
UVM_INFO @ 500168105 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:677) [scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (* [*] vs * [*]) Interrupt_pin: OtpErr 12 test runs
otp_ctrl_parallel_key_req 103559374467422753886050647351465450974829942256738080574200456041326071791455 9272
UVM_INFO @ 3099510933 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 65048661962584724346591930669201121032624090167795171889924965941445052704176 13165
UVM_INFO @ 1674344968 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 87409952918440209460908420177231778215129645209316575606180815362918295158336 3921
UVM_INFO @ 394796763 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 63459734626872748296545572512564286105956308968049001698261582447024133647639 1944
UVM_INFO @ 3939364964 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 38940569935878187201013180248525062597479740712759806310131459266772566223114 21893
UVM_INFO @ 6780925422 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 111761557590245602237415028146712730496206244360725838512107025815681778994833 2987
UVM_INFO @ 144478746 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 14026154462647089533744792576712098847217987866914750199617692227317110675620 2320
UVM_INFO @ 123381968 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 98927004560592373533286185029181327709512075837995701620843624867695674631584 8748
UVM_INFO @ 813934757 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 75939288231151827148007995954440305624169527657910780918620932417897617450181 21960
UVM_INFO @ 2487630688 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 75554160930853672602448656087954046204030502694163673576581600508808573069211 6151
UVM_INFO @ 754339168 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 63094298114699751519383442420571636218559377977396949047584837497850377962988 9738
UVM_INFO @ 1430561102 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 3721133063417081150015233565590066731810781525227929462559782743572863401857 11333
UVM_INFO @ 557884614 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_scoreboard.sv:632) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) d_data mismatch when d_error = * 11 test runs
otp_ctrl_csr_mem_rw_with_rand_reset 43391840118407060509903243840131863364619789145949411339586331290027247047881 91
UVM_INFO @ 66034838 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 104458367802092234154328301992084232211551507939672856024868077746400103891790 5514
UVM_INFO @ 1809741438 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 60395222239135959459458848095643254553950781434191796987395143388962352930224 12120
UVM_INFO @ 17162150307 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 17062876010848349252469369932041431694624418412027719679622998361165503755982 91
UVM_INFO @ 496571320 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 75349207351599421940440457437698523843296906950509620066971913047486192097109 4303
UVM_INFO @ 1425294676 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 51676554548879094501224029713304393157627888297991247740130856078863174599598 11287
UVM_INFO @ 1054416011 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 15937489695635715672510602403270755863019295274470754843047593703416875700886 2227
UVM_INFO @ 3560250301 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 13387750302047962352220654058520845336660907922012402445901261137830467678698 92
UVM_INFO @ 88493124 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 65554167883334888097732630752010230030080328608342817946242198260618124568845 91
UVM_INFO @ 61747069 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 18596266338525043839857832188397137754427303814486120810564087931401274259074 91
UVM_INFO @ 69632706 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 35257654757603412830937103794797314574704050666234569058589232799211834447747 9797
UVM_INFO @ 1822248397 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:964) [scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (* [*] vs * [*]) reg name: status, compare_mask * 5 test runs
otp_ctrl_stress_all 23851044180391678022494131781539175122415712245555392673129965268808752573779 39954
UVM_INFO @ 2043512997 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 65998227095558623794030548826150880123007173752721828851207646339603646048064 4691
UVM_INFO @ 663337633 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 51478768077808987869694739529937284381613389584427381642871194186069350404174 4887
UVM_INFO @ 304927445 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 103207873938233452508116497533990990116131030845218966202888116049224908470146 20944
UVM_INFO @ 594769836 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 25329145653268424771339013621109949497734368484162911993236591361284994962527 6533
UVM_INFO @ 2624593841 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue 3 test runs
otp_ctrl_sec_cm 110998720161934690054784438600718055939766115136485861319010923937241298750056 2418
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_sec_cm 88823670287544581085555914790290304323375538389432244770845885445898322926026 2817
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_sec_cm 84902323413631029802711874315932692515082718437225091634913183208114318126352 2353
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_WARNING (uvm_reg_field.svh:1191) [RegModel] Trying to predict value of field 'err_code' while register 'otp_ctrl_core_reg_block.err_code_*' is being accessed 3 test runs
otp_ctrl_stress_all 28523135261483111875036424122458190468557991695241691550286267713669995437754 3513
UVM_INFO @ 2152512886 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 2152554552 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 2152679550 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 2152825381 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
otp_ctrl_stress_all 75229906391494581275886762581431372544474458129866012359917286088300314490823 674
UVM_INFO @ 268810686 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 269026374 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 269202846 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 269379318 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
otp_ctrl_stress_all_with_rand_reset 65182096832715777865074146041400746423611650230833620465985406692016540108752 3447
UVM_INFO @ 1256194257 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 1256321022 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 1256405532 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 1256419617 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr *ed* rdata* readout mismatch 2 test runs
otp_ctrl_low_freq_read 48951022436601545690557473719831980890041664008202260836632567410565680220408 89
UVM_INFO @ 26643777431 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 20385070999270109162019137520018882848355530571120041276894281502870881598186 90
UVM_INFO @ 68849919866 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1365) [otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_macro_error does not trigger! 2 test runs
otp_ctrl_init_fail 104257048936670648723053870202476259137409196191456822888755861159363428480728 1322
UVM_INFO @ 2559409204 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 109442427119342225715301300349312987410457247890283640724805482029339113426261 1632
UVM_INFO @ 695886193 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_partition_walk_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr *ed* rdata* readout mismatch 1 test run
otp_ctrl_partition_walk 59834325380396501686663006432792108486895842740586549885563332426486135438652 112993
UVM_INFO @ 13843477733 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:309) [scoreboard] Check failed exp_alert != OtpNoAlert (* [*] vs * [*]) 1 test run
otp_ctrl_stress_all_with_rand_reset 102528453027809611368204971387682534642626055086814106602928275418181773034107 3327
UVM_INFO @ 1014803674 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr e* rdata* readout mismatch 1 test run
otp_ctrl_stress_all_with_rand_reset 115389635877838198747977279183831698307773266518622375020406231343941129264731 91
UVM_INFO @ 1112461702 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:465) [otp_ctrl_common_vseq] wait timeout occurred! 1 test run
otp_ctrl_stress_all_with_rand_reset 56604567010260891586142112206760735490129940778171633901567156216782793560087 2225
UVM_INFO @ 10990245669 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---