Simulation Results

Simulation Results: gpio

31/07/2026 15:00:29 DVSim: v1.49.0 sha: f7401cd json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
96.10 %

code
89.58 %

assert
98.73 %

func
100.00 %

line
99.89 %

branch
97.61 %

cond
94.53 %

toggle
80.88 %

FSM
75.00 %

Validation stages

V1		100.00%
V2		92.99%
V2S		93.33%
V3		40.00%
unmapped		100.00%

53/53 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				40	40	100.00
	gpio_smoke	2.160s	50.382us	10	10	100.00
	gpio_smoke_no_pullup_pulldown	2.410s	100.315us	10	10	100.00
	gpio_smoke_en_cdc_prim	2.120s	94.114us	10	10	100.00
	gpio_smoke_no_pullup_pulldown_en_cdc_prim	2.570s	427.868us	10	10	100.00
csr_hw_reset				1	1	100.00
	gpio_csr_hw_reset	1.070s	16.301us	1	1	100.00
csr_rw				5	5	100.00
	gpio_csr_rw	1.100s	25.609us	5	5	100.00
csr_bit_bash				1	1	100.00
	gpio_csr_bit_bash	3.970s	526.984us	1	1	100.00
csr_aliasing				1	1	100.00
	gpio_csr_aliasing	2.160s	465.658us	1	1	100.00
csr_mem_rw_with_rand_reset				5	5	100.00
	gpio_csr_mem_rw_with_rand_reset	1.770s	26.257us	5	5	100.00
regwen_csr_and_corresponding_lockable_csr				6	6	100.00
	gpio_csr_rw	1.100s	25.609us	5	5	100.00
	gpio_csr_aliasing	2.160s	465.658us	1	1	100.00

146/157 passed

92.99 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
direct_and_masked_out				20	20	100.00
	gpio_random_dout_din	2.050s	81.487us	10	10	100.00
	gpio_random_dout_din_no_pullup_pulldown	2.050s	76.369us	10	10	100.00
out_in_regs_read_write				10	10	100.00
	gpio_dout_din_regs_random_rw	1.430s	426.397us	10	10	100.00
gpio_interrupt_programming				10	10	100.00
	gpio_intr_rand_pgm	2.280s	434.964us	10	10	100.00
random_interrupt_trigger				10	10	100.00
	gpio_rand_intr_trigger	5.900s	421.537us	10	10	100.00
interrupt_and_noise_filter				10	10	100.00
	gpio_intr_with_filter_rand_intr_event	4.340s	321.910us	10	10	100.00
noise_filter_stress				10	10	100.00
	gpio_filter_stress	24.730s	771.018us	10	10	100.00
regs_long_reads_and_writes				10	10	100.00
	gpio_random_long_reg_writes_reg_reads	7.460s	924.318us	10	10	100.00
full_random				10	10	100.00
	gpio_full_random	1.580s	205.785us	10	10	100.00
stress_all				1	10	10.00
	gpio_stress_all	100.370s	32001.500us	1	10	10.00
alert_test				10	10	100.00
	gpio_alert_test	0.920s	13.016us	10	10	100.00
intr_test				10	10	100.00
	gpio_intr_test	0.970s	41.913us	10	10	100.00
tl_d_oob_addr_access				25	25	100.00
	gpio_tl_errors	4.680s	418.762us	25	25	100.00
tl_d_illegal_access				25	25	100.00
	gpio_tl_errors	4.680s	418.762us	25	25	100.00
tl_d_outstanding_access				10	12	83.33
	gpio_csr_rw	1.100s	25.609us	5	5	100.00
	gpio_same_csr_outstanding	1.670s	31.903us	3	5	60.00
	gpio_csr_aliasing	2.160s	465.658us	1	1	100.00
	gpio_csr_hw_reset	1.070s	16.301us	1	1	100.00
tl_d_partial_access				10	12	83.33
	gpio_csr_rw	1.100s	25.609us	5	5	100.00
	gpio_same_csr_outstanding	1.670s	31.903us	3	5	60.00
	gpio_csr_aliasing	2.160s	465.658us	1	1	100.00
	gpio_csr_hw_reset	1.070s	16.301us	1	1	100.00

V2S

28/30 passed

93.33 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
tl_intg_err				28	30	93.33
	gpio_tl_intg_err	3.630s	184.245us	23	25	92.00
	gpio_sec_cm	1.350s	958.199us	5	5	100.00
sec_cm_bus_integrity				23	25	92.00
	gpio_tl_intg_err	3.630s	184.245us	23	25	92.00

8/20 passed

40.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
straps_data				8	10	80.00
	gpio_rand_straps	0.920s	44.033us	8	10	80.00
stress_all_with_rand_reset				0	10	0.00
	gpio_stress_all_with_rand_reset	23.820s	1112.477us	0	10	0.00

unmapped

50/50 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
Unmapped				50	50	100.00
	gpio_inp_prd_cnt	0.940s	22.102us	50	50	100.00

Error Messages

	Test	seed	line	log context
UVM_ERROR (gpio_scoreboard.sv:248) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs [*])				11 test runs
	gpio_stress_all	19001016686350712451214060453390693977432942315742746497658162408590547575307	369	UVM_INFO @ 2386961243 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	56757924919902366159413361999444427472665928481237631355156840591321201907970	1409	UVM_INFO @ 2507555511 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	70039346317423582444775580690408565445101979615276405524081975267124244935062	445	UVM_INFO @ 7576971948 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	101405704405528526483780367832541982250026745328301121248572765148422812081314	616	UVM_INFO @ 1189618540 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	69826334731027069556116438070408081811075582463551882063271221054110602828407	1632	UVM_INFO @ 32001499656 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	11966342150502238945664443650455680159513325497361488132639456683299397566702	344	UVM_INFO @ 1381940711 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_rand_straps	198136962274095525234442260350915712587446519782100384458412312347727143811	75	UVM_INFO @ 1357728 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	86599776611441120378320818677619209393388605767791467027906935765867494960714	140	UVM_INFO @ 285114388 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	716404997952636163901700921461902673343845460573808345241697193050884211672	827	UVM_INFO @ 1107233056 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_rand_straps	20670491455400082303374434418372311501974849974270316623142101716948962051617	75	UVM_INFO @ 4397664 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	79484748149845823047895038540647279622452632462908129503172226188183038824998	76	UVM_INFO @ 3649393 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -*				6 test runs
	gpio_stress_all_with_rand_reset	97615988108040956233725239351349260931877290676015132432074758877828636615875	574	UVM_INFO @ 1112476749 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	71434575886679136712328375989610935430756777946361002892250435236398482554149	79	UVM_INFO @ 226559046 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	6679700878354079837319376761221106348177326200311023779980848591249543953057	119	UVM_INFO @ 929898099 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	76706009437207167110308714043610794047285913709568315738366109667523167754895	153	UVM_INFO @ 3162318481 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	87761311880646373257480501608992288475783764904556084105355602941916904838645	80	UVM_INFO @ 7599858 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	37899505771497056093634171520006221486320380760157139460684638639351176471738	78	UVM_INFO @ 5775185 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1220) [gpio_common_vseq] Check failed (vseq_done)				4 test runs
	gpio_stress_all_with_rand_reset	70503761314879004539069174608069754727378167747481266133108122008753179778054	80	UVM_INFO @ 86560194 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	93272263393996125063350696577978263477345076309559529675983138293099248921721	85	UVM_INFO @ 6920979 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	112035541129062005668632113971577460001410977806920051914225563673423375038469	119	UVM_INFO @ 286643977 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	91458232056219476824661197025193536201315635418383772392210752957859458281161	81	UVM_INFO @ 24809350 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:660) [gpio_common_vseq] Check failed masked_data == exp_data (* [] vs []) addr read out mismatch				2 test runs
	gpio_same_csr_outstanding	76028165687152003721729781272490138337214384550126621571104897082240536835951	77	UVM_INFO @ 46586470 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_same_csr_outstanding	7308724043043081377864514996917626465302817719972049990326363014455463205583	79	UVM_INFO @ 47833024 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:461) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_] Check failed obs == exp ( [] vs []) Regname: gpio_reg_block.inp_prd_cnt_ctrl_.enable reset value: *				1 test run
	gpio_tl_intg_err	75840967079289903737763688346987614830244477855091041303732743134588846068730	179	UVM_INFO @ 200453599 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:461) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_] Check failed obs == exp ( [] vs []) Regname: gpio_reg_block.inp_prd_cnt_ctrl_ reset value: *				1 test run
	gpio_tl_intg_err	3180308854203529340781476162893891375524479148693672638613678275373185212834	182	UVM_INFO @ 73303566 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---