Simulation Results

Simulation Results: otp_ctrl

31/07/2026 15:00:29 DVSim: v1.49.0 sha: f7401cd json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
85.72 %

code
81.08 %

assert
94.99 %

func
81.09 %

line
88.50 %

branch
86.71 %

cond
88.56 %

toggle
88.21 %

FSM
53.40 %

Validation stages

V1		96.15%
V2		71.31%
V2S		73.18%
V3		10.89%

25/26 passed

96.15 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
wake_up				1	1	100.00
	otp_ctrl_wake_up	2.290s	829.231us	1	1	100.00
smoke				9	10	90.00
	otp_ctrl_smoke	26.520s	12673.893us	9	10	90.00
csr_hw_reset				1	1	100.00
	otp_ctrl_csr_hw_reset	3.440s	315.726us	1	1	100.00
csr_rw				5	5	100.00
	otp_ctrl_csr_rw	2.660s	99.540us	5	5	100.00
csr_bit_bash				1	1	100.00
	otp_ctrl_csr_bit_bash	5.990s	666.388us	1	1	100.00
csr_aliasing				1	1	100.00
	otp_ctrl_csr_aliasing	4.360s	206.829us	1	1	100.00
csr_mem_rw_with_rand_reset				5	5	100.00
	otp_ctrl_csr_mem_rw_with_rand_reset	4.030s	1949.655us	5	5	100.00
regwen_csr_and_corresponding_lockable_csr				6	6	100.00
	otp_ctrl_csr_rw	2.660s	99.540us	5	5	100.00
	otp_ctrl_csr_aliasing	4.360s	206.829us	1	1	100.00
mem_walk				1	1	100.00
	otp_ctrl_mem_walk	1.640s	45.382us	1	1	100.00
mem_partial_access				1	1	100.00
	otp_ctrl_mem_partial_access	1.580s	160.745us	1	1	100.00

537/753 passed

71.31 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
dai_access_partition_walk				0	1	0.00
	otp_ctrl_partition_walk	111.640s	3924.263us	0	1	0.00
init_fail				210	300	70.00
	otp_ctrl_init_fail	8.540s	2461.370us	210	300	70.00
partition_check				26	60	43.33
	otp_ctrl_background_chks	27.360s	5402.167us	4	10	40.00
	otp_ctrl_check_fail	51.130s	5592.022us	22	50	44.00
regwen_during_otp_init				20	30	66.67
	otp_ctrl_regwen	12.580s	4021.314us	20	30	66.67
partition_lock				7	30	23.33
	otp_ctrl_dai_lock	131.960s	23784.617us	7	30	23.33
interface_key_check				3	10	30.00
	otp_ctrl_parallel_key_req	28.320s	3399.651us	3	10	30.00
lc_interactions				187	210	89.05
	otp_ctrl_parallel_lc_req	11.500s	996.049us	5	10	50.00
	otp_ctrl_parallel_lc_esc	58.900s	23122.936us	182	200	91.00
otp_dai_errors				19	25	76.00
	otp_ctrl_dai_errs	89.100s	35645.309us	19	25	76.00
otp_macro_errors				3	10	30.00
	otp_ctrl_macro_errs	37.100s	2440.355us	3	10	30.00
test_access				4	10	40.00
	otp_ctrl_test_access	28.850s	9570.525us	4	10	40.00
stress_all				1	10	10.00
	otp_ctrl_stress_all	154.560s	63911.175us	1	10	10.00
intr_test				10	10	100.00
	otp_ctrl_intr_test	2.580s	86.755us	10	10	100.00
alert_test				10	10	100.00
	otp_ctrl_alert_test	3.190s	103.203us	10	10	100.00
tl_d_oob_addr_access				25	25	100.00
	otp_ctrl_tl_errors	7.110s	346.677us	25	25	100.00
tl_d_illegal_access				25	25	100.00
	otp_ctrl_tl_errors	7.110s	346.677us	25	25	100.00
tl_d_outstanding_access				12	12	100.00
	otp_ctrl_csr_hw_reset	3.440s	315.726us	1	1	100.00
	otp_ctrl_csr_rw	2.660s	99.540us	5	5	100.00
	otp_ctrl_csr_aliasing	4.360s	206.829us	1	1	100.00
	otp_ctrl_same_csr_outstanding	5.770s	189.575us	5	5	100.00
tl_d_partial_access				12	12	100.00
	otp_ctrl_csr_hw_reset	3.440s	315.726us	1	1	100.00
	otp_ctrl_csr_rw	2.660s	99.540us	5	5	100.00
	otp_ctrl_csr_aliasing	4.360s	206.829us	1	1	100.00
	otp_ctrl_same_csr_outstanding	5.770s	189.575us	5	5	100.00

V2S

483/660 passed

73.18 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
sec_cm_additional_check				5	5	100.00
	otp_ctrl_sec_cm	368.370s	36821.482us	5	5	100.00
tl_intg_err				30	30	100.00
	otp_ctrl_sec_cm	368.370s	36821.482us	5	5	100.00
	otp_ctrl_tl_intg_err	47.290s	23750.670us	25	25	100.00
prim_count_check				5	5	100.00
	otp_ctrl_sec_cm	368.370s	36821.482us	5	5	100.00
prim_fsm_check				5	5	100.00
	otp_ctrl_sec_cm	368.370s	36821.482us	5	5	100.00
sec_cm_bus_integrity				25	25	100.00
	otp_ctrl_tl_intg_err	47.290s	23750.670us	25	25	100.00
sec_cm_secret_mem_scramble				9	10	90.00
	otp_ctrl_smoke	26.520s	12673.893us	9	10	90.00
sec_cm_part_mem_digest				9	10	90.00
	otp_ctrl_smoke	26.520s	12673.893us	9	10	90.00
sec_cm_dai_fsm_sparse				5	5	100.00
	otp_ctrl_sec_cm	368.370s	36821.482us	5	5	100.00
sec_cm_kdi_fsm_sparse				5	5	100.00
	otp_ctrl_sec_cm	368.370s	36821.482us	5	5	100.00
sec_cm_lci_fsm_sparse				5	5	100.00
	otp_ctrl_sec_cm	368.370s	36821.482us	5	5	100.00
sec_cm_part_fsm_sparse				5	5	100.00
	otp_ctrl_sec_cm	368.370s	36821.482us	5	5	100.00
sec_cm_scrmbl_fsm_sparse				5	5	100.00
	otp_ctrl_sec_cm	368.370s	36821.482us	5	5	100.00
sec_cm_timer_fsm_sparse				5	5	100.00
	otp_ctrl_sec_cm	368.370s	36821.482us	5	5	100.00
sec_cm_dai_ctr_redun				5	5	100.00
	otp_ctrl_sec_cm	368.370s	36821.482us	5	5	100.00
sec_cm_kdi_seed_ctr_redun				5	5	100.00
	otp_ctrl_sec_cm	368.370s	36821.482us	5	5	100.00
sec_cm_kdi_entropy_ctr_redun				5	5	100.00
	otp_ctrl_sec_cm	368.370s	36821.482us	5	5	100.00
sec_cm_lci_ctr_redun				5	5	100.00
	otp_ctrl_sec_cm	368.370s	36821.482us	5	5	100.00
sec_cm_part_ctr_redun				5	5	100.00
	otp_ctrl_sec_cm	368.370s	36821.482us	5	5	100.00
sec_cm_scrmbl_ctr_redun				5	5	100.00
	otp_ctrl_sec_cm	368.370s	36821.482us	5	5	100.00
sec_cm_timer_integ_ctr_redun				5	5	100.00
	otp_ctrl_sec_cm	368.370s	36821.482us	5	5	100.00
sec_cm_timer_cnsty_ctr_redun				5	5	100.00
	otp_ctrl_sec_cm	368.370s	36821.482us	5	5	100.00
sec_cm_timer_lfsr_redun				5	5	100.00
	otp_ctrl_sec_cm	368.370s	36821.482us	5	5	100.00
sec_cm_dai_fsm_local_esc				187	205	91.22
	otp_ctrl_parallel_lc_esc	58.900s	23122.936us	182	200	91.00
	otp_ctrl_sec_cm	368.370s	36821.482us	5	5	100.00
sec_cm_lci_fsm_local_esc				182	200	91.00
	otp_ctrl_parallel_lc_esc	58.900s	23122.936us	182	200	91.00
sec_cm_kdi_fsm_local_esc				182	200	91.00
	otp_ctrl_parallel_lc_esc	58.900s	23122.936us	182	200	91.00
sec_cm_part_fsm_local_esc				185	210	88.10
	otp_ctrl_parallel_lc_esc	58.900s	23122.936us	182	200	91.00
	otp_ctrl_macro_errs	37.100s	2440.355us	3	10	30.00
sec_cm_scrmbl_fsm_local_esc				182	200	91.00
	otp_ctrl_parallel_lc_esc	58.900s	23122.936us	182	200	91.00
sec_cm_timer_fsm_local_esc				187	205	91.22
	otp_ctrl_parallel_lc_esc	58.900s	23122.936us	182	200	91.00
	otp_ctrl_sec_cm	368.370s	36821.482us	5	5	100.00
sec_cm_dai_fsm_global_esc				187	205	91.22
	otp_ctrl_parallel_lc_esc	58.900s	23122.936us	182	200	91.00
	otp_ctrl_sec_cm	368.370s	36821.482us	5	5	100.00
sec_cm_lci_fsm_global_esc				182	200	91.00
	otp_ctrl_parallel_lc_esc	58.900s	23122.936us	182	200	91.00
sec_cm_kdi_fsm_global_esc				182	200	91.00
	otp_ctrl_parallel_lc_esc	58.900s	23122.936us	182	200	91.00
sec_cm_part_fsm_global_esc				185	210	88.10
	otp_ctrl_parallel_lc_esc	58.900s	23122.936us	182	200	91.00
	otp_ctrl_macro_errs	37.100s	2440.355us	3	10	30.00
sec_cm_scrmbl_fsm_global_esc				182	200	91.00
	otp_ctrl_parallel_lc_esc	58.900s	23122.936us	182	200	91.00
sec_cm_timer_fsm_global_esc				187	205	91.22
	otp_ctrl_parallel_lc_esc	58.900s	23122.936us	182	200	91.00
	otp_ctrl_sec_cm	368.370s	36821.482us	5	5	100.00
sec_cm_part_data_reg_integrity				210	300	70.00
	otp_ctrl_init_fail	8.540s	2461.370us	210	300	70.00
sec_cm_part_data_reg_bkgn_chk				22	50	44.00
	otp_ctrl_check_fail	51.130s	5592.022us	22	50	44.00
sec_cm_part_mem_regren				7	30	23.33
	otp_ctrl_dai_lock	131.960s	23784.617us	7	30	23.33
sec_cm_part_mem_sw_unreadable				7	30	23.33
	otp_ctrl_dai_lock	131.960s	23784.617us	7	30	23.33
sec_cm_part_mem_sw_unwritable				7	30	23.33
	otp_ctrl_dai_lock	131.960s	23784.617us	7	30	23.33
sec_cm_lc_part_mem_sw_noaccess				7	30	23.33
	otp_ctrl_dai_lock	131.960s	23784.617us	7	30	23.33
sec_cm_access_ctrl_mubi				7	30	23.33
	otp_ctrl_dai_lock	131.960s	23784.617us	7	30	23.33
sec_cm_token_valid_ctrl_mubi				9	10	90.00
	otp_ctrl_smoke	26.520s	12673.893us	9	10	90.00
sec_cm_lc_ctrl_intersig_mubi				7	30	23.33
	otp_ctrl_dai_lock	131.960s	23784.617us	7	30	23.33
sec_cm_test_bus_lc_gated				9	10	90.00
	otp_ctrl_smoke	26.520s	12673.893us	9	10	90.00
sec_cm_test_tl_lc_gate_fsm_sparse				5	5	100.00
	otp_ctrl_sec_cm	368.370s	36821.482us	5	5	100.00
sec_cm_direct_access_config_regwen				20	30	66.67
	otp_ctrl_regwen	12.580s	4021.314us	20	30	66.67
sec_cm_check_trigger_config_regwen				9	10	90.00
	otp_ctrl_smoke	26.520s	12673.893us	9	10	90.00
sec_cm_check_config_regwen				9	10	90.00
	otp_ctrl_smoke	26.520s	12673.893us	9	10	90.00
sec_cm_macro_mem_integrity				3	10	30.00
	otp_ctrl_macro_errs	37.100s	2440.355us	3	10	30.00

11/101 passed

10.89 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
otp_ctrl_low_freq_read				0	1	0.00
	otp_ctrl_low_freq_read	73.950s	26639.079us	0	1	0.00
stress_all_with_rand_reset				11	100	11.00
	otp_ctrl_stress_all_with_rand_reset	163.570s	50301.544us	11	100	11.00

Error Messages

	Test	seed	line	log context
UVM_ERROR (csr_utils_pkg.sv:461) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_] Check failed obs == exp ( [] vs []) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value:				102 test runs
	otp_ctrl_partition_walk	74680128984731865699938339062331092825769867865288101614167903276873717399814	160055	UVM_INFO @ 3924263288 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	21440388331127081465769360440454426976943244098148032344527905570440457923879	230	UVM_INFO @ 137248211 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	101028069339868557977054762255108693562171540839606268933591836854861749114686	283	UVM_INFO @ 75267666 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	38023351228383471877076102262162059649865065085606250879589843544532500175636	8004	UVM_INFO @ 507475400 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_smoke	75436041131883810910658311109818922788666589023882900389743543701101493935799	728	UVM_INFO @ 259576345 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	32867898677468176095646729662540935663381167916382967419487996398176491466270	903	UVM_INFO @ 100950249 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	3446945405051022685752556098662915690430211714647050715267560735954769355327	4076	UVM_INFO @ 1718858766 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	87607454592261118725370073240164869614737893823727280779350494370091416970965	949	UVM_INFO @ 48207768 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	57125018743169655530593612107015497763851824677568596612997923569262747934078	807	UVM_INFO @ 697848497 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	115654488189799584796580064719933863821968061152159516580823617792946587810499	2916	UVM_INFO @ 83944544 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	68154065504216458471226217423494874024711297338821068185972046853015129869662	1538	UVM_INFO @ 80646487 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	63552454937413316735887739494659382124835834375628523463985653103962085916975	2066	UVM_INFO @ 1375099710 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	63508217165837474082880618867854603228819822064110095236469968967340543980085	8134	UVM_INFO @ 4997570919 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	33817327432630529095152314169558452522285715086155459198459223879276251249955	2298	UVM_INFO @ 91975166 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	36235233027829407276027835154497916172171757309937849867133280258735864820534	181	UVM_INFO @ 35347419 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	108598424047401884679002686573043326966197283386329531736780884038217860163191	1156	UVM_INFO @ 78270448 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	103212247035907412938804562826252285567674334090942118499261774296766676058814	2054	UVM_INFO @ 66764308 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	4626237169873453968304528645226256568091115195976751996190954649640999209728	2645	UVM_INFO @ 88623043 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	99037115034821464693145153097364354273359381702426602297406672956363029853257	1221	UVM_INFO @ 304202006 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	109103136870321256760452890633083454755203139212714035519927567610971581483769	841	UVM_INFO @ 65697682 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	110368393814295625322904427343324737429321598481530597122961316855232300433192	2469	UVM_INFO @ 70497038 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	19309636778752292297998587701983319947803473251194301749603101852484031817915	38785	UVM_INFO @ 12333780281 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	102156585938726155668987135411882091661140701647770656036901004479554088917810	613	UVM_INFO @ 88065226 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	50872372307175227995659658610568872359605058334701591324572389697914953987825	1069	UVM_INFO @ 66544701 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	15847834523913598218558998979401918136526525513159637096104561805329314934389	323	UVM_INFO @ 36613506 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	78699791414698001447507808659784752595982503952196243436588723723600800445353	393	UVM_INFO @ 41045616 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	8492989014767070684069517939645401148163466285561964137725033761630050075803	1477	UVM_INFO @ 887045709 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	65475653612547474914245986145297507306056750418896834377040568081932996009943	183	UVM_INFO @ 538654165 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	53386146519348407487501209511620690085843443011295226753379485555916406342177	351	UVM_INFO @ 571971957 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	81075467555612676059371865820745709464879063274836240863378314267622327925374	663	UVM_INFO @ 152905076 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	105833394470923241000338761434195262110558800454989789980360327650430437541808	2867	UVM_INFO @ 299929543 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	71430922448105078883788252801312929954391614544974298915364856391652835923972	99	UVM_INFO @ 71568709 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	41715485953556844482109436246617167087976085799385871322134898527157389777327	1147	UVM_INFO @ 969754905 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	16927291393641170747577196772187571696959415051778626935045203741502905247056	517	UVM_INFO @ 250263203 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	48351331123292299808736603540652313520429776837683184280469401553067285751880	99	UVM_INFO @ 126314193 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	24552662444049659378001391988401056065985864924320701430483270519723804564960	1817	UVM_INFO @ 274154375 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	71692616683754151015189437833206908528966670939828630277374210640981672961556	225	UVM_INFO @ 41216724 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	105547129605352551666334276123574742149830617921383225917649937059017816432481	1311	UVM_INFO @ 64186135 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	21368634816160725110893029749240507714478944315465451307686273969259453641436	2113	UVM_INFO @ 1060629681 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	106105092528912772574001367145509332817525401441191608578982187267245490510327	1233	UVM_INFO @ 102847764 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	45519227025452618271850038148224064197256258662756484581336491207352554166697	599	UVM_INFO @ 133619253 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	68198392686465769057137445278754278333035679688836951056376314805192257182726	1157	UVM_INFO @ 184430911 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	87725075775277418598835149486708200947800223896691874316764866303542334776062	771	UVM_INFO @ 688228682 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	21964867278700306896307879000775297281059357126744677637948057461867071051434	2205	UVM_INFO @ 241329096 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	50852344288319300488017819860452103479057265489786123073714159758047460923004	597	UVM_INFO @ 81470988 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	8637565116550514943852409497882504013252870876056225610730785054297909613427	589	UVM_INFO @ 68192759 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	46849546961160760953686537874027662074871742061828672828795564739706116410477	1997	UVM_INFO @ 132342411 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	54503493200573623207009557677737396676644138163597573495919030219990508888157	447	UVM_INFO @ 145564616 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	101683077433610918570295104628537356751237856344252567914135354593111963542574	2459	UVM_INFO @ 135338942 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	60482288767924178948502039392251902467657192707156705129274228812629155648672	183	UVM_INFO @ 74681139 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	101274935476240900973830124415559590012135951388429354561214305958835051591640	985	UVM_INFO @ 122873579 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	44610716958430670526104448070221643383848637556664343307086404415076644124086	1201	UVM_INFO @ 75996484 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	17823474789488183561164424287486186205202237416583191174387722708644203501163	325	UVM_INFO @ 53310715 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	92090708549757440601006343160942438695795031050538481967395755451438993051892	225	UVM_INFO @ 553063009 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	10594419413396826680499318563014488906368981074199062591658159969438570246862	1561	UVM_INFO @ 906869224 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	112412143772741650264915968950109714852015349850627891855461633615545990806387	99	UVM_INFO @ 213042044 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	111782641602649969125700771276578966755052443184525769494878667463896649665444	791	UVM_INFO @ 86074892 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	85219567973551391703526008179574890186295559898244530468048121390778540397082	99	UVM_INFO @ 54386992 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	68431830613544027240455186670146209889960640200579967677150764267486253103563	1317	UVM_INFO @ 185681197 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	32647209669290847431877550107247072848095325360405776202831106346418178797371	141	UVM_INFO @ 513878676 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	28717706732638091671239943753758828346902030715399858159798341447866840595273	183	UVM_INFO @ 542290839 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	104937834217708285534830064112048797913550447562626876713069369613725222659802	367	UVM_INFO @ 123896760 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	79334407583312178059887500839714120977589487200380103229866187744215633633076	1553	UVM_INFO @ 113027865 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	83150630272443923213844592734773016407724921504329431799918840189849247772078	911	UVM_INFO @ 186737328 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	70973722872514341443957300418277061779578602543415827923156121707018756860530	473	UVM_INFO @ 103837140 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	48036647287328301233962286953693381515447856550072722552913712162349453159176	141	UVM_INFO @ 35904524 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	95218808628555940920980716175380696593818494048781926991396497341747880998470	307	UVM_INFO @ 36860786 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	81515242444533954209282120041364834695790837838598715918535653756754189508726	1101	UVM_INFO @ 871253504 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	113649626617259998398059671961971816170572166240088602044921564643589898373566	1207	UVM_INFO @ 101755621 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	17975443737782772947430804361048031058441237691262116781883826986511502464664	1895	UVM_INFO @ 66056084 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	641239542903157241232558194047882160625319240262431318377275314269756066101	1807	UVM_INFO @ 75216939 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	2744928453495875110435035890304165254135977928736436709932104213574225837614	897	UVM_INFO @ 45008193 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	50169276975150658153045900395901292796549579930975273571397698605878094639318	451	UVM_INFO @ 218921214 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	94137489372880395020368290848658020723901826547754244625763197813550960886627	803	UVM_INFO @ 284667174 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	69599644818996692366978172586627846050657122175303093231382364275350160510510	1053	UVM_INFO @ 87587408 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	46406823340054499866612635943754143271723513776932606444721221327937535256020	901	UVM_INFO @ 181047026 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	107804984775094803923569184433408082982682371123929701553751154027785816538161	1465	UVM_INFO @ 116242621 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	40776704369488048238679343611336510708003089267278174368529397363439004703378	665	UVM_INFO @ 70292626 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	103124113817825303437100892676386035300581177154773879211838140017230860219215	1851	UVM_INFO @ 985624105 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	91550540230811555156129426829014418353406768080159922017105349351836684153409	1123	UVM_INFO @ 194068312 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	35697871066259886394070334341852637567567795334864196426315637371049311966005	241	UVM_INFO @ 548347368 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	68748629897352133242316351377097663615393539145299058113832761693463017740341	183	UVM_INFO @ 61171180 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	99102082848567672559250700383751836175653345587149845504112012022558465309122	223	UVM_INFO @ 874618122 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	114545907694832143367414246558174795758675330218932901296489218637810881133666	619	UVM_INFO @ 42449118 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	42280825044194341584880457048485814268933466589804268401822827955188414352910	817	UVM_INFO @ 89961133 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	22532391718867440275836398634673913512313033372039238817172360894134594880494	99	UVM_INFO @ 39958886 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	52659244411899483350352159139960537620765543796425619484801012032615599182439	507	UVM_INFO @ 39092086 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	17012022836937552396609440141619578687715358616920781710043217297797758607251	1321	UVM_INFO @ 950471129 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	93424458166276956577855547592591456064548254423494263078034892566071617467575	451	UVM_INFO @ 85289600 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	108784193309148832798516048131868256647615294351866169840264655616313341660252	961	UVM_INFO @ 95486307 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	57879598847144669562259093115922289653915286303363041455136102377206410986307	323	UVM_INFO @ 118649161 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	110489314189691428775612096992909569700682189447933446247012064822173839124832	1483	UVM_INFO @ 245194042 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	27634924425406296007674619012455043385399420383704340673305839510411506816141	927	UVM_INFO @ 133869050 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	8906715584384628492372898825058257624216850162968277697313841410104474573480	1705	UVM_INFO @ 57732558 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	77202140441133302882446828806535142847311305228571365889821197896960854551166	1667	UVM_INFO @ 115645672 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	20310428231527935395120125949241797402932397334423393829692408844406768583644	2241	UVM_INFO @ 85585942 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	11551943240945587210915797637449281790805953743151287401778058718116101550339	593	UVM_INFO @ 44770517 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	58979525668365006720741368019405749549563731599809836248303435229940982079692	575	UVM_INFO @ 155114728 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	33087417230156902413133418676769444851397061558041566780974841864895616801336	225	UVM_INFO @ 33884966 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	37728476467827121320574603910112310853242706605114444076678656260168810204820	99	UVM_INFO @ 67769954 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	1797909669787959071957873467170618800138794181113517613123870651165079503617	741	UVM_INFO @ 49906965 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	90659154408562875735128748581339009560671634228059684973245036673002163774966	199	UVM_INFO @ 73690387 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1326) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs []) reg name: otp_ctrl_core_reg_block.err_code_				81 test runs
	otp_ctrl_dai_lock	57968339097345520739123808579243284200465858969802796781217122988146191940153	362	UVM_INFO @ 210368759 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	101929342856377028980911832166717912292137470046659814849159411161302102569907	8483	UVM_INFO @ 736839958 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_key_req	93910096691101392700338977843878623904984449482452693651835562799961896432585	1940	UVM_INFO @ 71608169 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	42744359193567042449028877661470341798891362871443360154273724380559830534276	991	UVM_INFO @ 604024768 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	93495580727976814353791800547375103449103217941107861619198215207996760703073	1420	UVM_INFO @ 2131875060 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	83898420639981613851439015845585417980154431489010232007471912505983179150838	18296	UVM_INFO @ 1477373663 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	35979980321698974420418477000165621227461018045320563524073985937061589796250	1270	UVM_INFO @ 374045047 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	96217646680196755719611667682664314474211310988308809537869676892032317013247	9855	UVM_INFO @ 1580002112 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_background_chks	1502760031125152642085438418926232235676131842370951185445678254165631771180	9657	UVM_INFO @ 543978196 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_key_req	4881639113220658697817866250358407870960652408862180688107853434990272265654	8105	UVM_INFO @ 806582524 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	4398732161698451846372054441131278280529498426081888119802484308094304412346	8181	UVM_INFO @ 2152130408 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_req	74170306320090973725052981041889098247836837335726355341611483082954859365556	980	UVM_INFO @ 76495365 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	27615252860716884465577271372280464983441025057652959334616766033359566894828	5253	UVM_INFO @ 420744018 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	29055682241772288220321956925100363411788236976222708522315172510903416667599	8106	UVM_INFO @ 7052534943 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_errs	40061801601918016491593822411872713117231886024337080306755031264468215786929	14402	UVM_INFO @ 250964609 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_key_req	53260927536267694133375643295864887791773623781659772032058116865434973932858	2236	UVM_INFO @ 164012728 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	56122832120380646821508328327437863207785834870834127010763581656576156437940	11500	UVM_INFO @ 15597051367 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	6715203493590444963794906843911331917498732026932565151548000760930848763728	3200	UVM_INFO @ 250788776 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	102271008122515712219248242521268306992280643149643692898936285947427377755029	1927	UVM_INFO @ 379679435 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	2074887921855706854722137488625099115006267771696471903114715445401302190173	5578	UVM_INFO @ 462835677 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	43442662687157347032269335439448251964509524489773642523578745138138799636598	4217	UVM_INFO @ 187482612 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	63710370767191798676060847912002722418903302919313438346024643518033512067325	26941	UVM_INFO @ 12398664114 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	106848397224708286722512816268638136353008394574114353060558957226592082757028	3440	UVM_INFO @ 114530844 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_errs	31375710029727474676993441436256995872660176082028732974370797251360260507331	2400	UVM_INFO @ 222571467 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	87116933181338840778071571591050935232662855922686392706670910473518054685863	48065	UVM_INFO @ 5643140524 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	53405936671247352419501452742514628258111823207183813056262134006329126951931	430	UVM_INFO @ 59691800 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	38035871990192879723119801904650844521775946695917231731014802346901686865694	8710	UVM_INFO @ 1499143087 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	14494180527545020453719217030073956617830627445315370995020232008871299934503	1946	UVM_INFO @ 336884608 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	99986667575209606775631027086040568766907814944300684361689677188015025596004	674	UVM_INFO @ 110583800 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	61145008205656386010401241945019904411094908162047879313285399025166426485701	9151	UVM_INFO @ 254167854 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	11158327012107892284971537920419554381120398696480476006614154703235295195257	6227	UVM_INFO @ 203329745 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	1161799858579362514499507429719945885581344313599778497146805438432328753949	1246	UVM_INFO @ 10363314057 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	42328450640327190534707964660140908303047665217552666146276780486494072893102	1200	UVM_INFO @ 1834972017 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	53808146631947338088725750560117851029835370317348466886247480979577694595300	12188	UVM_INFO @ 27768685258 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	37297397083061793526592500502250863979411926839786986019182092033770112754214	3704	UVM_INFO @ 559905361 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_errs	72341637577439764870792174172235226267777872271004481413762274186470664889041	744	UVM_INFO @ 231602690 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_errs	53804059764896073870924013716747120997314858543914771227362289564302035305973	5306	UVM_INFO @ 5903208150 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	28768423436096940818724985460448600519038362607794136225299454085215166526120	694	UVM_INFO @ 1323160531 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	46909251116078533382972362787936677609341570574045940251380825743046883538123	5525	UVM_INFO @ 250164091 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	7497457789759522658467185324710800696930438952316651430291773496560699248948	77972	UVM_INFO @ 50301544476 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	90030894851693396876759088421362200123125935915695844684404469317350996070221	5359	UVM_INFO @ 918201584 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	83307729768952472243233203730279388690310735713915857714674195948123215434035	7041	UVM_INFO @ 3117564972 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	18227287744750477346817084449410920831017693021235418739797321263596550628083	3166	UVM_INFO @ 1803614620 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	30711208791162703226759103974500364837624552548025680290207649345922124248185	632	UVM_INFO @ 234286921 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	27874015008743116307962208787601254572054643110564945897287101278720438754561	2340	UVM_INFO @ 132535623 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	55784362608451931410701473477778044712957800774346634583070716358386626992970	2810	UVM_INFO @ 72028578 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	81533632682259316045717530315096903367527692499978585747399917490922123635783	4510	UVM_INFO @ 672801978 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	99910823014216008367919185215689139329210611884326818115398443081842763650553	632	UVM_INFO @ 386864294 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	110228659940744323007708116772662547033278369667769363518737899676978676082111	12381	UVM_INFO @ 31768344957 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	4502970158278376820936293986412765986356339013482314303488827337789306233404	602	UVM_INFO @ 2072623752 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	30948570202867707878695902321110919538949851501775177011055906174183577894554	7524	UVM_INFO @ 1515925104 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	32724753148894487945077287384778868643894837609271614972541968927939579133118	6974	UVM_INFO @ 9319531405 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	8792137483972733605361889994609926246331251630019472858219808068181441154469	928	UVM_INFO @ 182183625 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	4284196170179908720585757679553978365218122462696298647025956350590245173311	5831	UVM_INFO @ 819298283 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	43963039875420205587077561474941035353750320269598528544655304230320771107666	741	UVM_INFO @ 403949936 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	50909623089445108627248954623405080141363558787245905743399105832466802553825	2262	UVM_INFO @ 96785956 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	3432636134570179137078003701207256423748251614724927449084433963915941978710	992	UVM_INFO @ 93979054 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	54845031863609668471185214730676898302675993538049604617065088590413361301059	852	UVM_INFO @ 74278345 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	31295079985060058899651117671077215977031349111982800694548465968223969769133	23577	UVM_INFO @ 30852300363 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	111838442019010257073319686615314611421154201994337421838267961625568213280306	460	UVM_INFO @ 605524200 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	79837478586479812403714473863021685628282407837020303868222773290425772294055	3461	UVM_INFO @ 8807595234 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	54787219900550950870479429603125972922690537556742639052210761341581357388076	17360	UVM_INFO @ 11132890754 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	39011236424218679376666509231920199081992496563183942359238068493564608419355	1202	UVM_INFO @ 189349892 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	18269366994898700367516629916317426314203535119877529720382944922070075678925	9374	UVM_INFO @ 24515184770 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	37488332206449875968996674944508983031563922847302390681998610008891461966819	12565	UVM_INFO @ 1835547621 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	114579288843681966151876812460704100903811348887273472872831564691637613975237	23220	UVM_INFO @ 29999098578 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	66021458520776183019249207650376006076279722691319724317638274531644185337784	978	UVM_INFO @ 223327622 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	105665216037419499627331640226592155174974951202704989824226547379110828419089	250	UVM_INFO @ 1798117717 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	15045001700359333171886624226005378104674748706764428536779131805631950656644	26635	UVM_INFO @ 52404750216 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	85728754218577403634273168495998157477202955983519776834861979842594065084404	5069	UVM_INFO @ 2948358209 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	62504433290294974036136078077972394255990078988936119641808587897126122052788	1418	UVM_INFO @ 119168136 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	72546852939211976280600381090039920616267837409996921796627662517034683805107	15545	UVM_INFO @ 956781748 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	57503205636654462103115033812785270187864916578388113248100139392443835447975	798	UVM_INFO @ 84591650 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	66787172098829990140028307738733614298539723488766399975732316652681562353558	11361	UVM_INFO @ 9477048591 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	77991609396317305458892587268209847385706279590351764373933593361616229587533	3480	UVM_INFO @ 377686060 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	16153495217406883818636361655038980957636520147716624880306176816165772939959	210	UVM_INFO @ 104408532 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	37125819790313385064882875120426610000881676810465164046352862044603507177263	536	UVM_INFO @ 115912212 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	104753915810711947802179058754810768894536140284615871247366020407133818678761	212	UVM_INFO @ 61439010 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	40121718782695136817124027890736967617914585264760984823298223452479629777148	1316	UVM_INFO @ 321434329 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	52385067572435251705991680994935347136941453653431884828253799249862792266931	234	UVM_INFO @ 43605330 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	59884854573036767799114226248530973957128600618806719925690684629136034215720	1848	UVM_INFO @ 452292753 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1326) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs [*]) reg name: otp_ctrl_core_reg_block.intr_state				41 test runs
	otp_ctrl_stress_all	107430469281382370218701093005741115765250672890176885528067884510530848357812	6447	UVM_INFO @ 850651312 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_background_chks	107673496708704489484272745675295010311899769604061901375330922930743273086936	4213	UVM_INFO @ 370871317 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_key_req	78270794775588662731173068854714904943312056888121052505616619784908472667159	4635	UVM_INFO @ 164441901 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	45379105065855833569077156473789091500096200573708238289108925085228009099103	4319	UVM_INFO @ 1020820285 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_key_req	64329190189120437283629810327041472548558896058049284764161909695900266723266	8340	UVM_INFO @ 2747259707 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	66421566307003650943683816485425122185307509427795439535954762477194460627867	6789	UVM_INFO @ 835899740 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	110736814458816058512147409440117902761048790084366444237676603004172384326046	19534	UVM_INFO @ 28578750554 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_background_chks	88433130999307213601447187770109375411459049695483814275823454681004121611377	5541	UVM_INFO @ 376938520 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	85951349538229363633563180431462836706852523240666802274226228450467430941834	12541	UVM_INFO @ 1163222263 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	60241964035772029247393461581753656033761335764469614374537624018766619733307	3985	UVM_INFO @ 5448967112 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	74193738896368312405831278282771539626795594431999321159128810444226484947265	9573	UVM_INFO @ 472922363 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_background_chks	78131679177875076279071404227614988381142798364097916727194873904125418548453	5778	UVM_INFO @ 1028275769 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_key_req	19025754903126150830058683383927294187811858456146401290488412803094307506105	17157	UVM_INFO @ 1711882426 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_background_chks	38226193072869569128046306632681783289701497783052320196272128562340175830292	4670	UVM_INFO @ 950913865 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	30376453672681522748904180389132896032513699197197061418736163666730277983751	17830	UVM_INFO @ 20864689787 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	19959134780452706704990098291692508735096236780349015604050858069319620393493	11808	UVM_INFO @ 1164647258 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	98287227647931480637628462140836826209827897692106211742402473744310077141332	1136	UVM_INFO @ 422000320 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	2289894055879288791157772141118681400244539165741649864277152177417866169716	7493	UVM_INFO @ 1496346460 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	107445366775334968495534208673182722316046687007448235044495708007387709130088	7335	UVM_INFO @ 831994693 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	55332871622165235526823694198774489446991731092079199930006243321425258501239	5759	UVM_INFO @ 844945543 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	14379517091303184996910797492832113434417391164363294224402312616226270109490	8494	UVM_INFO @ 591989505 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	23662515798364826485069267151786455816143411456345250661948262453948880052751	5227	UVM_INFO @ 1414906275 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	54247740404651163922900864593312295740138202112470815968778113387417896371966	3539	UVM_INFO @ 3688411667 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	83083187512791242299655363526950721706748383898588962260864207493466218077328	2594	UVM_INFO @ 1139625329 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	49926621441514820837219323077374235939186100919192207433389385330825033682229	5186	UVM_INFO @ 7684049738 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	112704585886365144533819308908513024830345922279036958636438938866887529176576	3635	UVM_INFO @ 829894937 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	78772792471651471278830583945886752315544568912029698352262780224801546218965	4065	UVM_INFO @ 23247097700 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	38289883808303797351815277996523842797390743287678908266950976230263544127936	222	UVM_INFO @ 269977701 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	95100482009078989834351104366624140976740430698303364231441019767342146282956	8137	UVM_INFO @ 1878790102 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	1438500045328441047885036865397045186005830344586537809147268840736825458016	7662	UVM_INFO @ 2499817418 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	27953052676756662067295083628604023360285251211172743102102299766186045060562	8126	UVM_INFO @ 3462841245 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	42121619742556731791570276570743193434237273160197666876521599809405590016387	3623	UVM_INFO @ 9831021304 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	73437070410826766264798327681563248306163124647243330354279077169316663056324	168	UVM_INFO @ 169388781 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	111550566190863583120447929345326759438241334772335951867587480103539816451991	66955	UVM_INFO @ 13790813633 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	29879890593441921578263558208897081926389108004120881089377711436513599692526	108	UVM_INFO @ 71024010 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	30030265878627648938500383262680252334778211010224086655225852012713556123977	1039	UVM_INFO @ 405019577 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	16743528869655515070160872238441557906630870593399475943004270751123676279701	5235	UVM_INFO @ 11533955742 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	17707282118233595756107479060217483898957238489904213385346483580890210653685	780	UVM_INFO @ 216896163 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	23169750852249015324572823376984957974171304949990122829538151272001305858547	1307	UVM_INFO @ 9406870181 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	62440959479869109875010137040736401073680054399057101699380887284871179621176	1216	UVM_INFO @ 154410742 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	15776390250157406409357645201356510074211262278454706723487153367873906254181	1833	UVM_INFO @ 1434669376 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1326) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs []) reg name: otp_ctrl_core_reg_block.direct_access_rdata_				33 test runs
	otp_ctrl_check_fail	114736326623908332817430651779443077500510078934675887310048233400908349888219	6570	UVM_INFO @ 9451567891 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	52510208968315138405768433344284482808050448248648510411153429317940207199207	23432	UVM_INFO @ 2440355112 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	65658620715348958879246685016725213641811098544720805622828232951714022332004	576	UVM_INFO @ 291475759 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	105222830840418042447942244118162121651019447788813709398520775898042092024248	5671	UVM_INFO @ 602930260 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	73385876544646957971674532339607806893382809893726271225094676947156855381443	7908	UVM_INFO @ 1792385663 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	70639877379610006830615957716173727140908458532906390442208607916845746923686	2247	UVM_INFO @ 951662012 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	1996210578884725475732625398409608789006542040661377133618311885274796091016	15486	UVM_INFO @ 1992566537 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	59119199483836446810691073096112079227942350665266133763278160025244688343614	5632	UVM_INFO @ 412177827 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	103396845607444422385113480254459207451343857693178833877885761468057805911405	4291	UVM_INFO @ 8534945490 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	13222895108983308622589158340469916819251419992497276211131621421412575497923	232	UVM_INFO @ 222415659 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	110701901855531690621165416922378575296136764092896031063327191742605968657245	1483	UVM_INFO @ 793028233 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	107514506466425448571489123673508705470188138526856238728561839789437245666499	10581	UVM_INFO @ 6000172993 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_errs	30889346004885239863136927624623759492172773888122154874734115977808625319005	2976	UVM_INFO @ 979586787 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	103124020147394327666992732327239466309913724517511466257658684577710602040906	12132	UVM_INFO @ 5017500626 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	58686473119278018694058955452037467000665236952366436983800653897832675913740	932	UVM_INFO @ 1370026821 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	3013200207473932475273980425444287939836014733112748145448490555664300630522	6296	UVM_INFO @ 2151310249 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_errs	8848843956421672842536242868789167720211960633572653224539887779026560982668	3068	UVM_INFO @ 4540146006 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	51411447011500838017814354808408604294162252434561449816816175432621149754752	5671	UVM_INFO @ 553676107 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	102430271455256148876785144398268214942098070295943491278719957177546761134510	19864	UVM_INFO @ 5895199270 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	33561937391154392796365973300677099549013950269311664660810713473595639973953	636	UVM_INFO @ 1116932325 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	97446652340208908118342786915942639832836677951697295000231286468621119401769	24544	UVM_INFO @ 3531739684 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	60298278766572863192553504848560459449979900206761533797118242991129824161495	20781	UVM_INFO @ 5184485087 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	3217604662780314577251950498289094119522302685905064712116868154253482676962	28977	UVM_INFO @ 33570742489 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	20324778599077443924717645708134120421487961639367983667752320696125365799973	3038	UVM_INFO @ 9333662196 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	110788787122660673502488754198199616669499689580956784196132746455644494529972	586	UVM_INFO @ 130549116 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	29520488091154673130020857313058913114121205376856078305357168689462616697094	182	UVM_INFO @ 157164388 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	103672317735986631347067484027065553437818039649223495237997025088576555120687	2257	UVM_INFO @ 915399416 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	46835038444129551105770964628175294084283613955547558192133122026452393737045	1619	UVM_INFO @ 242978196 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	29713169616585479403617469375840919289728280835052271394945792921948572493850	170	UVM_INFO @ 202279094 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	112612463300115285829401267635297495121012062472041981283412300455639422442348	10285	UVM_INFO @ 679854385 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	62293621156915703177036963297252149097559970531895257590309286760609176251431	5983	UVM_INFO @ 834246871 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	15774482268801657625163336835139181396367959458300601577223347421994466740937	4213	UVM_INFO @ 2257662074 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	66219531149093920145932710117905140644944674321638791042332179351783679376007	4151	UVM_INFO @ 573783028 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:2219) [scoreboard] Check failed item.d_data == exp_data (* [] vs []) d_data mismatch when d_error =				15 test runs
	otp_ctrl_stress_all_with_rand_reset	39975367839996687421304093845013409618310193309637599463683930023079366207510	31929	UVM_INFO @ 15550955868 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	254388221724179668197079295670015702311688640755716416704204324147353171393	91	UVM_INFO @ 35430106 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	61935193046100157851618339657313262270421626283563437137182752885666548224968	236	UVM_INFO @ 286064999 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	57041298514397573393614833656900868389552907620092029176806340397681306287840	29669	UVM_INFO @ 821327236 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	84244054987632169031202545329586219921053930434775878172840572269408659231327	91	UVM_INFO @ 124276932 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	38801876749424152913093929445778815968380331887511905765596521383481789968364	5544	UVM_INFO @ 31863724798 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	81906694832740179576379896371064034426179082278994860359382026564921928888944	5236	UVM_INFO @ 3132973024 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	47350790140818092125892796259295765443628833728255740567380052920949107336900	2522	UVM_INFO @ 662602191 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	114671893024647464854940764330803258143670742420971342061361052245448171440337	91	UVM_INFO @ 124898200 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	11802499992014346368517952574796520138550350758160898209270511186932141570507	15823	UVM_INFO @ 3230814105 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	43561825310394098121230385444320525486852111798087500917354897385421570668601	1769	UVM_INFO @ 3731329270 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	36803839226122326150826539410705726944466134940515930314034745603189632055625	249	UVM_INFO @ 17337623334 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	24640793716212982318498568375939111794823183967047626493600066266648883438107	11661	UVM_INFO @ 1292705585 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	73058451482950188276467420159398351356238211794933876171520131177414274197801	91	UVM_INFO @ 132749746 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	13908651966949204627429695067239999294185168249124711568188834627152492907769	91	UVM_INFO @ 496875406 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:677) [scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (* [] vs [*]) Interrupt_pin: OtpErr				14 test runs
	otp_ctrl_parallel_key_req	9817893276924874786380978347395647520975328015151861886858762835743039722798	16117	UVM_INFO @ 1601796738 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	83513374327035493253816471662377296589953773908765284693672752467144599221054	20682	UVM_INFO @ 9570524875 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	103753277304571217945391579416157571032989767343036990997485343505012283074323	2433	UVM_INFO @ 126929361 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	94569197974667590975311519481685154843152903787414597901701896953308398896799	11952	UVM_INFO @ 539151068 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_background_chks	48666199746811989028425330517881834296042619542087456077102486971103139942008	9434	UVM_INFO @ 1621222929 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	37222399008314374922247089073838479740598100169396158481212016815829659207695	7379	UVM_INFO @ 9166589223 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	93157659114220093935007641753290814876091135164698427478954666419458572776829	5741	UVM_INFO @ 190556429 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	36809870220185074603075357057110208215304591671179472823293226909901765803131	10053	UVM_INFO @ 577771930 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	4172337668515428459522010943045958341360196262583865635331569845540410922580	9210	UVM_INFO @ 1001884974 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	112162714659070912560066765171059922227859617644613231969615207627956583209047	10357	UVM_INFO @ 523112952 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	88918039399703545489697277680336857587192348576691244697969876852841828374589	32903	UVM_INFO @ 2375774799 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	23896875799059652316123953465023392104325484013580382232651280951703354070333	10658	UVM_INFO @ 5133415732 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	6571432710980191068170715467496583795481906871160424118208556159007959669134	11976	UVM_INFO @ 3948484437 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	105440949902523978350650385058431619427116005965394583920930436037423081485699	8907	UVM_INFO @ 368941651 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_WARNING (uvm_reg_field.svh:1191) [RegModel] Trying to predict value of field 'err_code' while register 'otp_ctrl_core_reg_block.err_code_*' is being accessed				6 test runs
	otp_ctrl_stress_all_with_rand_reset	23857990084770738284295296810594688544449687114941410135199756168551820544431	1942	UVM_INFO @ 376193834 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 376308421 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 376423008 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 376433425 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
	otp_ctrl_stress_all_with_rand_reset	29391233312706708115771240881732728643184731477666095056450896597366921346056	2568	UVM_INFO @ 1136707556 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 1136738807 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 1136832560 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 1136947147 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
	otp_ctrl_stress_all_with_rand_reset	115511378505770287611485772857564382381926895788114207940687305289141524862075	1190	UVM_INFO @ 5010298780 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 5010308780 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 5010348780 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 5010428780 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
	otp_ctrl_stress_all_with_rand_reset	28279932673135542413698200172592427652611847855085147012006267361450034102672	1082	UVM_INFO @ 384501616 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 384543282 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 384751612 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 385147439 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
	otp_ctrl_stress_all_with_rand_reset	102398460472174649824872992285104838445012856610028698336128091057365831603423	3377	UVM_INFO @ 7932013936 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 7938180615 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 7939013950 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 7947680634 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
	otp_ctrl_stress_all_with_rand_reset	101225531772999108170876838458594633344605553086614500344126631349899729403689	5693	UVM_INFO @ 4356129336 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 4356169336 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 4356609336 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 4356809336 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_ERROR (otp_ctrl_scoreboard.sv:964) [scoreboard] Check failed (csr.get_mirrored_value() \| status_mask) == (item.d_data \| status_mask) (* [] vs []) reg name: status, compare_mask				4 test runs
	otp_ctrl_parallel_lc_req	9998750846873427085849371376418409698592638146776238739245800024014765173250	9097	UVM_INFO @ 1439426973 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_req	99915227699410743862892929063904022463710286543390286724349498526689372128724	1672	UVM_INFO @ 138137010 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_req	14169641761697017116661595017477728451316354808691697980558144041321116518529	4802	UVM_INFO @ 860012611 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_req	97671458251314711313035948874009383206224308003690324935410668067238353943234	9395	UVM_INFO @ 1463659834 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:465) [otp_ctrl_common_vseq] wait timeout occurred!				3 test runs
	otp_ctrl_stress_all_with_rand_reset	57731298323688154344052149723693026672782219743776588209173816129655226245043	4157	UVM_INFO @ 10688691725 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	58448305145442324625943145123389332713790198621137650075176853393170407744121	6523	UVM_INFO @ 13137925750 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	60882195860459392657950024308103962202807547151265783081048886168928487439218	1408	UVM_INFO @ 10939325790 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [] vs []) dai addr ed* rdata* readout mismatch				2 test runs
	otp_ctrl_low_freq_read	45840882675954914569874200711071525647269288778241197908595438542901586832890	89	UVM_INFO @ 26639079434 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	51647101996490606690736268910115666342194565015179646033826376713457696763878	4219	UVM_INFO @ 63911174637 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1286) [otp_ctrl_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.				2 test runs
	otp_ctrl_stress_all_with_rand_reset	77650557404068526434494795467712338217268131693494707512063291050792440349298	4369	UVM_INFO @ 873052074 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	33081223666831898185975297094881143945286372428915692108634147240630590475101	20354	UVM_INFO @ 31780839023 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1326) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs [*]) reg name: otp_ctrl_core_reg_block.direct_access_regwen				1 test run
	otp_ctrl_stress_all_with_rand_reset	19912046277444250288227750287014826969870773578104110364181433163983128987344	3955	UVM_INFO @ 431649790 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [] vs []) dai addr rdata* readout mismatch				1 test run
	otp_ctrl_stress_all_with_rand_reset	43061330485746966249791833090678586814847864310371039339928531179854345590536	2039	UVM_INFO @ 16310510269 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [] vs []) dai addr e rdata* readout mismatch				1 test run
	otp_ctrl_stress_all_with_rand_reset	1413021180082742871861865358784751329869988230240357170822955204652843226421	95	UVM_INFO @ 7486719241 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1365) [otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [] vs [*]) fatal error fatal_macro_error does not trigger!				1 test run
	otp_ctrl_init_fail	29194646160820142788384051951757616001009021586404449051363944127028712742958	1180	UVM_INFO @ 157991253 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---