Simulation Results: aes/gcm_unmasked

 
14/08/2026 15:00:29 DVSim: v1.49.0 sha: d3fa90d json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 92.27 %
  • code
  • 94.12 %
  • assert
  • 98.13 %
  • func
  • 84.57 %
  • block
  • 94.71 %
  • line
  • 95.55 %
  • branch
  • 89.93 %
  • toggle
  • 98.08 %
  • FSM
  • 92.91 %
Validation stages
V1
100.00%
V2
93.58%
V2S
91.63%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 3.000s 78.756us 1 1 100.00
smoke 10 10 100.00
aes_smoke 3.000s 115.601us 10 10 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 2.000s 83.329us 1 1 100.00
csr_rw 5 5 100.00
aes_csr_rw 2.000s 66.423us 5 5 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 7.000s 551.716us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 2.000s 70.791us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
aes_csr_mem_rw_with_rand_reset 3.000s 151.541us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
aes_csr_rw 2.000s 66.423us 5 5 100.00
aes_csr_aliasing 2.000s 70.791us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 70 70 100.00
aes_smoke 3.000s 115.601us 10 10 100.00
aes_config_error 4.000s 304.943us 50 50 100.00
aes_stress 5.000s 401.203us 10 10 100.00
key_length 70 70 100.00
aes_smoke 3.000s 115.601us 10 10 100.00
aes_config_error 4.000s 304.943us 50 50 100.00
aes_stress 5.000s 401.203us 10 10 100.00
back2back 35 35 100.00
aes_stress 5.000s 401.203us 10 10 100.00
aes_b2b 10.000s 279.809us 25 25 100.00
backpressure 10 10 100.00
aes_stress 5.000s 401.203us 10 10 100.00
multi_message 90 95 94.74
aes_smoke 3.000s 115.601us 10 10 100.00
aes_config_error 4.000s 304.943us 50 50 100.00
aes_stress 5.000s 401.203us 10 10 100.00
aes_alert_reset 3601.000s 0.000us 20 25 80.00
failure_test 80 85 94.12
aes_man_cfg_err 3.000s 59.596us 10 10 100.00
aes_config_error 4.000s 304.943us 50 50 100.00
aes_alert_reset 3601.000s 0.000us 20 25 80.00
trigger_clear_test 10 10 100.00
aes_clear 5.000s 1345.669us 10 10 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 6.000s 1520.557us 1 1 100.00
reset_recovery 20 25 80.00
aes_alert_reset 3601.000s 0.000us 20 25 80.00
stress 10 10 100.00
aes_stress 5.000s 401.203us 10 10 100.00
sideload 20 20 100.00
aes_stress 5.000s 401.203us 10 10 100.00
aes_sideload 4.000s 123.773us 10 10 100.00
deinitialization 9 10 90.00
aes_deinit 1774.000s 200000.000us 9 10 90.00
stress_all 2 10 20.00
aes_stress_all 10843.000s 0.000us 2 10 20.00
alert_test 10 10 100.00
aes_alert_test 2.000s 58.589us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
aes_tl_errors 4.000s 89.037us 25 25 100.00
tl_d_illegal_access 25 25 100.00
aes_tl_errors 4.000s 89.037us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
aes_csr_hw_reset 2.000s 83.329us 1 1 100.00
aes_csr_rw 2.000s 66.423us 5 5 100.00
aes_csr_aliasing 2.000s 70.791us 1 1 100.00
aes_same_csr_outstanding 3.000s 129.977us 5 5 100.00
tl_d_partial_access 12 12 100.00
aes_csr_hw_reset 2.000s 83.329us 1 1 100.00
aes_csr_rw 2.000s 66.423us 5 5 100.00
aes_csr_aliasing 2.000s 70.791us 1 1 100.00
aes_same_csr_outstanding 3.000s 129.977us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 5 10 50.00
aes_reseed 5.000s 154.617us 5 10 50.00
fault_inject 593 660 89.85
aes_fi 1927.000s 200000.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 276 300 92.00
aes_cipher_fi 61.000s 0.000us 317 350 90.57
shadow_reg_update_error 20 20 100.00
aes_shadow_reg_errors 3.000s 428.133us 20 20 100.00
shadow_reg_read_clear_staged_value 20 20 100.00
aes_shadow_reg_errors 3.000s 428.133us 20 20 100.00
shadow_reg_storage_error 20 20 100.00
aes_shadow_reg_errors 3.000s 428.133us 20 20 100.00
shadowed_reset_glitch 20 20 100.00
aes_shadow_reg_errors 3.000s 428.133us 20 20 100.00
shadow_reg_update_error_with_csr_rw 20 20 100.00
aes_shadow_reg_errors_with_csr_rw 5.000s 308.911us 20 20 100.00
tl_intg_err 30 30 100.00
aes_sec_cm 6.000s 921.708us 5 5 100.00
aes_tl_intg_err 5.000s 703.633us 25 25 100.00
sec_cm_bus_integrity 25 25 100.00
aes_tl_intg_err 5.000s 703.633us 25 25 100.00
sec_cm_lc_escalate_en_intersig_mubi 20 25 80.00
aes_alert_reset 3601.000s 0.000us 20 25 80.00
sec_cm_main_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 428.133us 20 20 100.00
sec_cm_gcm_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 428.133us 20 20 100.00
sec_cm_main_config_sparse 135 145 93.10
aes_smoke 3.000s 115.601us 10 10 100.00
aes_stress 5.000s 401.203us 10 10 100.00
aes_alert_reset 3601.000s 0.000us 20 25 80.00
aes_core_fi 116.000s 10019.947us 95 100 95.00
sec_cm_gcm_config_sparse 155 160 96.88
aes_config_error 4.000s 304.943us 50 50 100.00
aes_stress 5.000s 401.203us 10 10 100.00
aes_core_fi 116.000s 10019.947us 95 100 95.00
sec_cm_aux_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 428.133us 20 20 100.00
sec_cm_aux_config_regwen 20 20 100.00
aes_readability 3.000s 84.439us 10 10 100.00
aes_stress 5.000s 401.203us 10 10 100.00
sec_cm_key_sideload 20 20 100.00
aes_stress 5.000s 401.203us 10 10 100.00
aes_sideload 4.000s 123.773us 10 10 100.00
sec_cm_key_sw_unreadable 10 10 100.00
aes_readability 3.000s 84.439us 10 10 100.00
sec_cm_data_reg_sw_unreadable 10 10 100.00
aes_readability 3.000s 84.439us 10 10 100.00
sec_cm_key_sec_wipe 10 10 100.00
aes_readability 3.000s 84.439us 10 10 100.00
sec_cm_iv_config_sec_wipe 10 10 100.00
aes_readability 3.000s 84.439us 10 10 100.00
sec_cm_data_reg_sec_wipe 10 10 100.00
aes_readability 3.000s 84.439us 10 10 100.00
sec_cm_data_reg_key_sca 10 10 100.00
aes_stress 5.000s 401.203us 10 10 100.00
sec_cm_key_masking 10 10 100.00
aes_stress 5.000s 401.203us 10 10 100.00
sec_cm_main_fsm_sparse 0 10 0.00
aes_fi 1927.000s 200000.000us 0 10 0.00
sec_cm_main_fsm_redun 618 685 90.22
aes_fi 1927.000s 200000.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 276 300 92.00
aes_cipher_fi 61.000s 0.000us 317 350 90.57
aes_ctr_fi 3.000s 120.228us 25 25 100.00
sec_cm_cipher_fsm_sparse 0 10 0.00
aes_fi 1927.000s 200000.000us 0 10 0.00
sec_cm_cipher_fsm_redun 593 660 89.85
aes_fi 1927.000s 200000.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 276 300 92.00
aes_cipher_fi 61.000s 0.000us 317 350 90.57
sec_cm_cipher_ctr_redun 317 350 90.57
aes_cipher_fi 61.000s 0.000us 317 350 90.57
sec_cm_ctr_fsm_sparse 0 10 0.00
aes_fi 1927.000s 200000.000us 0 10 0.00
sec_cm_ctr_fsm_redun 301 335 89.85
aes_fi 1927.000s 200000.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 276 300 92.00
aes_ctr_fi 3.000s 120.228us 25 25 100.00
sec_cm_ghash_fsm_sparse 0 10 0.00
aes_fi 1927.000s 200000.000us 0 10 0.00
sec_cm_ctrl_sparse 618 685 90.22
aes_fi 1927.000s 200000.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 276 300 92.00
aes_cipher_fi 61.000s 0.000us 317 350 90.57
aes_ctr_fi 3.000s 120.228us 25 25 100.00
sec_cm_main_fsm_global_esc 20 25 80.00
aes_alert_reset 3601.000s 0.000us 20 25 80.00
sec_cm_main_fsm_local_esc 618 685 90.22
aes_fi 1927.000s 200000.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 276 300 92.00
aes_cipher_fi 61.000s 0.000us 317 350 90.57
aes_ctr_fi 3.000s 120.228us 25 25 100.00
sec_cm_cipher_fsm_local_esc 618 685 90.22
aes_fi 1927.000s 200000.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 276 300 92.00
aes_cipher_fi 61.000s 0.000us 317 350 90.57
aes_ctr_fi 3.000s 120.228us 25 25 100.00
sec_cm_ctr_fsm_local_esc 301 335 89.85
aes_fi 1927.000s 200000.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 276 300 92.00
aes_ctr_fi 3.000s 120.228us 25 25 100.00
sec_cm_ghash_fsm_local_esc 0 10 0.00
aes_fi 1927.000s 200000.000us 0 10 0.00
sec_cm_data_reg_local_esc 593 660 89.85
aes_fi 1927.000s 200000.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 276 300 92.00
aes_cipher_fi 61.000s 0.000us 317 350 90.57
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 10 0.00
aes_stress_all_with_rand_reset 62.000s 11066.536us 0 10 0.00

Error Messages

   Test seed line log context
Job timed out after * minutes 26 test runs
aes_stress_all 87667926267776394892436657133967000627838979807773199109271861833020157733584 None
aes_stress_all 101619078682363049905634305979736994028584865031922329190595077066490302204356 None
aes_control_fi 33676595600818809699955002306151606946669374883539501810031286725958132184001 None
aes_stress_all 86591035581906002734134788626085959090566291571376708896842872780939491577510 None
aes_alert_reset 87637678607934553403834460284838158970338428294517889213496450667839624584011 None
aes_alert_reset 64995363400670724764819315127397695912061628088354031149275210769488712613210 None
aes_alert_reset 37076504220772017959709465930631695071048662834762985486992360278816953914481 None
aes_cipher_fi 80993504108197566068563512822717387454331451013100340547306872600260279215596 None
aes_control_fi 53070357552101782996020085767863624819070876224409379178524118650352264183540 None
aes_cipher_fi 87679300913765866190676332013743955183553145033117591348899932086816127980263 None
aes_control_fi 74446860240879403702960756080491161751543632627593066826711173292218624881505 None
aes_cipher_fi 12324912645236667469300473681447099063672467351339291626689179488712458844968 None
aes_control_fi 90110393793259793712850561750723530745917045752545327416832808554206581080073 None
aes_cipher_fi 108615789758986275105146321907896944297489129928515774251600323876330707854060 None
aes_cipher_fi 101534597450858498156390013836014105267850749496834122935145820440436932855472 None
aes_control_fi 6191479598039836097228345596242329179162722126877386125288749739124152773778 None
aes_cipher_fi 71110683626982164585371686392430060106355439367611443064189978766026584803853 None
aes_cipher_fi 24166896502022264655483871354412834268924015879169327686947156612588111552836 None
aes_cipher_fi 56553746246020585973918885821786109762909226389020427300776948320628930968011 None
aes_cipher_fi 42843848124707088872509967340149590075456697378626563108328098614776616736681 None
aes_cipher_fi 7980490054206336721348077123734358875052350517639663536388856863350004199796 None
aes_control_fi 98274547188300591127417385895593438183948223684297837693411032363980200084017 None
aes_cipher_fi 21991289687532956643122929728859429094370779639794659923571412108192127854040 None
aes_control_fi 62578668567919059021588370645254023073286805818575831158942917835783655984360 None
aes_control_fi 16964503286353541575245707969005939889027548362554231930646028445995997021376 None
aes_cipher_fi 38220739471773767797795908334393900601505981741380263658288147765740437029021 None
UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred! 17 test runs
aes_cipher_fi 97650562224153417345194129218449802238890989665054787939776104351356635248806 153
UVM_INFO @ 10008724063 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 54642004219482174472886792084012522786437298465319373753872703999262064478128 157
UVM_INFO @ 10003509545 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 102174738384586873188320353567599148850721112044960547095454966834176201466191 155
UVM_INFO @ 10035118181 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 46293499975810314988419055596797378053290997273356468555950657477507457937826 143
UVM_INFO @ 10008375172 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 92352334590118865231767009293124558809731918372556918097927828919806984670968 153
UVM_INFO @ 10013546022 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 67631019909823820099370041304362643139457541075601349733952108176236825789910 152
UVM_INFO @ 10009897260 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 68042259985055302016934819532804779234422315118898906483489460449660758461472 152
UVM_INFO @ 10008336989 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 18206870207099057673090542720497360223700367889804596853597761641558176118101 145
UVM_INFO @ 10007364466 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 72665577320689248819849541691361167902838367595680283433148028417148803303992 144
UVM_INFO @ 10011944552 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 76850261013778950870665960942002177507332547337758190141931529714763695632185 155
UVM_INFO @ 10009131474 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 78439807777440236356099737343559295712447821096433852342264648361547537243984 155
UVM_INFO @ 10016492863 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 83667202887645402591075062887183590080030513554934658697131137987486258491104 141
UVM_INFO @ 10023820123 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 64780411862438413871323283653736854282605787116370063961009948481649102176963 140
UVM_INFO @ 10005252685 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 22049367418113424275922154163760381002692741172277837572078881099548936883823 148
UVM_INFO @ 10087275467 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 39507545606831345125135940025954714039781422115207556996229735403380518537365 161
UVM_INFO @ 10014544866 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 77372420664159334837914688919050678613202751444617206211117551893452567505428 152
UVM_INFO @ 10003491674 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 90928511018938615787658912003239902129908673384282977796298970005622000342500 145
UVM_INFO @ 10004548658 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred! 16 test runs
aes_control_fi 82416721078088987186443336429292000697460824071773765494997586357572770839659 150
UVM_INFO @ 10012146694 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 108260269896849850922956794546708059364958768175529719852587785738036988418075 151
UVM_INFO @ 10005498244 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 11209913192332703631430002155156693086429979763265041783078819936450065746623 158
UVM_INFO @ 10006225499 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 111454189335355548897467163062987751438023825790105563311393667276837623039336 153
UVM_INFO @ 10016576033 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 114365784956656071900197985020932943161626546090857480216581315365048005443555 146
UVM_INFO @ 10008672989 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 105453801664169726805495450712315081654800182416922395847747334160546074478686 147
UVM_INFO @ 10005922849 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 32317512223805401663034701538827674577712755588733456245673017963832815360236 148
UVM_INFO @ 10004482576 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 45094696524490784586216505962912241339656586031680539838503983193486537245287 155
UVM_INFO @ 10006102462 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 82961136007782457359540959144137873401094956545846761735474174027723829096264 147
UVM_INFO @ 10035026822 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 87742731720309196377451955384083215955419499241773610237159985201061949901592 152
UVM_INFO @ 10011219805 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 21903213044154132939907710549225609220772952489804635779312980923858682924647 144
UVM_INFO @ 10006381697 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 106454781344615049612168530815161522415765605758098872624073103736812202411927 150
UVM_INFO @ 10023273469 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 108922826929003615378820815748591698957519959896875352116325665020242500676910 149
UVM_INFO @ 10008469888 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 88076541681030460725517025569747941413332211072138947764841458253850500759784 148
UVM_INFO @ 10008216598 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 105627111855465553967307697189414171239674853928803152653616423360587907146085 152
UVM_INFO @ 10009509123 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 37812922503016258282297299865314914189466868812574536832050266960492075515015 154
UVM_INFO @ 10018326731 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'parent_sequence' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues 13 test runs
aes_reseed 43403006055161309711373181643881653648784314840127682366276487607833166181514 1285
UVM_INFO @ 193270195 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 109103085576591103778992265115667391827009447597430940954588233460677414005978 2642
UVM_INFO @ 108831250 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_reseed 12757051983972893958656595159484499081015365232628730933381299146875936076168 3093
UVM_INFO @ 13911560 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_reseed 5376286052226245580320920119474319181082413930825427226681774185124027268000 2872
UVM_INFO @ 69960257 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 46051746379408758166386606374697774519416467836775324798544436492702074313129 4532
UVM_INFO @ 764328995 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 84534292189670084407774632033996441920253025568348641127320480805310060813422 4599
UVM_INFO @ 69693701 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 70340762267959888640759955271364470484975655588993566446518696987596492440265 26561
UVM_INFO @ 177274349 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 76515013949283516187083076154695834020634055844331888028866069143129164349743 1545
UVM_INFO @ 11066536180 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_reseed 67902409496864404463268990206405491411838170759618849780345064751416145329472 2131
UVM_INFO @ 11222557 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 81353989607071137091998080569630251369061597268294195204294010976860369455520 4311
UVM_INFO @ 18585399 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 82007794357872670938284706493105969727392738460419992674102489742490751062847 149
UVM_INFO @ 386698272 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 54390047370772544792412742831534307666982587290070602990458069872457529553885 706
UVM_INFO @ 1781385245 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_reseed 52790568527205863124694522266260586466089422380125977682635083101309229098565 5392
UVM_INFO @ 49032984 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue 7 test runs
aes_alert_reset 83919760778333740093729556753600599261711818510589006952956630439596422664177 1438494
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_fi 3514328159602216943171534444564957941948797207346738484925846258198912105729 2388497
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_deinit 6228412330269301539836566197370590389442934982672224349558041137398794716175 172
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_fi 439248605254051065956341381985516907933011281488661038268848441440676007816 5998477
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_fi 104456786511004821385576799983343641278635917767729182516221804312375383565030 3160202
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_fi 75778142366190494152849739341485184341759617402116735471946495885922554343212 15998580
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_alert_reset 2878101205851992876762811804455129220352446839871258489299522350810423094294 3836735
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_scoreboard.sv:923) scoreboard [scoreboard] 6 test runs
aes_fi 24631691484926639584717924612783992712351755818651765501894206152572218830266 3487
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 2
----| Expected corrupted: 0
aes_fi 55947791267793936789257695603874618035713846498895810857458298673117216587282 9027
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 4
----| Expected corrupted: 0
aes_fi 36761825867452867408600216466326073098207346750133954856078551965062361378014 6601
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 5
----| Expected corrupted: 0
aes_fi 47018986629254649373005534054382144647729613209586120008252734432606929638984 6734
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 5
----| Expected corrupted: 0
aes_fi 100011938349405756150888112057700743730777574380158956954393033032456690288482 4783
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 2
----| Expected corrupted: 0
aes_fi 109274001248075133600153772429540495336552747158213058618515634964369801665510 10059
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 5
----| Seen: 4
----| Expected corrupted: 0
UVM_FATAL (cip_base_vseq.sv:1230) [aes_common_vseq] Check failed (vseq_done) 4 test runs
aes_stress_all_with_rand_reset 97677802016003780304483969505658195063872050991238061918064702508758010609468 138
UVM_INFO @ 14398821 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 33692792305165992854304634484223582347932564469724774230628037327958499984333 207
UVM_INFO @ 52605760 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 18236375634297587280194740279249655272303352106454424956506042189870167891996 189
UVM_INFO @ 85435816 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 64308005103931651681155046599287330526256943333653008651920045631026373746578 150
UVM_INFO @ 34154508 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_core_fi_vseq.sv:70) [aes_core_fi_vseq] wait timeout occurred! 4 test runs
aes_core_fi 53326496239958253236184287939986110507184851165610394472034859107420613430753 148
UVM_INFO @ 10003509364 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 87794672314287587923588470601321922774791988754401791590323205529370411229000 146
UVM_INFO @ 10007319520 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 2542327723595240948311821720221293032939880103915799000915097800149337193209 145
UVM_INFO @ 10003865732 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 99407590029479051712700091213319680905604392762211902249857024569350416988959 151
UVM_INFO @ 10010088794 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:623) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=4) 2 test runs
aes_cipher_fi 9379503748198329194937591058588936324173373324150413341853760986622706764736 141
UVM_INFO @ 10018046476 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 45236417158646976437818167142643396449238218812909018274869190247736870425676 138
UVM_INFO @ 10010735863 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_base_vseq.sv:87) [aes_reseed_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) 1 test run
aes_stress_all_with_rand_reset 100122208754994411497779122427175856013503591404456766582061365803665853316208 114
UVM_INFO @ 30859109 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_base_vseq.sv:87) [aes_stress_all_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) 1 test run
aes_stress_all_with_rand_reset 115424616978079343474085788885160485935667057624259917683417015802739793171506 112
UVM_INFO @ 4436818 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_base_vseq.sv:97) [aes_stress_all_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) 1 test run
aes_stress_all_with_rand_reset 26836887883184367817953369460391103662132067890949665200723618556456714196070 112
UVM_INFO @ 10685802 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:623) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=9) 1 test run
aes_core_fi 90074417165338400250861986960629732988283839080657400665632806012124257500979 146
UVM_INFO @ 10019947485 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:623) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=5) 1 test run
aes_cipher_fi 76359111641695997920889107815330799943169452218193040880372382299982392166999 142
UVM_INFO @ 10081550678 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:623) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=6) 1 test run
aes_cipher_fi 75934210773165857064344603728188136579333987001769727327890937593290135254018 139
UVM_INFO @ 10016974111 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---