Simulation Results

Simulation Results: otp_ctrl

14/08/2026 15:00:29 DVSim: v1.49.0 sha: d3fa90d json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
86.43 %

code
81.21 %

assert
95.22 %

func
82.85 %

line
88.63 %

branch
86.97 %

cond
88.73 %

toggle
88.21 %

FSM
53.49 %

Validation stages

V1		84.62%
V2		70.52%
V2S		71.82%
V3		16.83%

22/26 passed

84.62 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
wake_up				1	1	100.00
	otp_ctrl_wake_up	2.320s	135.879us	1	1	100.00
smoke				7	10	70.00
	otp_ctrl_smoke	12.090s	1278.663us	7	10	70.00
csr_hw_reset				1	1	100.00
	otp_ctrl_csr_hw_reset	3.160s	115.115us	1	1	100.00
csr_rw				5	5	100.00
	otp_ctrl_csr_rw	2.080s	107.959us	5	5	100.00
csr_bit_bash				1	1	100.00
	otp_ctrl_csr_bit_bash	8.550s	2127.872us	1	1	100.00
csr_aliasing				1	1	100.00
	otp_ctrl_csr_aliasing	4.520s	89.866us	1	1	100.00
csr_mem_rw_with_rand_reset				4	5	80.00
	otp_ctrl_csr_mem_rw_with_rand_reset	3.380s	222.505us	4	5	80.00
regwen_csr_and_corresponding_lockable_csr				6	6	100.00
	otp_ctrl_csr_rw	2.080s	107.959us	5	5	100.00
	otp_ctrl_csr_aliasing	4.520s	89.866us	1	1	100.00
mem_walk				1	1	100.00
	otp_ctrl_mem_walk	2.350s	42.457us	1	1	100.00
mem_partial_access				1	1	100.00
	otp_ctrl_mem_partial_access	1.990s	625.608us	1	1	100.00

531/753 passed

70.52 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
dai_access_partition_walk				0	1	0.00
	otp_ctrl_partition_walk	127.020s	7111.536us	0	1	0.00
init_fail				212	300	70.67
	otp_ctrl_init_fail	6.850s	2879.676us	212	300	70.67
partition_check				17	60	28.33
	otp_ctrl_background_chks	14.210s	802.687us	4	10	40.00
	otp_ctrl_check_fail	29.150s	11351.502us	13	50	26.00
regwen_during_otp_init				15	30	50.00
	otp_ctrl_regwen	13.280s	6193.011us	15	30	50.00
partition_lock				7	30	23.33
	otp_ctrl_dai_lock	30.290s	6380.419us	7	30	23.33
interface_key_check				5	10	50.00
	otp_ctrl_parallel_key_req	34.730s	2757.974us	5	10	50.00
lc_interactions				193	210	91.90
	otp_ctrl_parallel_lc_req	16.970s	3239.311us	6	10	60.00
	otp_ctrl_parallel_lc_esc	62.830s	33190.764us	187	200	93.50
otp_dai_errors				20	25	80.00
	otp_ctrl_dai_errs	82.610s	47296.765us	20	25	80.00
otp_macro_errors				3	10	30.00
	otp_ctrl_macro_errs	32.950s	19566.750us	3	10	30.00
test_access				1	10	10.00
	otp_ctrl_test_access	15.270s	504.487us	1	10	10.00
stress_all				1	10	10.00
	otp_ctrl_stress_all	101.710s	14817.400us	1	10	10.00
intr_test				10	10	100.00
	otp_ctrl_intr_test	2.210s	134.044us	10	10	100.00
alert_test				10	10	100.00
	otp_ctrl_alert_test	3.000s	916.971us	10	10	100.00
tl_d_oob_addr_access				25	25	100.00
	otp_ctrl_tl_errors	7.130s	420.931us	25	25	100.00
tl_d_illegal_access				25	25	100.00
	otp_ctrl_tl_errors	7.130s	420.931us	25	25	100.00
tl_d_outstanding_access				12	12	100.00
	otp_ctrl_csr_hw_reset	3.160s	115.115us	1	1	100.00
	otp_ctrl_csr_rw	2.080s	107.959us	5	5	100.00
	otp_ctrl_csr_aliasing	4.520s	89.866us	1	1	100.00
	otp_ctrl_same_csr_outstanding	4.810s	1606.424us	5	5	100.00
tl_d_partial_access				12	12	100.00
	otp_ctrl_csr_hw_reset	3.160s	115.115us	1	1	100.00
	otp_ctrl_csr_rw	2.080s	107.959us	5	5	100.00
	otp_ctrl_csr_aliasing	4.520s	89.866us	1	1	100.00
	otp_ctrl_same_csr_outstanding	4.810s	1606.424us	5	5	100.00

V2S

474/660 passed

71.82 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
sec_cm_additional_check				5	5	100.00
	otp_ctrl_sec_cm	397.230s	27333.195us	5	5	100.00
tl_intg_err				30	30	100.00
	otp_ctrl_sec_cm	397.230s	27333.195us	5	5	100.00
	otp_ctrl_tl_intg_err	47.720s	23655.905us	25	25	100.00
prim_count_check				5	5	100.00
	otp_ctrl_sec_cm	397.230s	27333.195us	5	5	100.00
prim_fsm_check				5	5	100.00
	otp_ctrl_sec_cm	397.230s	27333.195us	5	5	100.00
sec_cm_bus_integrity				25	25	100.00
	otp_ctrl_tl_intg_err	47.720s	23655.905us	25	25	100.00
sec_cm_secret_mem_scramble				7	10	70.00
	otp_ctrl_smoke	12.090s	1278.663us	7	10	70.00
sec_cm_part_mem_digest				7	10	70.00
	otp_ctrl_smoke	12.090s	1278.663us	7	10	70.00
sec_cm_dai_fsm_sparse				5	5	100.00
	otp_ctrl_sec_cm	397.230s	27333.195us	5	5	100.00
sec_cm_kdi_fsm_sparse				5	5	100.00
	otp_ctrl_sec_cm	397.230s	27333.195us	5	5	100.00
sec_cm_lci_fsm_sparse				5	5	100.00
	otp_ctrl_sec_cm	397.230s	27333.195us	5	5	100.00
sec_cm_part_fsm_sparse				5	5	100.00
	otp_ctrl_sec_cm	397.230s	27333.195us	5	5	100.00
sec_cm_scrmbl_fsm_sparse				5	5	100.00
	otp_ctrl_sec_cm	397.230s	27333.195us	5	5	100.00
sec_cm_timer_fsm_sparse				5	5	100.00
	otp_ctrl_sec_cm	397.230s	27333.195us	5	5	100.00
sec_cm_dai_ctr_redun				5	5	100.00
	otp_ctrl_sec_cm	397.230s	27333.195us	5	5	100.00
sec_cm_kdi_seed_ctr_redun				5	5	100.00
	otp_ctrl_sec_cm	397.230s	27333.195us	5	5	100.00
sec_cm_kdi_entropy_ctr_redun				5	5	100.00
	otp_ctrl_sec_cm	397.230s	27333.195us	5	5	100.00
sec_cm_lci_ctr_redun				5	5	100.00
	otp_ctrl_sec_cm	397.230s	27333.195us	5	5	100.00
sec_cm_part_ctr_redun				5	5	100.00
	otp_ctrl_sec_cm	397.230s	27333.195us	5	5	100.00
sec_cm_scrmbl_ctr_redun				5	5	100.00
	otp_ctrl_sec_cm	397.230s	27333.195us	5	5	100.00
sec_cm_timer_integ_ctr_redun				5	5	100.00
	otp_ctrl_sec_cm	397.230s	27333.195us	5	5	100.00
sec_cm_timer_cnsty_ctr_redun				5	5	100.00
	otp_ctrl_sec_cm	397.230s	27333.195us	5	5	100.00
sec_cm_timer_lfsr_redun				5	5	100.00
	otp_ctrl_sec_cm	397.230s	27333.195us	5	5	100.00
sec_cm_dai_fsm_local_esc				192	205	93.66
	otp_ctrl_parallel_lc_esc	62.830s	33190.764us	187	200	93.50
	otp_ctrl_sec_cm	397.230s	27333.195us	5	5	100.00
sec_cm_lci_fsm_local_esc				187	200	93.50
	otp_ctrl_parallel_lc_esc	62.830s	33190.764us	187	200	93.50
sec_cm_kdi_fsm_local_esc				187	200	93.50
	otp_ctrl_parallel_lc_esc	62.830s	33190.764us	187	200	93.50
sec_cm_part_fsm_local_esc				190	210	90.48
	otp_ctrl_parallel_lc_esc	62.830s	33190.764us	187	200	93.50
	otp_ctrl_macro_errs	32.950s	19566.750us	3	10	30.00
sec_cm_scrmbl_fsm_local_esc				187	200	93.50
	otp_ctrl_parallel_lc_esc	62.830s	33190.764us	187	200	93.50
sec_cm_timer_fsm_local_esc				192	205	93.66
	otp_ctrl_parallel_lc_esc	62.830s	33190.764us	187	200	93.50
	otp_ctrl_sec_cm	397.230s	27333.195us	5	5	100.00
sec_cm_dai_fsm_global_esc				192	205	93.66
	otp_ctrl_parallel_lc_esc	62.830s	33190.764us	187	200	93.50
	otp_ctrl_sec_cm	397.230s	27333.195us	5	5	100.00
sec_cm_lci_fsm_global_esc				187	200	93.50
	otp_ctrl_parallel_lc_esc	62.830s	33190.764us	187	200	93.50
sec_cm_kdi_fsm_global_esc				187	200	93.50
	otp_ctrl_parallel_lc_esc	62.830s	33190.764us	187	200	93.50
sec_cm_part_fsm_global_esc				190	210	90.48
	otp_ctrl_parallel_lc_esc	62.830s	33190.764us	187	200	93.50
	otp_ctrl_macro_errs	32.950s	19566.750us	3	10	30.00
sec_cm_scrmbl_fsm_global_esc				187	200	93.50
	otp_ctrl_parallel_lc_esc	62.830s	33190.764us	187	200	93.50
sec_cm_timer_fsm_global_esc				192	205	93.66
	otp_ctrl_parallel_lc_esc	62.830s	33190.764us	187	200	93.50
	otp_ctrl_sec_cm	397.230s	27333.195us	5	5	100.00
sec_cm_part_data_reg_integrity				212	300	70.67
	otp_ctrl_init_fail	6.850s	2879.676us	212	300	70.67
sec_cm_part_data_reg_bkgn_chk				13	50	26.00
	otp_ctrl_check_fail	29.150s	11351.502us	13	50	26.00
sec_cm_part_mem_regren				7	30	23.33
	otp_ctrl_dai_lock	30.290s	6380.419us	7	30	23.33
sec_cm_part_mem_sw_unreadable				7	30	23.33
	otp_ctrl_dai_lock	30.290s	6380.419us	7	30	23.33
sec_cm_part_mem_sw_unwritable				7	30	23.33
	otp_ctrl_dai_lock	30.290s	6380.419us	7	30	23.33
sec_cm_lc_part_mem_sw_noaccess				7	30	23.33
	otp_ctrl_dai_lock	30.290s	6380.419us	7	30	23.33
sec_cm_access_ctrl_mubi				7	30	23.33
	otp_ctrl_dai_lock	30.290s	6380.419us	7	30	23.33
sec_cm_token_valid_ctrl_mubi				7	10	70.00
	otp_ctrl_smoke	12.090s	1278.663us	7	10	70.00
sec_cm_lc_ctrl_intersig_mubi				7	30	23.33
	otp_ctrl_dai_lock	30.290s	6380.419us	7	30	23.33
sec_cm_test_bus_lc_gated				7	10	70.00
	otp_ctrl_smoke	12.090s	1278.663us	7	10	70.00
sec_cm_test_tl_lc_gate_fsm_sparse				5	5	100.00
	otp_ctrl_sec_cm	397.230s	27333.195us	5	5	100.00
sec_cm_direct_access_config_regwen				15	30	50.00
	otp_ctrl_regwen	13.280s	6193.011us	15	30	50.00
sec_cm_check_trigger_config_regwen				7	10	70.00
	otp_ctrl_smoke	12.090s	1278.663us	7	10	70.00
sec_cm_check_config_regwen				7	10	70.00
	otp_ctrl_smoke	12.090s	1278.663us	7	10	70.00
sec_cm_macro_mem_integrity				3	10	30.00
	otp_ctrl_macro_errs	32.950s	19566.750us	3	10	30.00

17/101 passed

16.83 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
otp_ctrl_low_freq_read				0	1	0.00
	otp_ctrl_low_freq_read	94.240s	69382.506us	0	1	0.00
stress_all_with_rand_reset				17	100	17.00
	otp_ctrl_stress_all_with_rand_reset	185.560s	19320.744us	17	100	17.00

Error Messages

	Test	seed	line	log context
UVM_ERROR (csr_utils_pkg.sv:461) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_] Check failed obs == exp ( [] vs []) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value:				106 test runs
	otp_ctrl_init_fail	81088549777003321732844804091659586118942878019617578992536724230963080194942	187	UVM_INFO @ 796591694 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	44282193324344174093856521833408115678195462259434823470767401347007595565157	2692	UVM_INFO @ 358400876 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	97185607079029447081617948575299095842386710990789176100971655979999464239700	2259	UVM_INFO @ 86426076 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	54764250826528069268614489753948483466436259206626067539219249610151847490445	3268	UVM_INFO @ 176002844 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_smoke	98717435537046580641722376140041712927810791592406447510505775452732614402222	8986	UVM_INFO @ 418818070 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	21000561096034819957416677054171178963447382059244664871304915694517393093000	1266	UVM_INFO @ 813036943 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_smoke	76282312006514982422497786419191665997581711370486408832625510460800469862665	6986	UVM_INFO @ 968551695 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	31033979780492585707698966677957571542639267156538151016633316930528329186028	1793	UVM_INFO @ 974328089 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	63338232152349123157078973853334716338130841497015655013369280214647860088350	2804	UVM_INFO @ 1809012423 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	66375750467415798174056171747762481291058913529077142081082413389199370411155	1180	UVM_INFO @ 102096793 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_smoke	61532887132667881948692584919515945393837048730295616163097369176926711911086	584	UVM_INFO @ 145451800 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	19827938480395576487249178449322382800292291575675773620317743111970930115544	1358	UVM_INFO @ 272773714 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	70465904035805835261037686693845108645772147335330306382635150172748542829161	189	UVM_INFO @ 67314975 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	93574764434727341650261646217784449421172312212294830802795314213227035245853	4532	UVM_INFO @ 1823418184 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	107149731512648078236474711591503108340792436203545022742531209894474781733025	318	UVM_INFO @ 256154448 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	30392059932721149636795611906490027145277146190087196607795098283237281347598	2468	UVM_INFO @ 1125042723 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	65657459276894010258563138069487631465576268456103499633042078683979707661233	1618	UVM_INFO @ 278792758 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	5039439952916313088806668773542592337256267853624789803961814068177489521362	2770	UVM_INFO @ 321303450 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	108894324565942784457717168762408373316067259760585798143280605838538004701917	5730	UVM_INFO @ 264667079 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	49242250228754959384456707732416738345044989295028325331879797847764093549425	355	UVM_INFO @ 101353829 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	59211162569030044061447282560471743594522606385315717591704968744801674144601	7658	UVM_INFO @ 280964885 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	80316428990289542194771673565744721510200024002046963879256976036787253686204	7232	UVM_INFO @ 468001687 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	75620838515196306558983511569856545512841505790904187246290565602706010729892	1949	UVM_INFO @ 993814528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_regwen	41360938852558033816779520336351858900823869448164249423673227879525549035644	10878	UVM_INFO @ 1181929829 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	13869289683177723746313385302088153410498075172186187010835493396433287255995	939	UVM_INFO @ 66331188 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	84562245817876109019865522326385352155460859758377396289749184480157314364333	311	UVM_INFO @ 748900074 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	5144381300045802422581915326053412588780244604502333880138886280667554449512	557	UVM_INFO @ 678235144 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	99862089120574347290693399744270963297500269995541170216592598150339183826168	105	UVM_INFO @ 164350585 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	38958442007114260846310169594047804699169456284888624773402173136695419762885	945	UVM_INFO @ 91817579 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	36185500420648544464422534071944998188195410250417388136179306406140347557070	271	UVM_INFO @ 33886625 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	69201218937073999212169099399279994698106547746882412351840035970067914244444	523	UVM_INFO @ 637788584 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	79997031992169222711115449641022674654015145225012554302861144232838058069599	205	UVM_INFO @ 62672036 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	32467010373073012563492971878242943108058361757281790839286382125697896643278	1267	UVM_INFO @ 157169743 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	68876869658505538715848352137637542320783789640859341022918370784955101297535	273	UVM_INFO @ 545033446 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	77261480163377850369938602099336554656869955650534702567712089617639634454239	873	UVM_INFO @ 45475352 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	32619779085514989115624033442750265465367005982692690349631966350602095877324	827	UVM_INFO @ 704034338 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	53274189067660949692346555586602802096111492335233194780912880354148071832656	231	UVM_INFO @ 133602612 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	45186008000542981831493631353806578095935323134010332974429809111453396734172	755	UVM_INFO @ 45755108 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	53371357620751904519861061797901458221237984091245051648227685150063159176077	205	UVM_INFO @ 612910462 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	61358892323898754977302426628407834596769498164514154645936386013729677142409	1037	UVM_INFO @ 95485451 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	22081819849826567229965158919714097048318566897052435020864473325697359699832	1477	UVM_INFO @ 104953628 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	81466384979337138075884078591671198069927407657717122039085338752464682105628	3303	UVM_INFO @ 272112599 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	62996678791869041366716561113966372871552100029063803153750911202892101122057	1231	UVM_INFO @ 56558619 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	37644671819562244367698454397757245892677876868522411726407453318364525833085	2571	UVM_INFO @ 151628769 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	17280202735985947390486174742455387034412868961241317331430750087211926652887	541	UVM_INFO @ 38148743 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	47436014176705344021608457003482762529781753918464108143277729016153947842820	1677	UVM_INFO @ 931447843 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	91050234100127663125991533344976731288104818892205864732304735741530977282085	2121	UVM_INFO @ 125761002 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	62984797706474302319501299376505987148335977130778101949551193891335931500442	1325	UVM_INFO @ 52438106 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	59301307500592515051998050735465573642682436341256926325702681775215418988137	147	UVM_INFO @ 529179405 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	110850993656300288443378900975807100704154265136272316873150027359521199292067	2909	UVM_INFO @ 1548199138 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	23191162534904182769665087698792282648716004662057825136650514040839158054940	147	UVM_INFO @ 194098259 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	45860768818566171789079776661885658565029349987334623396253575988545714359394	1539	UVM_INFO @ 227233222 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	32109330842706615819074477709584861375241402077894862917412487150671816537414	641	UVM_INFO @ 224002355 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	95928567033131072041695550935740117043464182928252302357551834482170545330409	455	UVM_INFO @ 74854888 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	24335190009789434584217050978558086930977978423643672724314634220485635938472	373	UVM_INFO @ 79590943 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	30102874659734701451716657832094796046671280635746288056572071638550983102321	147	UVM_INFO @ 607978140 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	78188381200643519778532772699897990145632704535573928575772585023850501310903	1051	UVM_INFO @ 996620344 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	6859963141341598431584511230062523316133864208861226653190853692984223716556	1271	UVM_INFO @ 109810207 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	108735347038860666477966249692592114739639575427268777323520927733674192213157	105	UVM_INFO @ 51872391 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	21125467292471404161172382500154770966454758302042515148979207285143157318863	415	UVM_INFO @ 97288156 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	114129931730818499552576569473755330637967273987978163291371281728538554784441	231	UVM_INFO @ 67859139 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	106821820660870764438050201789530716235998208143166957511421878701314819259004	1655	UVM_INFO @ 114113428 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	38840190478420986506904614958840396153682656285451168015818487430384023789600	397	UVM_INFO @ 597481428 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	18247053326157125150042754656510660690095077466436239936436838334517335743438	147	UVM_INFO @ 127987607 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	39206815960483384102278978599653258906035774502358760844543160932364206970193	373	UVM_INFO @ 124342627 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	86192845892398129722163566549031438121942367449606828478455648857671197712	2367	UVM_INFO @ 155238703 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	21519949753391862660422249191421756145324299831202175848513728125675952719387	2027	UVM_INFO @ 72167616 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	90127533977568459747527319333422624273440611882605906071502992227460914934590	247	UVM_INFO @ 191826932 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	91929200931891849877002027854625740499256136809124267266655973537893820963319	991	UVM_INFO @ 50278971 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	59723832548934797483136735924308803126641742709629221509804102729829674871464	993	UVM_INFO @ 81054190 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	60234225234552257796682032079613535046059374975561634027177596795005147079232	619	UVM_INFO @ 131730020 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	41277843561315530243939901173649120658531713599010792878136369431149319063737	949	UVM_INFO @ 148997946 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	30035078402397879338431251673085859897633300436101207813792833543440410071680	1137	UVM_INFO @ 47978853 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	20629319362562060950943371746200193868457285392756991006134482808993524838518	357	UVM_INFO @ 42795266 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	108887939214163160812354561992580351748015554935857212539920388514968148138783	1041	UVM_INFO @ 136442763 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	40157402191297901001020236182116124217327818738853652947535104576174372009380	1219	UVM_INFO @ 99735564 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	28589254125976596614702013384776698356995755311145136828674361117492907142269	327	UVM_INFO @ 581570322 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	77738378353291126653837141573637605568301775943603648516011337955905296803463	583	UVM_INFO @ 41867980 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	30832345384381664072982517375627608718672991572879563311455851503813994559744	331	UVM_INFO @ 576801300 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	93614000951147768482785764038102854966314358232988487452868187512985904921633	1495	UVM_INFO @ 78916603 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	53798482412188316202886998780395816157850707998300356405958462497821258533553	105	UVM_INFO @ 166099345 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	86892010938198517509256079925102520404185734533202223494049343709474627251793	1905	UVM_INFO @ 79047684 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	41520977358382983646106585663580324248472979147266115891556060787055188811086	1569	UVM_INFO @ 70290000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	35507133269811616386576727870444079465034714710143267096495687125203218497244	147	UVM_INFO @ 529265667 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	30086467120168878671949731465728036075760453845144520994962505510449553967432	679	UVM_INFO @ 164195417 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	94355465419489239471188280576671406917416727524237723921236069637397943947578	105	UVM_INFO @ 32105449 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	58353193237509913688562168735281223748025496450562474693854603583570281598103	331	UVM_INFO @ 34761762 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	53458585261893992123272483177010831109793228085202495357945738440108001104081	455	UVM_INFO @ 128409677 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	77590382280071055470917081076457569671866877364791362708583905356725533091307	415	UVM_INFO @ 150284303 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	43379930920712825107865774434015340805948929097721541023827569036384190837995	1243	UVM_INFO @ 113924507 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	104358657345283059053940183372721389695989834895032533155281760444116851602761	739	UVM_INFO @ 122305651 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	31972809693069625701269885247503017249208451814420698664424038283850016262836	2423	UVM_INFO @ 202942048 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	47058760163654579331840542706301718296652405226667624067849190148600052458041	1399	UVM_INFO @ 58066811 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	67897665846331207848441397781415171957520694144859302380034957965449053791804	1373	UVM_INFO @ 168832087 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	30980619180619112377100167290305236730935136869946603154445856022569440661696	907	UVM_INFO @ 48299849 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	16937626494290900938751889078963759458041517444141967337445614401598567590758	825	UVM_INFO @ 86127081 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	67362431953513007800996741017262837419499895338980705324892052651696375410450	641	UVM_INFO @ 1032813988 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	67228669033787198241232584613824362820664051948702473082540065947570401218529	651	UVM_INFO @ 809323229 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	99279549626412235365167752934128278531089743307636293451830857148796649767024	147	UVM_INFO @ 771740361 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	43049689324541993590681903335472930744477138225438134131089656632820548930897	1041	UVM_INFO @ 138645555 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	16833599786853557380068304166047608721415887490153769844795873833199072498022	105	UVM_INFO @ 668802080 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	79471010102391095254175641338375148075558270382545334468754959838802376743742	483	UVM_INFO @ 621414696 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	59246596945569303198575621411904476308728649123494764470103172898289000484301	665	UVM_INFO @ 83873309 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	10713557785803576709033280697780264593308216719843779195248477873852939618441	313	UVM_INFO @ 964444650 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	31511363541145216242357275741006607313288965376772246413663469883801473348640	1913	UVM_INFO @ 61984728 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_init_fail	37756697555734928968777504967326611525151922747780223949935250338445691572087	105	UVM_INFO @ 56357141 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1323) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs []) reg name: otp_ctrl_core_reg_block.err_code_				72 test runs
	otp_ctrl_background_chks	98192033467501037636738413771727599792208504426997685908741449799593898740834	744	UVM_INFO @ 116655770 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	96730079831903227183909698661345240630777451892284324296199453006411851104695	901	UVM_INFO @ 78169020 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_background_chks	105712101159164177911149239650136014672875083151959311811008828947471067065506	1878	UVM_INFO @ 116975500 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_errs	106402020790844581728812625408901071522305153674494409126560527874149877865531	680	UVM_INFO @ 102694610 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	90300847781342306639646437671545157696462438690802780195460448781651206819545	626	UVM_INFO @ 98143649 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_key_req	77299711951638806245355450928848847274284658930396089241133755523122118993154	1222	UVM_INFO @ 173430539 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	95314794131241842682080124419479248196114094103758913243347231484226115997457	2076	UVM_INFO @ 308552120 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	107195117780926220776602371530598883374840142248633323432828964358888632850849	1800	UVM_INFO @ 325462413 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_background_chks	79323639545675061950057050588863939427603167251026010996817509012163197178760	1510	UVM_INFO @ 1180653184 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	9238643222015937299344658452523545735847006830384507245476704580287781638873	388	UVM_INFO @ 59129434 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	104141393626115806065290028271564915562871575641713367120436233984205724550176	7679	UVM_INFO @ 2081750473 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	14520154329112845834308273205620332512798070000255626209769123041051008725734	2566	UVM_INFO @ 1334386856 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_key_req	55748556125535419058402215328742643157472159500271699073841189496093682021734	788	UVM_INFO @ 84031398 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	11926038071682780961552862286517887263711126109881980833839062816799927654680	1754	UVM_INFO @ 183806749 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	62891149595156823860532142159668779088556104973941610259816015157781861833464	3207	UVM_INFO @ 1155973162 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_key_req	37068223586590079750097436740898503550296245419171720969484128022841163676181	560	UVM_INFO @ 157335764 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	113605786414280784279523886553611643537155158543434600668158458120977464479435	1196	UVM_INFO @ 128501471 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	99246020303670865663912169077579893432798383795170634996266328824017466538908	2932	UVM_INFO @ 1547585218 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	16454807479147196766880529371617883110295290063090602879265764113799748185506	1781	UVM_INFO @ 720530563 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	28276508371014912363006225919023372423371811215660991736820667600822529788209	7312	UVM_INFO @ 3690484619 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	113513551532396471500701064290365939612440714070515651696002689363647135994596	1486	UVM_INFO @ 54912245 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_key_req	115621566715841613171495438028492396780504623187884284635371588933309750882374	652	UVM_INFO @ 1505547282 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	41129925623577666029545203568909371049080061533359663835349226846644713947310	1214	UVM_INFO @ 281306137 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	56735439534835028074160213426579885869693498860491207875682546510329317243507	4545	UVM_INFO @ 454052102 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	88660763089501970117386277742742141316078536034128663614485570339264283793429	13306	UVM_INFO @ 3688039262 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	93570021911602474691069268550516628345253297499152314649348241719970704069536	1486	UVM_INFO @ 305909881 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	7132276170197573110545483296027770475771436328867449623674724603818997520764	5397	UVM_INFO @ 374786297 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	54816510648372603679596587151561647481613983741435116466165003994976765969262	4279	UVM_INFO @ 314074460 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	106302135463532967142639793643631627678374687910482665234802018747534956814622	9441	UVM_INFO @ 520997487 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	85808922218864395113113259203416670925893810098688101039503176998145735954855	2803	UVM_INFO @ 504603871 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	86950453896233767481869858270601697031238038049816172164298218242816288461245	1620	UVM_INFO @ 480803795 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	18622086179262545274907597820801815972423669067534810241621345748726032323271	342	UVM_INFO @ 9133848726 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	672988507640694775504688914118486082732165782087508492228849631149895162418	17076	UVM_INFO @ 22077246547 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	2391705730937804430241245682078312844188813843839757561516030150561183345893	11244	UVM_INFO @ 1560209218 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	14218565405748729125869352080299470687246998969862597281429740006533444378121	1528	UVM_INFO @ 488605005 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_errs	79154112358277931886287955322088383820887778965482729821019955285071738936144	4888	UVM_INFO @ 180128064 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	78543172154919625191959530196011756993388487682405596807933086573023407720242	8832	UVM_INFO @ 699734220 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	89698859675401252972235818619733950763162741784311070915300796507421283810509	11132	UVM_INFO @ 2605364188 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	7095336293584274155379598171796849167036184419901330259705345868213241657698	434	UVM_INFO @ 118110480 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	47542450061410694122745203103537899007678751230694874171618276417133107303226	8728	UVM_INFO @ 10254147295 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	67366436460891154551512666965278130459935339886494032164629946839148020370364	5499	UVM_INFO @ 479633520 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	4401545732375637280091943272572464359225832512960705982272379204266768533614	994	UVM_INFO @ 253865643 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	71298793854480148730791111536984683798370862809697133092009137695552775619703	2786	UVM_INFO @ 164436064 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	100832093116047353055364013413523788582132192369729493822135349533773412732256	4985	UVM_INFO @ 2708006083 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	113460215516309763601627688777348226921606403472847961208981031669123284089614	694	UVM_INFO @ 259244513 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	53712552606115257166014844873006337502610973223440376526419217533687198821560	1246	UVM_INFO @ 304498111 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	91866501488949988141479624583399770509650418974161109032127337597352679192474	1240	UVM_INFO @ 111420500 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	70867466792333441864889240568586862167722493883234989461840200590888718237854	1054	UVM_INFO @ 196070683 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	89475782143095176184201511936472895382923437304781973302998400972234422192050	7254	UVM_INFO @ 1058040780 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	86932332016000516387173524016503367601885821508282791237740023803637109278210	964	UVM_INFO @ 545333951 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	88975721433432680141399368937067488758202459192692502713438159957217630425960	1414	UVM_INFO @ 179035108 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	85942361015806463908950981574457401893878251282008473357591005745374032090216	760	UVM_INFO @ 518557387 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	67006465576403322762863036939240736776578897407871664024324201790950563788389	424	UVM_INFO @ 474925883 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	45176280401723306286902188261382489109222431943450576924393429712483189800628	520	UVM_INFO @ 110850411 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	47623415334241109304541177056061116615961626029389531971060869809305794284618	4116	UVM_INFO @ 776151424 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	37835403506254195199886294602835972784562146969725834380625753355529915288278	21297	UVM_INFO @ 1728645870 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	32353715083202368649892419307980724310556733973711555792547894582162388001011	524	UVM_INFO @ 79422322 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	49015853936906191626880850036765579972388100149131523147557332599012496222876	6253	UVM_INFO @ 2576224546 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	3568817221907544980872199424240545682977298127799255124556487556937217973415	2837	UVM_INFO @ 1932037901 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	1257221332101745869406107820450799976656163074872064832313233412356950125570	2367	UVM_INFO @ 194638854 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	67621194978297433296701273102397266912012149701742440810463062317495091556707	10969	UVM_INFO @ 1746082715 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	22002763281199396178541357109734516040948901689442272916893589215048948943033	1246	UVM_INFO @ 2260065445 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	101053999962168669339881786702250112652609360251585564605054741988380889212999	368	UVM_INFO @ 113604870 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	42151193012240248367442409365192435647974707917207799398548441384684933543905	3261	UVM_INFO @ 113422857 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	9234327950073114261633721505531415234749937399928696828485891440065493621817	4167	UVM_INFO @ 125441521 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	66319309302747382108028435906194792626223541987232278928775133118257980636625	1908	UVM_INFO @ 972473750 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	21679879567797876508325142286826589570459614337006383121892420198052845088836	1112	UVM_INFO @ 136483047 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	73886440964040284325764598911860598528032302466050501991145433821770463372590	1320	UVM_INFO @ 234749430 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	96627897593999218042724081464961432714304851557444140674113819235943069676472	3056	UVM_INFO @ 81082421 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	64881323046242792854249003527224369427101564448580219886041236008748734322653	4818	UVM_INFO @ 356554021 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	37911599400972749817808449481055016117121644795204320118611366529610950459349	596	UVM_INFO @ 139568897 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_esc	80036379876165001287301359299890912756933769855216998900371198875309830821407	1408	UVM_INFO @ 839191925 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1323) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs []) reg name: otp_ctrl_core_reg_block.direct_access_rdata_				41 test runs
	otp_ctrl_check_fail	42444179343128876113319665146867559803999760855656098834823509973823665887928	16965	UVM_INFO @ 2087817464 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	76799428720672374155139301474524225955899839388139930285405795822753137027995	4707	UVM_INFO @ 527603316 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	73236617853693770832315732112678393874367876014097439078199092594759831653288	5433	UVM_INFO @ 998485177 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	104300131711513955931260179484882433768118031311452391805308558200659389291375	418	UVM_INFO @ 129332335 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	42633044018167730838904792747384058178877096729025130603317285224612060821959	12103	UVM_INFO @ 1556165627 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	30751907495024591040097196107056801350387416498708239439339493124356012719458	1650	UVM_INFO @ 512586014 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	50266954850668221417431476638751514183042064048889378429534725501725891841479	446	UVM_INFO @ 90331107 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_errs	80806528627552751587665274197144453852642981936643664801166178439443777987881	5626	UVM_INFO @ 2133422682 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	104861261736709160157621141373645711021468332031222290988344675366086680942991	11096	UVM_INFO @ 2531777025 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	5391919086650800879173145215688881263348171010410643059279565383032009477505	878	UVM_INFO @ 184137303 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	22979822759216817882602996358395901750937700747019500709405003476002536377413	4835	UVM_INFO @ 909368723 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	49927736024800414375071780196905052590175449986836518324440438239725754213587	29976	UVM_INFO @ 861292551 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_macro_errs	67590838479430324464103791196424480371376610719105914726205702030989523946233	2384	UVM_INFO @ 3181437385 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	78846607423402383782091806654135765666943914039584042648929571346562313393037	16981	UVM_INFO @ 790570879 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	91282498188497042131618569541784873433265375905674141319978690054444879266640	19052	UVM_INFO @ 5548938593 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	5046726750842381054288910633457989683067693018178674492303048028156546369830	3754	UVM_INFO @ 499957999 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	7285051370175065620048151920219579115755455849310855683196400495705622272260	590	UVM_INFO @ 71962240 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	13037394802333461851987215641573092030840089556337833345980069820892327139490	4181	UVM_INFO @ 331958654 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	65627715692338364734483309298125391384236946947569623823885692574474411062393	180	UVM_INFO @ 49954823 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	105246288335420921235197623380425294105053299907500021660712679798820027461480	1230	UVM_INFO @ 52711100 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	98292335609524143877903487481390929599446126974450837646538703487663056855693	10154	UVM_INFO @ 13770023407 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	4095437754025046116960967392013490737246127800025468792478197644135633818979	2428	UVM_INFO @ 168830595 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	3313868848763013126827465751628881272139780575807677682934536879354657601402	2358	UVM_INFO @ 1140469636 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	62876185451154289117510378627753333602717833693444080274613803989330274681695	5992	UVM_INFO @ 2561085263 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	23765552997751487266760762737965341612364761730900873422031138571101556993453	6633	UVM_INFO @ 484262722 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	94253476598488002510852937086777896147633406157862532043356566612893928085549	7444	UVM_INFO @ 1114088930 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	61315744839720276849091264046714616490912497250205980373861654486091647927194	1432	UVM_INFO @ 278904471 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	114510114760936162386883976093802157462448649855480150540048001740945030351670	8450	UVM_INFO @ 694118693 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	112321432199218180221303582426051768162589812073552357790488228158424091892004	6682	UVM_INFO @ 645740337 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	45809933271178252362232168078183897756963300662282297681782083810239557594191	4783	UVM_INFO @ 503321973 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	28766921516445115293466082444367774764923110072754973744453869817351722680874	5533	UVM_INFO @ 2300298474 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	59880189755489185202326091497272447969190498936988799586545521103649093000449	3763	UVM_INFO @ 782957622 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	111091809099468585249816157566088621593105812653040959369163117680543813729040	4917	UVM_INFO @ 399326251 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	61077509071464874228312949883949901547835740926058359137072317404856938611966	1885	UVM_INFO @ 342965942 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	77243499140579103283100917625746728592922282834062632444964809752687537377485	2368	UVM_INFO @ 108848074 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	72421687482728599948979828010508404082992088693643295586036960960138694021016	752	UVM_INFO @ 132303037 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	11991719064486508780463003984095774952348123401323466884000337213197948947803	176	UVM_INFO @ 53591306 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	50594538433600061173227390859378404773516785418470363372947046000744157181490	2879	UVM_INFO @ 1363462746 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	19273827680508918771390433406947183907851393182551814712598426081297781592732	9213	UVM_INFO @ 1664637950 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	50683139981885371846033305447623259643579368840620928079168293706488805463230	1062	UVM_INFO @ 61103694 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	86351238961714639452266543288363193309319429857222817983810530859151148848870	26373	UVM_INFO @ 6943084150 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1323) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs [*]) reg name: otp_ctrl_core_reg_block.intr_state				32 test runs
	otp_ctrl_dai_lock	33750450432645424177909212328098797051012367062338871847279402445772176805296	6125	UVM_INFO @ 1453648667 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	3411867436532764416912002666429050681565219650198232333246148747774220655957	4463	UVM_INFO @ 505672741 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	41250306068930020838208493206542290881039506784704150866595916130333211599374	8038	UVM_INFO @ 11822620982 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	67947774442599696494976171686286181384996182063300962198414117497837786780170	28060	UVM_INFO @ 17199587197 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_background_chks	57922608652368941557629020256245896504511362352416193862307420739885793304266	6105	UVM_INFO @ 7256858291 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	30410154859538985643928599409025882350792199496605832558522986353470352423880	38886	UVM_INFO @ 872739276 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_background_chks	72781796130914986292117347587292799733869531193067728686562814893992491387023	1554	UVM_INFO @ 234090946 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_key_req	23244597455975330202286368661469212894826010636226620314236810267477091006190	27109	UVM_INFO @ 2757973987 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	72275504436158868069304374340936937022264583392472876059959045937230628623696	5213	UVM_INFO @ 2897568674 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	93006059268125940350959744137819234105492923825708839186919240869031104223493	14031	UVM_INFO @ 1153101457 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	52504733580301253505448613932893202551927332235887537089681890836630720583319	3048	UVM_INFO @ 16065667318 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	23825889531026400886745567819076332530300290434530277818637797246069577394193	3926	UVM_INFO @ 2951359009 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	88345430278702652334990090173287829584524928960526174852430173201941456290506	6222	UVM_INFO @ 2047867660 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	66304730506501211112899412891616989083225137901802000790750470840130949739150	14852	UVM_INFO @ 46409968594 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	55626217613692844810389589669559247704970435121114062448846181087494006674613	4404	UVM_INFO @ 899971047 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	20144734295271300583883190788340407561119384121042730291837921127935620317	228	UVM_INFO @ 79937875 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	96778424915977091136749202733503797745134049570186839207882533273138523991624	2626	UVM_INFO @ 16027910452 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	43000263944962355904974415612363465798987382452876292270985689100953584851956	20635	UVM_INFO @ 628156405 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	77844577695552034100181733141573197870810570675321989185840842728360911082049	8834	UVM_INFO @ 3390410242 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	16318772514986988809192117884542794503625950428741632503310862933757803493576	17073	UVM_INFO @ 8257450348 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	54689892101101317789149726449880987070673045708705148180219623113044090863653	565	UVM_INFO @ 617142744 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	10100913197241353924210151014954117344944767721123274219868788952051825201162	3214	UVM_INFO @ 6799184507 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	12932680119421348410896327871984580811519530684629068321829464840443237373696	3058	UVM_INFO @ 17368947494 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	91554352493343298760720825324248629677994889314532835480718326228918234855122	5685	UVM_INFO @ 1501250872 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	106355535956936087332930040763432800078797378969029344654281289578948139168203	1533	UVM_INFO @ 176379233 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	49089690094109646156448623064966854513190984923182913510844684175572234019977	4379	UVM_INFO @ 3202369221 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	15028796709338846554933398007202072736604879775375473873900818292708101313850	250	UVM_INFO @ 446741610 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	56833479909419565919841646170976517650604940641860254434440866932167828646170	296	UVM_INFO @ 244161302 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	14524696162080811369681529400420736717244493912993404285293137683653012220813	262	UVM_INFO @ 114993526 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	57313169237067335877606910356251941646407821782798096050782641251442933408269	514	UVM_INFO @ 201113434 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	87914318402191221826512559471406760427396106293019274279192344474433164282644	212	UVM_INFO @ 77672848 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	68140723744462491276079452193002913610183625041579614706808100332462336261633	18883	UVM_INFO @ 2453686633 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:2202) [scoreboard] Check failed item.d_data == exp_data (* [] vs []) d_data mismatch when d_error =				14 test runs
	otp_ctrl_stress_all_with_rand_reset	54109208870962872626696205693199969272892109206561170001704310963407810700256	58744	UVM_INFO @ 38483972757 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	40997633075390755468738902174733611843313429763125414200073229688929349843766	11726	UVM_INFO @ 2828382705 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	13995795896617047385620002728877912067324177533173101520735820226003898124735	7915	UVM_INFO @ 3220963472 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	13345337999681457508545783033030947679364662367667121462563122742420357237514	2991	UVM_INFO @ 2086162016 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	21044537950059985121923710151131142892784815619104847005460325956281051791790	32096	UVM_INFO @ 1778291055 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	101999231617278174607004212754328152424118250997383796765973486575175178677927	98	UVM_INFO @ 62638999 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	54994170075757603326203959995386796792797156447681918350792986761126859901384	7085	UVM_INFO @ 4342818459 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	1983599480211446258448836696081873961573045479966567549167447739435406103583	12668	UVM_INFO @ 1387513156 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	81474914984123114236307678341410222547380383339448853689568795245239889946782	98	UVM_INFO @ 52579789 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	57184007790571053438111847742190823937417259610111163762371469503118553584029	170	UVM_INFO @ 12223025731 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	7166628902365526191359138124175731466810809087968079436762735621572692457702	97	UVM_INFO @ 120140765 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	61089016838009446879142630460960929384591064007331545414266897288024807607432	4504	UVM_INFO @ 1427753819 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	33565712629557951031001589596667923013438598153319751184613170857694201326982	28976	UVM_INFO @ 8847931405 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	105470806984311705271837085116907716299077389481603157643894799331094472521024	98	UVM_INFO @ 30882892 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:674) [scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (* [] vs [*]) Interrupt_pin: OtpErr				12 test runs
	otp_ctrl_dai_errs	10708002127952854902778193603588702642435127987933913046741840248467737406572	6758	UVM_INFO @ 567036760 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	13155156820418886026576458901388789595371214313734059469471433574937391578498	10744	UVM_INFO @ 5219894124 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_test_access	52318875643330963107176355411687152456773087502754172182114580201617689339144	19099	UVM_INFO @ 504487242 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_background_chks	88645171738722322048866821085970750543993134512290962162735498411611277703517	14393	UVM_INFO @ 802687422 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	26564435549189626379256455224290746882491753676564867303769159786830529349362	28602	UVM_INFO @ 2267180068 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	104187126863115556500794023931667318596685415387491768081908015549583775506486	8883	UVM_INFO @ 874989814 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_errs	41201530697276162184322059733942070924944002574156531143276529134529100208964	1972	UVM_INFO @ 860634226 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	29592351190242763696268403440412346075977152048974764050213336303184789576646	5280	UVM_INFO @ 8497549617 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	49881296291219831228108526148383645075650581502609502547900803646324869618465	9150	UVM_INFO @ 917133094 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	21608012431160100417091546070225350314035374796839803580853995796433255910686	14533	UVM_INFO @ 5074070688 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_check_fail	79281693682949892111362551342129288962430690703369203870326127942345845765077	12184	UVM_INFO @ 18506587788 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	48328309334206877837857114798677603139755303823958393509883455757405822505019	11273	UVM_INFO @ 1430067532 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (cip_base_scoreboard.sv:692) [scoreboard] Check failed item.d_data == exp_data (* [] vs []) d_data mismatch when d_error =				12 test runs
	otp_ctrl_stress_all_with_rand_reset	55297683696523186556779199130839858216076304828356394564855455275487718660282	603	UVM_INFO @ 78029206 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	44944003523774987195681206166492611675670604538072652683700552889802082568047	35069	UVM_INFO @ 836480445 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	66484646761517104307746850036512129661474842836679198636076833945191803552750	18065	UVM_INFO @ 1571866920 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	23378516947741977794397392699150921266898974321853204106842414454873762082763	409	UVM_INFO @ 1440628336 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	42466786996324091105625196171251547898077579163009749724928070433298943601468	97	UVM_INFO @ 499884864 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	72140409722224969848658533050191814368835609248551183278748574977896138367145	10105	UVM_INFO @ 1252906576 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	83124434126037223132288210373748725258556038713453684189958381846819114091327	15134	UVM_INFO @ 11061107759 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	44982052487490821491732947600171309945414629160921373742391065966525574205701	5909	UVM_INFO @ 1473928699 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	53803011591405803091550396284522274629502134262440500564059242828801953075299	49198	UVM_INFO @ 7104799413 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	53796014084552871543283230552830984367163618705119966573849063852748601086230	174	UVM_INFO @ 1048506356 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	113656664508659621159794579551347046092110727248357939171210167402119607247989	29678	UVM_INFO @ 6906370103 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	90931336132585290428080939204913570086162109152886855252452936205834530525738	410	UVM_INFO @ 109983312 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_WARNING (uvm_reg_field.svh:1191) [RegModel] Trying to predict value of field 'err_code' while register 'otp_ctrl_core_reg_block.err_code_*' is being accessed				7 test runs
	otp_ctrl_stress_all	93629440008461881795197925332621714041808840154184114813914250946842431061081	1775	UVM_INFO @ 668113907 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 668233907 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 668273907 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 668413907 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
	otp_ctrl_stress_all	108865886691557400105688635632183035912145725131843368872805184808069719412252	39638	UVM_INFO @ 11564959865 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 11565359865 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 11565839865 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 11566159865 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
	otp_ctrl_stress_all_with_rand_reset	85378007653614518109888400123417447173340089172570576158973839672439259107546	17436	UVM_INFO @ 13752652672 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 13753012672 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 13753132672 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 13753332672 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
	otp_ctrl_stress_all_with_rand_reset	95479071787660559857770347723199451616289137982691974126942965867707638197253	3042	UVM_INFO @ 1966628870 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 1967045540 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 1967337209 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 1967795546 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
	otp_ctrl_stress_all_with_rand_reset	49107313470542604464278442323007839173006388941884879784561167040460198950939	810	UVM_INFO @ 552388090 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 552596420 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 552742251 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 552908915 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
	otp_ctrl_stress_all_with_rand_reset	110739702485518292934749705892219197136708921610792316555669210284257102745810	8276	UVM_INFO @ 35018926729 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 35019760064 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 35142593643 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 35142926977 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
	otp_ctrl_stress_all_with_rand_reset	107583830359910343802995772476493331195128688524109275328332622084019800174558	14243	UVM_INFO @ 2313036551 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 2313140721 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 2313161555 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1 UVM_INFO @ 2313276142 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_ERROR (otp_ctrl_scoreboard.sv:961) [scoreboard] Check failed (csr.get_mirrored_value() \| status_mask) == (item.d_data \| status_mask) (* [] vs []) reg name: status, compare_mask				5 test runs
	otp_ctrl_parallel_lc_req	58624394501132837812047846631438196154359208453197842003764423775853520689163	5204	UVM_INFO @ 206533680 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_req	89694893757858222381538087470580373230893080108317478440876291405865299761884	6938	UVM_INFO @ 1312850976 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_req	26951874904183711486984933145818664232863369350494043360758154401142241950682	6173	UVM_INFO @ 323193460 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_parallel_lc_req	91103733948042431158853533287851074842320027726750911423793244700223667544891	2227	UVM_INFO @ 191211506 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_dai_lock	85188993093321659043184285408430049048267614847294656160034803777355324713865	20412	UVM_INFO @ 6380418596 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:465) [otp_ctrl_common_vseq] wait timeout occurred!				3 test runs
	otp_ctrl_stress_all_with_rand_reset	8070843067776332690261459660515191821979681063412183482916753229384371372846	143	UVM_INFO @ 10172452595 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	71850442850152759702283607091318316719492779983956249913873904928741847374259	5960	UVM_INFO @ 11201155470 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	115463309904625228569518522564694583813210695621289420328258759836200265449286	5123	UVM_INFO @ 11564546805 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [] vs []) dai addr ed* rdata* readout mismatch				2 test runs
	otp_ctrl_low_freq_read	21324339672266548618512397033570734666693291466844406456435374780769413768260	95	UVM_INFO @ 69382505800 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all	52744651742479223259239349763334340325130096661999291381281301344774304622850	96	UVM_INFO @ 62569091498 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1296) [otp_ctrl_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.				2 test runs
	otp_ctrl_stress_all_with_rand_reset	3385749425730264234624579817159844264714123966619107431432610403508597128442	5858	UVM_INFO @ 563106310 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	otp_ctrl_stress_all_with_rand_reset	49124155873279656331060638719093563522206802535518274785268953418085362580005	13473	UVM_INFO @ 16506091536 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_partition_walk_vseq] Check failed rdata* == exp_data* (* [] vs []) dai addr ed* rdata* readout mismatch				1 test run
	otp_ctrl_partition_walk	90995738753841265812226004551894025477954883327719368230314101281271847057536	112659	UVM_INFO @ 7111536391 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
Offending '(cio_test_en_o == *)'				1 test run
	otp_ctrl_csr_mem_rw_with_rand_reset	24741212842359944403773097096494933572809317617963824119884982890323242563302	104	UVM_ERROR @ 85345866 ps: (otp_ctrl_if.sv:391) [ASSERT FAILED] CioTestEnOWithDftOff_A UVM_INFO @ 85345866 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---