Simulation Results: alert_handler

 
21/08/2026 15:00:36 DVSim: v1.49.0 sha: ffb3622 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 99.13 %
  • code
  • 98.97 %
  • assert
  • 98.92 %
  • func
  • 99.51 %
  • line
  • 99.99 %
  • branch
  • 99.99 %
  • cond
  • 97.50 %
  • toggle
  • 97.37 %
  • FSM
  • 100.00 %
Validation stages
V1
95.65%
V2
83.83%
V2S
90.73%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 10 10 100.00
alert_handler_smoke 97.440s 2942.730us 10 10 100.00
csr_hw_reset 1 1 100.00
alert_handler_csr_hw_reset 6.710s 154.721us 1 1 100.00
csr_rw 5 5 100.00
alert_handler_csr_rw 8.570s 129.776us 5 5 100.00
csr_bit_bash 0 1 0.00
alert_handler_csr_bit_bash 612.110s 200000.000us 0 1 0.00
csr_aliasing 1 1 100.00
alert_handler_csr_aliasing 151.820s 1236.112us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
alert_handler_csr_mem_rw_with_rand_reset 12.890s 234.040us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
alert_handler_csr_rw 8.570s 129.776us 5 5 100.00
alert_handler_csr_aliasing 151.820s 1236.112us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
esc_accum 25 25 100.00
alert_handler_esc_alert_accum 397.210s 94819.202us 25 25 100.00
esc_timeout 50 50 100.00
alert_handler_esc_intr_timeout 99.570s 6952.184us 50 50 100.00
entropy 22 25 88.00
alert_handler_entropy 3600.143s 0.000us 22 25 88.00
sig_int_fail 48 50 96.00
alert_handler_sig_int_fail 92.930s 6129.819us 48 50 96.00
clk_skew 10 10 100.00
alert_handler_smoke 97.440s 2942.730us 10 10 100.00
random_alerts 10 10 100.00
alert_handler_random_alerts 94.380s 6597.209us 10 10 100.00
random_classes 50 50 100.00
alert_handler_random_classes 93.070s 1503.462us 50 50 100.00
ping_timeout 22 50 44.00
alert_handler_ping_timeout 793.220s 245992.033us 22 50 44.00
lpg 72 100 72.00
alert_handler_lpg 3600.144s 0.000us 36 50 72.00
alert_handler_lpg_stub_clk 3600.147s 0.000us 36 50 72.00
stress_all 49 50 98.00
alert_handler_stress_all 5810.860s 387632.521us 49 50 98.00
alert_handler_entropy_stress_test 0 20 0.00
alert_handler_entropy_stress 37.020s 2893.694us 0 20 0.00
alert_handler_alert_accum_saturation 20 20 100.00
alert_handler_alert_accum_saturation 6.580s 1232.206us 20 20 100.00
intr_test 10 10 100.00
alert_handler_intr_test 2.710s 15.212us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
alert_handler_tl_errors 31.100s 418.863us 25 25 100.00
tl_d_illegal_access 25 25 100.00
alert_handler_tl_errors 31.100s 418.863us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
alert_handler_csr_hw_reset 6.710s 154.721us 1 1 100.00
alert_handler_csr_rw 8.570s 129.776us 5 5 100.00
alert_handler_csr_aliasing 151.820s 1236.112us 1 1 100.00
alert_handler_same_csr_outstanding 67.320s 13101.486us 5 5 100.00
tl_d_partial_access 12 12 100.00
alert_handler_csr_hw_reset 6.710s 154.721us 1 1 100.00
alert_handler_csr_rw 8.570s 129.776us 5 5 100.00
alert_handler_csr_aliasing 151.820s 1236.112us 1 1 100.00
alert_handler_same_csr_outstanding 67.320s 13101.486us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 20 20 100.00
alert_handler_shadow_reg_errors 483.140s 9222.167us 20 20 100.00
shadow_reg_read_clear_staged_value 20 20 100.00
alert_handler_shadow_reg_errors 483.140s 9222.167us 20 20 100.00
shadow_reg_storage_error 20 20 100.00
alert_handler_shadow_reg_errors 483.140s 9222.167us 20 20 100.00
shadowed_reset_glitch 20 20 100.00
alert_handler_shadow_reg_errors 483.140s 9222.167us 20 20 100.00
shadow_reg_update_error_with_csr_rw 20 20 100.00
alert_handler_shadow_reg_errors_with_csr_rw 1455.140s 72500.258us 20 20 100.00
tl_intg_err 30 30 100.00
alert_handler_sec_cm 39.820s 793.631us 5 5 100.00
alert_handler_tl_intg_err 101.240s 5167.236us 25 25 100.00
sec_cm_bus_integrity 25 25 100.00
alert_handler_tl_intg_err 101.240s 5167.236us 25 25 100.00
sec_cm_config_shadow 20 20 100.00
alert_handler_shadow_reg_errors 483.140s 9222.167us 20 20 100.00
sec_cm_ping_timer_config_regwen 10 10 100.00
alert_handler_smoke 97.440s 2942.730us 10 10 100.00
sec_cm_alert_config_regwen 10 10 100.00
alert_handler_smoke 97.440s 2942.730us 10 10 100.00
sec_cm_alert_loc_config_regwen 10 10 100.00
alert_handler_smoke 97.440s 2942.730us 10 10 100.00
sec_cm_class_config_regwen 10 10 100.00
alert_handler_smoke 97.440s 2942.730us 10 10 100.00
sec_cm_alert_intersig_diff 48 50 96.00
alert_handler_sig_int_fail 92.930s 6129.819us 48 50 96.00
sec_cm_lpg_intersig_mubi 36 50 72.00
alert_handler_lpg 3600.144s 0.000us 36 50 72.00
sec_cm_esc_intersig_diff 48 50 96.00
alert_handler_sig_int_fail 92.930s 6129.819us 48 50 96.00
sec_cm_alert_rx_intersig_bkgn_chk 22 25 88.00
alert_handler_entropy 3600.143s 0.000us 22 25 88.00
sec_cm_esc_tx_intersig_bkgn_chk 22 25 88.00
alert_handler_entropy 3600.143s 0.000us 22 25 88.00
sec_cm_esc_timer_fsm_sparse 5 5 100.00
alert_handler_sec_cm 39.820s 793.631us 5 5 100.00
sec_cm_ping_timer_fsm_sparse 5 5 100.00
alert_handler_sec_cm 39.820s 793.631us 5 5 100.00
sec_cm_esc_timer_fsm_local_esc 5 5 100.00
alert_handler_sec_cm 39.820s 793.631us 5 5 100.00
sec_cm_ping_timer_fsm_local_esc 5 5 100.00
alert_handler_sec_cm 39.820s 793.631us 5 5 100.00
sec_cm_esc_timer_fsm_global_esc 5 5 100.00
alert_handler_sec_cm 39.820s 793.631us 5 5 100.00
sec_cm_accu_ctr_redun 5 5 100.00
alert_handler_sec_cm 39.820s 793.631us 5 5 100.00
sec_cm_esc_timer_ctr_redun 5 5 100.00
alert_handler_sec_cm 39.820s 793.631us 5 5 100.00
sec_cm_ping_timer_ctr_redun 5 5 100.00
alert_handler_sec_cm 39.820s 793.631us 5 5 100.00
sec_cm_ping_timer_lfsr_redun 5 5 100.00
alert_handler_sec_cm 39.820s 793.631us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 5 10 50.00
alert_handler_stress_all_with_rand_reset 629.350s 67778.521us 5 10 50.00

Error Messages

   Test seed line log context
Job timed out after * minutes 28 test runs
alert_handler_lpg 34074362215877565347589169554970184410222506502118175907746998126122648959758 None
alert_handler_lpg_stub_clk 45416047051044747397298414253938824092454882661220920428170682333539236129130 None
alert_handler_entropy 10052337147853379966224263149908887945198248084958232056123595044708236956381 None
alert_handler_lpg 92857851097688049580308393895112289578729865590738999901438119530983734876435 None
alert_handler_lpg_stub_clk 54657643743696171881358474901968410574590291024019524954166448186046337725341 None
alert_handler_lpg 13205919261687597479879849374188568073178910798281208194807380018870368874666 None
alert_handler_lpg_stub_clk 94277363648207495853097898172295519289268374246940655164975289866199373211465 None
alert_handler_lpg_stub_clk 39045370679080656846455281352948300303982206311971550598852617121428492036215 None
alert_handler_entropy 48572662885883205758261222606739011579513615904289724821482953148124248540497 None
alert_handler_lpg 58992933667773578719601583537404933230766445969459056914120620583238678607751 None
alert_handler_lpg_stub_clk 77946130679181646286109582809062524478714581133784777161381335348446949697902 None
alert_handler_entropy 112321818959299866217104553934510460636760963923773097054760936109308785207059 None
alert_handler_lpg 53164876285635012417320228412728136121932204415214193502923337129826547699982 None
alert_handler_lpg 81393882133002217511048848268580605347989516139727665804278605222012749214012 None
alert_handler_lpg_stub_clk 77560784821057381835027952018594152716973281126532342333344942045573564737266 None
alert_handler_lpg_stub_clk 49573712194764798735472351988322118040806181873898122456343197395416634931920 None
alert_handler_lpg_stub_clk 67419287188434304405165471373067925655799108084603285501528452285523336784028 None
alert_handler_lpg_stub_clk 42233932976537146258334309971520390957596107074185058005999215376779800375363 None
alert_handler_lpg 67975714302097645084107443721596283955903343341910006081674732424898010099020 None
alert_handler_lpg_stub_clk 72627059704605306084596124076360368188231219424531811108233555606665533215573 None
alert_handler_lpg_stub_clk 3201947906022147115720991065905069408412920131463813440846406469722018199478 None
alert_handler_lpg_stub_clk 66957595424403593168501162591182667376766843652726263705028941540703842901469 None
alert_handler_lpg 68634539121888373001437253579983070844933265393599504316339490896876628678686 None
alert_handler_lpg 13062513857660778076350127884946497097382905935407342696986334548103343106702 None
alert_handler_lpg_stub_clk 31762620707424133905385367489026332074738733802398373663435336209785059867706 None
alert_handler_lpg 4000345065771025292499930288582526141345934286744314002854141687431983584058 None
alert_handler_lpg 32471512614579340845696311845662849140497780467372883540293393001380480574439 None
alert_handler_lpg 75241555590028938479482297842987882919795068091110649552784427643265501157812 None
UVM_ERROR (alert_handler_scoreboard.sv:482) [scoreboard] Check failed intr_state_val == item.d_data (* [*] vs * [*]) reg name: intr_state 27 test runs
alert_handler_ping_timeout 3452807895724579548828117912453406421948487156337935763431206795685387491651 142
UVM_INFO @ 8703198056 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 81581655024867993048516875321565631145075661430883338752005918923138513851804 132
UVM_INFO @ 35195739105 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 44735943416394567573092793763913775736316593778118001391994075863788947897952 108
UVM_INFO @ 3791956839 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 29185341060959897747416349860823624854903097493986914665409274917483159229998 130
UVM_INFO @ 110169866657 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 16596998366868334553932144658035398121317244203686593814721698478028711030360 123
UVM_INFO @ 19544307449 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 3038609778398482973438683715544926320337546145316330910899071614040814718555 147
UVM_INFO @ 21607912695 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 8703292508725770410389930000428011610659571214205057536924830373282051620127 93
UVM_INFO @ 1445969826 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 29222777996308175468900957473901226858210472273493229635868648377252836755407 126
UVM_INFO @ 6570311089 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 50266682801640868287368148960408540419577280053671839337601413754378215524348 135
UVM_INFO @ 33577503859 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_lpg 102197405864058298099431376925827115344764344333996772461383722868131980751087 86
UVM_INFO @ 23612527743 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 58450279084617591035127281926330671862542402005999602457602784306029558834629 99
UVM_INFO @ 4155194132 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 25200699276386699476831118706215572796658834412664094463384651057855952496989 107
UVM_INFO @ 13669570709 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 35022429581704729868151857501176045227418683026925993807882580444379297662864 102
UVM_INFO @ 3001263773 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 50410404206738875687434457439552180932171875381523245895142177723889964389516 99
UVM_INFO @ 6899023471 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 79338546207448421674881546479369306926426175688506564019177374696429338753498 93
UVM_INFO @ 4443106823 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 110554287213123192125178904188478018898627088837543152689029325272198390795684 99
UVM_INFO @ 2475988330 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 39873394692751415972704896105118658901333483071823964609297434073038826576417 111
UVM_INFO @ 19376184465 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 96365462198996586054256077416522593652304971206892100702380415418247696532178 105
UVM_INFO @ 3867690644 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 80234976771791360440616317865850828986832229667015109814348372627358272464692 123
UVM_INFO @ 18109342468 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 10130612058715554515740649767564816939529776251327658934198885065541052447999 117
UVM_INFO @ 11224953948 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 95235132521516961570137333782940621940146266014349851671273753403033412867942 129
UVM_INFO @ 5706388580 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 89189727764797632202652607731028012057588805196154261528300116875102208363008 97
UVM_INFO @ 2994525639 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 67234463423448051325764107379199465367869428264613405676722015160300888417239 102
UVM_INFO @ 8685720585 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 101946811565884162154257743681318159016733118972262579780120141155735904310731 106
UVM_INFO @ 4307827976 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 93305281716935829247542099014576866032051264671952261499479353041779712919029 102
UVM_INFO @ 11787366977 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 69829087361330079645559629537489694078595405348862142826616842207421110903494 96
UVM_INFO @ 8627018026 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 34388855656045704221779375183739508996761776547017808381842126708306958041958 151
UVM_INFO @ 20768310673 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR sequencer [alert_sender_ping_rsp_seq] Response queue overflow, response was dropped 21 test runs
alert_handler_entropy_stress 72581453759848399349717023301957137902296196274973219469361886689857006356810 198
UVM_INFO @ 516717192 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 9458372124884749406013165728509849657248505711147767545587896119401609668071 206
UVM_INFO @ 2893694367 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 72989277922070281145719600810491582954422501969735412469941020775526085298053 208
UVM_INFO @ 351589826 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 15884090062621091234018742968392992299778469989037425924525294506123845520357 210
UVM_INFO @ 244543208 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 84460350476765306157544000827694486040329527513492698232823141197129151266467 216
UVM_INFO @ 442349738 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 59799874954020960411610958985278272847406723156257720248839296507046527016678 170
UVM_INFO @ 132081943 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 110317675810190087803673496268727249014383256348326167220583064874616515627038 196
UVM_INFO @ 110228356 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 42098338130487333398266805409840177143501714565101560704013180764019160807514 176
UVM_INFO @ 275208042 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 68877531741036701230927221884222093130532478877508897303823645592207490425607 194
UVM_INFO @ 599932069 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 23524749414861281637107453492806858680121247881894561349671692108314079849128 228
UVM_INFO @ 801052153 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 27264760352775399245245109912556025382489711921504110345569778463405386339157 228
UVM_INFO @ 107616782 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 62194147674061357239328019604202024426940668560847076383375796017275414117634 188
UVM_INFO @ 525819905 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 114649713386239111533666608815380440172107388383302535985530567736465927281077 234
UVM_INFO @ 166219611 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 18650159853389595469311720245209941070340024992668743337438203287561057227742 118
UVM_INFO @ 419376612 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 8381987555453478928466098663188619776484129860843860223807737989794956557437 230
UVM_INFO @ 1263978013 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 65413563173894918261740217493752869022103918895947991613368803868310467177025 198
UVM_INFO @ 607514813 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 79575518834489858348504097765540046072868955532177299605474660766522966625726 222
UVM_INFO @ 1731237658 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 115017418632978524984420121571827960495533637236530234798467647693092872299786 186
UVM_INFO @ 625478339 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 95198509034756383995452180536954567989038419806379010398633106015782419529236 174
UVM_INFO @ 705327520 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 30307780416609045250197610170720791593863316411318855377643618770689127384418 224
UVM_INFO @ 2772783157 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all 30403212203395919471249596097159672086377671462195820457569065551189967477962 128
UVM_INFO @ 61430765118 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1296) [alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. 4 test runs
alert_handler_stress_all_with_rand_reset 23931680572461857852382801303884317421150107685216097183814085144159723263582 129
UVM_INFO @ 3696506071 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 91589246657177448047025079362049565642494475333609365599743414246711656206494 151
UVM_INFO @ 14444676997 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 84807404608238202800759370850826284426448507461474449660148086006335543076289 89
UVM_INFO @ 973095573 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 32668181794110851139113677951043872814764753034371072413884918677892460310205 89
UVM_INFO @ 8596369642 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (alert_handler_scoreboard.sv:604) scoreboard [scoreboard] Register/crashdump mismatch. loc_alert_cause[*] is * in the crashdump and * in the register model. 3 test runs
alert_handler_ping_timeout 96025836856653355650945926605489330152851848545618907745129486056636696517679 86
UVM_INFO @ 154333514 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_lpg 2909988553589906792009332892033957902090953954704224704028974242090871027696 86
UVM_INFO @ 29331217530 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 48715236644469299411313465358415106765799243008910149118288757549019082168493 86
UVM_INFO @ 113603301 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (alert_handler_scoreboard.sv:258) scoreboard [scoreboard] Unexpected interrupt value in cfg.intr_vif.pins[*]: saw *, but expected *. (is_int_err = *, local_alert_type = LocalEscIntFail) 2 test runs
alert_handler_sig_int_fail 25221389541172623322371104804186091825612519892050858658973133156567334108191 88
UVM_INFO @ 222096915 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_sig_int_fail 100150236486044430158515559641648855720871128949280863082767532433934011502579 88
UVM_INFO @ 433451174 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue 1 test run
alert_handler_csr_bit_bash 15581436198651929163632872361745656443848834374745012010400441095216399767 85
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1209) [alert_handler_common_vseq] Check failed (cfg.can_reset_with_csr_accesses || !has_outstanding_access()) Trying to trigger a reset with outstanding CSR items. 1 test run
alert_handler_stress_all_with_rand_reset 21264459477212441902926213856442239458024428131852201778886702417677668379617 353
UVM_INFO @ 8867026000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (alert_handler_scoreboard.sv:258) scoreboard [scoreboard] Unexpected interrupt value in cfg.intr_vif.pins[*]: saw *, but expected *. (is_int_err = *, local_alert_type = LocalAlertPingFail) 1 test run
alert_handler_lpg_stub_clk 112604921946201719380737505778162001091293952451488959952584410399170988049007 87
UVM_INFO @ 46125800995 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---