Simulation Results: gpio

 
21/08/2026 15:00:36 DVSim: v1.49.0 sha: ffb3622 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 97.00 %
  • code
  • 92.26 %
  • assert
  • 98.73 %
  • func
  • 100.00 %
  • line
  • 99.89 %
  • branch
  • 97.61 %
  • cond
  • 94.60 %
  • toggle
  • 94.19 %
  • FSM
  • 75.00 %
Validation stages
V1
100.00%
V2
93.63%
V2S
100.00%
V3
35.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 40 40 100.00
gpio_smoke 1.680s 86.881us 10 10 100.00
gpio_smoke_no_pullup_pulldown 2.120s 358.975us 10 10 100.00
gpio_smoke_en_cdc_prim 2.240s 313.191us 10 10 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 2.020s 118.877us 10 10 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 1.200s 52.641us 1 1 100.00
csr_rw 5 5 100.00
gpio_csr_rw 1.130s 103.471us 5 5 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 4.420s 1851.978us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 2.130s 140.935us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
gpio_csr_mem_rw_with_rand_reset 1.310s 18.621us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
gpio_csr_rw 1.130s 103.471us 5 5 100.00
gpio_csr_aliasing 2.130s 140.935us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 20 20 100.00
gpio_random_dout_din 1.740s 56.121us 10 10 100.00
gpio_random_dout_din_no_pullup_pulldown 1.750s 91.529us 10 10 100.00
out_in_regs_read_write 10 10 100.00
gpio_dout_din_regs_random_rw 1.280s 66.076us 10 10 100.00
gpio_interrupt_programming 10 10 100.00
gpio_intr_rand_pgm 2.030s 469.478us 10 10 100.00
random_interrupt_trigger 10 10 100.00
gpio_rand_intr_trigger 3.680s 149.609us 10 10 100.00
interrupt_and_noise_filter 10 10 100.00
gpio_intr_with_filter_rand_intr_event 4.250s 276.066us 10 10 100.00
noise_filter_stress 10 10 100.00
gpio_filter_stress 25.170s 946.265us 10 10 100.00
regs_long_reads_and_writes 10 10 100.00
gpio_random_long_reg_writes_reg_reads 7.420s 1957.797us 10 10 100.00
full_random 10 10 100.00
gpio_full_random 1.480s 80.098us 10 10 100.00
stress_all 1 10 10.00
gpio_stress_all 203.080s 15522.520us 1 10 10.00
alert_test 10 10 100.00
gpio_alert_test 0.940s 13.629us 10 10 100.00
intr_test 10 10 100.00
gpio_intr_test 0.980s 54.443us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
gpio_tl_errors 3.650s 646.368us 25 25 100.00
tl_d_illegal_access 25 25 100.00
gpio_tl_errors 3.650s 646.368us 25 25 100.00
tl_d_outstanding_access 11 12 91.67
gpio_csr_rw 1.130s 103.471us 5 5 100.00
gpio_same_csr_outstanding 1.780s 112.899us 4 5 80.00
gpio_csr_aliasing 2.130s 140.935us 1 1 100.00
gpio_csr_hw_reset 1.200s 52.641us 1 1 100.00
tl_d_partial_access 11 12 91.67
gpio_csr_rw 1.130s 103.471us 5 5 100.00
gpio_same_csr_outstanding 1.780s 112.899us 4 5 80.00
gpio_csr_aliasing 2.130s 140.935us 1 1 100.00
gpio_csr_hw_reset 1.200s 52.641us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 30 30 100.00
gpio_tl_intg_err 3.180s 403.887us 25 25 100.00
gpio_sec_cm 1.430s 210.699us 5 5 100.00
sec_cm_bus_integrity 25 25 100.00
gpio_tl_intg_err 3.180s 403.887us 25 25 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 7 10 70.00
gpio_rand_straps 0.920s 16.153us 7 10 70.00
stress_all_with_rand_reset 0 10 0.00
gpio_stress_all_with_rand_reset 13.180s 673.928us 0 10 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 50 50 100.00
gpio_inp_prd_cnt 0.960s 14.865us 50 50 100.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:243) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 12 test runs
gpio_stress_all 101368147170453443092237866270133124789479103399359370701974519722169704473909 4176
UVM_INFO @ 15522520234 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 25546208948654404886751852669246137696335525160274916826880445024698320925065 343
UVM_INFO @ 3091914411 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 52928500826593980508893001895916124179999308377689203445397942960614104786986 565
UVM_INFO @ 13287172217 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 88404348164732325311053250376503939415126361169924834900326406278271876004205 2961
UVM_INFO @ 12581516737 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 98520086511251596323219815208657179933908656625651671385786463771629536129327 525
UVM_INFO @ 1474634777 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 22936485501441783574022558201364424771012409002100180118411435013635488366089 96
UVM_INFO @ 2291341664 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 44946758631648172137067284912010768348660854799534364441222626374850408295980 81
UVM_INFO @ 3432767 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 33511081338638789138534742608770521038052510496195222239723650083445952432911 81
UVM_INFO @ 4290715 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 28038771126516362358200146183062770125729359008154909200738548308098441288154 833
UVM_INFO @ 14109458387 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 87966865567554586355195548243617577516993420698107086097184163527880271935630 889
UVM_INFO @ 3651105975 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 84795062575908185652904446303122241443018497947905529748125663696711339774629 1476
UVM_INFO @ 10064803632 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 68665966676755070745223903150470726943222768587869333703228087113776769432626 81
UVM_INFO @ 2554855 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1230) [gpio_common_vseq] Check failed (vseq_done) 7 test runs
gpio_stress_all_with_rand_reset 68447828417300299941599802010641859473007684898401638485956706384905447284448 92
UVM_INFO @ 673927782 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 7514416804357384683655096639217987634065882552704432789615465757140807147514 227
UVM_INFO @ 1753471640 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 100857973669889142645493538535520870886077268144400685971586925151964092222053 86
UVM_INFO @ 5236788 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 87773674618955655133227554408970456397170492857525011540421544542932004373286 145
UVM_INFO @ 174205470 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 110427951134468238407021530874495826755169028425739436789504702031274527895421 86
UVM_INFO @ 14491172 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 23708176184977532829201987632108543578725802837229609893390367247734798857481 141
UVM_INFO @ 528290955 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 6031182740976931337560404240878971336461238291256878670973804527266823353145 92
UVM_INFO @ 28727675 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -* 3 test runs
gpio_stress_all_with_rand_reset 99150397707206180636095965920035301444782293006742908447060361506142999252888 84
UVM_INFO @ 34589593 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 5069655691835914315042188300546810384460548247820914609101190074472746128125 190
UVM_INFO @ 129096433 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 44150507369343481603772530592468889546729679645526030133017423789522307746600 174
UVM_INFO @ 720538571 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:660) [gpio_common_vseq] Check failed masked_data == exp_data (* [*] vs * [*]) addr * read out mismatch 1 test run
gpio_same_csr_outstanding 46556947491153947168225049276326657170060798918690470410746063480128496499322 83
UVM_INFO @ 13350056 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---