Simulation Results: rom_ctrl/32kb

 
21/08/2026 15:00:36 DVSim: v1.49.0 sha: ffb3622 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 92.21 %
  • code
  • 79.91 %
  • assert
  • 97.67 %
  • func
  • 99.05 %
  • block
  • 78.65 %
  • line
  • 79.01 %
  • branch
  • 79.77 %
  • toggle
  • 84.69 %
  • FSM
  • 76.19 %
Validation stages
V1
100.00%
V2
83.10%
V2S
64.41%
V3
40.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 2 2 100.00
rom_ctrl_smoke 4.000s 233.734us 2 2 100.00
csr_hw_reset 1 1 100.00
rom_ctrl_csr_hw_reset 3.000s 54.935us 1 1 100.00
csr_rw 5 5 100.00
rom_ctrl_csr_rw 3.000s 67.710us 5 5 100.00
csr_bit_bash 1 1 100.00
rom_ctrl_csr_bit_bash 2.000s 96.018us 1 1 100.00
csr_aliasing 1 1 100.00
rom_ctrl_csr_aliasing 2.000s 106.053us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
rom_ctrl_csr_mem_rw_with_rand_reset 3.000s 105.187us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
rom_ctrl_csr_rw 3.000s 67.710us 5 5 100.00
rom_ctrl_csr_aliasing 2.000s 106.053us 1 1 100.00
mem_walk 1 1 100.00
rom_ctrl_mem_walk 2.000s 50.646us 1 1 100.00
mem_partial_access 1 1 100.00
rom_ctrl_mem_partial_access 2.000s 60.709us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
max_throughput_chk 0 2 0.00
rom_ctrl_max_throughput_chk 2.000s 4.027us 0 2 0.00
stress_all 11 20 55.00
rom_ctrl_stress_all 10801.000s 0.000us 11 20 55.00
kmac_err_chk 1 2 50.00
rom_ctrl_kmac_err_chk 3600.000s 0.000us 1 2 50.00
alert_test 10 10 100.00
rom_ctrl_alert_test 3.000s 66.129us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
rom_ctrl_tl_errors 7.000s 398.666us 25 25 100.00
tl_d_illegal_access 25 25 100.00
rom_ctrl_tl_errors 7.000s 398.666us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
rom_ctrl_csr_hw_reset 3.000s 54.935us 1 1 100.00
rom_ctrl_csr_rw 3.000s 67.710us 5 5 100.00
rom_ctrl_csr_aliasing 2.000s 106.053us 1 1 100.00
rom_ctrl_same_csr_outstanding 4.000s 55.140us 5 5 100.00
tl_d_partial_access 12 12 100.00
rom_ctrl_csr_hw_reset 3.000s 54.935us 1 1 100.00
rom_ctrl_csr_rw 3.000s 67.710us 5 5 100.00
rom_ctrl_csr_aliasing 2.000s 106.053us 1 1 100.00
rom_ctrl_same_csr_outstanding 4.000s 55.140us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
corrupt_sig_fatal_chk 0 20 0.00
rom_ctrl_corrupt_sig_fatal_chk 3601.000s 0.000us 0 20 0.00
passthru_mem_tl_intg_err 5 5 100.00
rom_ctrl_passthru_mem_tl_intg_err 9.000s 757.319us 5 5 100.00
tl_intg_err 30 30 100.00
rom_ctrl_sec_cm 140.000s 609.470us 5 5 100.00
rom_ctrl_tl_intg_err 34.000s 691.289us 25 25 100.00
prim_fsm_check 5 5 100.00
rom_ctrl_sec_cm 140.000s 609.470us 5 5 100.00
prim_count_check 5 5 100.00
rom_ctrl_sec_cm 140.000s 609.470us 5 5 100.00
sec_cm_checker_ctr_consistency 0 20 0.00
rom_ctrl_corrupt_sig_fatal_chk 3601.000s 0.000us 0 20 0.00
sec_cm_checker_ctrl_flow_consistency 0 20 0.00
rom_ctrl_corrupt_sig_fatal_chk 3601.000s 0.000us 0 20 0.00
sec_cm_checker_fsm_local_esc 0 20 0.00
rom_ctrl_corrupt_sig_fatal_chk 3601.000s 0.000us 0 20 0.00
sec_cm_compare_ctrl_flow_consistency 0 20 0.00
rom_ctrl_corrupt_sig_fatal_chk 3601.000s 0.000us 0 20 0.00
sec_cm_compare_ctr_consistency 0 20 0.00
rom_ctrl_corrupt_sig_fatal_chk 3601.000s 0.000us 0 20 0.00
sec_cm_compare_ctr_redun 5 5 100.00
rom_ctrl_sec_cm 140.000s 609.470us 5 5 100.00
sec_cm_fsm_sparse 5 5 100.00
rom_ctrl_sec_cm 140.000s 609.470us 5 5 100.00
sec_cm_mem_scramble 2 2 100.00
rom_ctrl_smoke 4.000s 233.734us 2 2 100.00
sec_cm_mem_digest 2 2 100.00
rom_ctrl_smoke 4.000s 233.734us 2 2 100.00
sec_cm_intersig_mubi 2 2 100.00
rom_ctrl_smoke 4.000s 233.734us 2 2 100.00
sec_cm_bus_integrity 25 25 100.00
rom_ctrl_tl_intg_err 34.000s 691.289us 25 25 100.00
sec_cm_bus_local_esc 1 22 4.55
rom_ctrl_corrupt_sig_fatal_chk 3601.000s 0.000us 0 20 0.00
rom_ctrl_kmac_err_chk 3600.000s 0.000us 1 2 50.00
sec_cm_mux_mubi 0 20 0.00
rom_ctrl_corrupt_sig_fatal_chk 3601.000s 0.000us 0 20 0.00
sec_cm_mux_consistency 0 20 0.00
rom_ctrl_corrupt_sig_fatal_chk 3601.000s 0.000us 0 20 0.00
sec_cm_ctrl_redun 0 20 0.00
rom_ctrl_corrupt_sig_fatal_chk 3601.000s 0.000us 0 20 0.00
sec_cm_ctrl_mem_integrity 5 5 100.00
rom_ctrl_passthru_mem_tl_intg_err 9.000s 757.319us 5 5 100.00
sec_cm_tlul_fifo_ctr_redun 5 5 100.00
rom_ctrl_sec_cm 140.000s 609.470us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 8 20 40.00
rom_ctrl_stress_all_with_rand_reset 3601.000s 0.000us 8 20 40.00

Error Messages

   Test seed line log context
Job timed out after * minutes 39 test runs
rom_ctrl_corrupt_sig_fatal_chk 85543779696501765624817780187331746236890788360669139113460248984052630633615 None
rom_ctrl_kmac_err_chk 27150549479765455004627179003130178904061139791109324601779545399309267049976 None
rom_ctrl_stress_all_with_rand_reset 27662432049730195763720767320828961548058565294200055150738767258284906687217 None
rom_ctrl_stress_all 21936687040021654256468886395747454162816197114559983291092100450325911613479 None
rom_ctrl_corrupt_sig_fatal_chk 17269579071529423432361929746525935587360346878803358182245896451027377266340 None
rom_ctrl_stress_all_with_rand_reset 4646306227310953026860122922238866287617993642549794337359807126598515409408 None
rom_ctrl_stress_all 97690720695115487891131754824165893447893232847691917477902355127037446162746 None
rom_ctrl_corrupt_sig_fatal_chk 100961943638374970688357477293238321428058595739841473580011371119188870093587 None
rom_ctrl_stress_all_with_rand_reset 83157984149896086949692379677476855601998818034240575253656213744226752469785 None
rom_ctrl_stress_all 80867002523180397128782161891083215425346560027376241157278789092906999877369 None
rom_ctrl_corrupt_sig_fatal_chk 22421051533090710057665161610251110432461330708939929894742826790094656307892 None
rom_ctrl_corrupt_sig_fatal_chk 43275750929647509921237811807658842064168863374364931258424394416485132654850 None
rom_ctrl_stress_all 48367287944956735647038172158680854045523256098477017378896447440519672583612 None
rom_ctrl_corrupt_sig_fatal_chk 60898253905465855845758326437208067739375895017195400998315430028530205487858 None
rom_ctrl_stress_all_with_rand_reset 92378610805144924182901158431333791040046370602896985955175893486574937610885 None
rom_ctrl_corrupt_sig_fatal_chk 36294363945343594195902302348219853242376323562385648177904553401984395735308 None
rom_ctrl_stress_all 41220792730949014379681054895235480828342697771031363432602419784927458471302 None
rom_ctrl_corrupt_sig_fatal_chk 110864345595074816981114060643751887426342412830754281000495490586366617497201 None
rom_ctrl_stress_all 4399868419071638824935373210169555152131717856847148865847707122883223679776 None
rom_ctrl_corrupt_sig_fatal_chk 59236672381477170996125119726519647700829999066550416656620766611123073864668 None
rom_ctrl_stress_all_with_rand_reset 44339343659476474430577626854803120555445191018383181390471313872852826185093 None
rom_ctrl_stress_all 8900133092327926820106455937596430761167223943561812821917089308972205832903 None
rom_ctrl_corrupt_sig_fatal_chk 15005354734184619594299489584661870687294853435527925769935355694323504510745 None
rom_ctrl_corrupt_sig_fatal_chk 64392476568611893619454308677034474266927772700915094875708827861747609547072 None
rom_ctrl_stress_all_with_rand_reset 110299969080113886585707537477492509844212591136871585137565245908671459173921 None
rom_ctrl_corrupt_sig_fatal_chk 71225051449363595848199136988211746498112269615116580743313676377490288962178 None
rom_ctrl_corrupt_sig_fatal_chk 25209081839968541776135347842060306897820863486820774755631856806788634152008 None
rom_ctrl_corrupt_sig_fatal_chk 85250765880612308332913092268832249282120292816025061685451131750503318843283 None
rom_ctrl_corrupt_sig_fatal_chk 63368321789600235162243234942451538274696209526254978704043104255311997962253 None
rom_ctrl_stress_all 65405791616119709399484728568555249064389294956459866658177929454161573143908 None
rom_ctrl_corrupt_sig_fatal_chk 18834463508236710950983240944924292886033487837936461346097089388605269744914 None
rom_ctrl_stress_all 52110093115610373927461329849712637278409513432510974613716235159841148529194 None
rom_ctrl_corrupt_sig_fatal_chk 6907412689227059323744059850791951560981399668906668811008876805443137543877 None
rom_ctrl_stress_all_with_rand_reset 88245651451680089353257632681901368770268951466941895465260276607566618914003 None
rom_ctrl_corrupt_sig_fatal_chk 72853043973351802647804169957086584570348651188543420790536385669202119488906 None
rom_ctrl_stress_all_with_rand_reset 65406897154239868791397846147018365380711546907705329418733432756461331254481 None
rom_ctrl_corrupt_sig_fatal_chk 14249674119910579608382800578919545418001552517468117008990508961787945343326 None
rom_ctrl_corrupt_sig_fatal_chk 5723573013010197739787807716589485175885229619243939758339871651907304551990 None
rom_ctrl_stress_all_with_rand_reset 27225331675288494039422167611126256335896452403762349688289322776808214087120 None
UVM_ERROR (cip_base_scoreboard.sv:425) scoreboard [scoreboard] Waited * cycles but did not see alert fatal. (Max wait calculated ALERT_B2B_DELAY + max_delay + * = * + * + *) 3 test runs
rom_ctrl_stress_all_with_rand_reset 9759364535460427831619261639064077585016487471714319715693050074401494404639 92
UVM_INFO @ 1508341295 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rom_ctrl_stress_all_with_rand_reset 81705101886860854101038262584966130168490412813459069395076399052671369939498 92
UVM_INFO @ 330432345 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rom_ctrl_stress_all_with_rand_reset 39737407885769418031598077301514827229088006921381899574723498264163284172483 90
UVM_INFO @ 484544965 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (rom_ctrl_throughput_vseq.sv:52) [rom_ctrl_throughput_vseq] Check failed num_cycles == num_mem_reads + * (* [*] vs * [*]) 2 test runs
rom_ctrl_max_throughput_chk 47222668989511479534523404781471784408118450861294170472193474198188343845993 88
UVM_INFO @ 4026810 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rom_ctrl_max_throughput_chk 76153430097928786423809115773814450523666555277628719166014470510033215651027 88
UVM_INFO @ 10046659 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---