Simulation Results: ac_range_check

 
28/08/2026 21:54:34 DVSim: v1.49.0 sha: a099412 json Branch: master Tool: xcelium [unknown]
Validation stages
V1
0.00%
V2
10.23%
V2S
0.00%
V3
0.00%
unmapped
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_smoke 0 20 0.00
ac_range_check_smoke 1.375s 0.000us 0 20 0.00
ac_range_check_smoke_racl 0 20 0.00
ac_range_check_smoke_racl 1.349s 0.000us 0 20 0.00
csr_hw_reset 0 1 0.00
ac_range_check_csr_hw_reset 0.906s 0.000us 0 1 0.00
csr_rw 0 5 0.00
ac_range_check_csr_rw 0.880s 0.000us 0 5 0.00
csr_bit_bash 0 1 0.00
ac_range_check_csr_bit_bash 0.861s 0.000us 0 1 0.00
csr_aliasing 0 1 0.00
ac_range_check_csr_aliasing 0.892s 0.000us 0 1 0.00
csr_mem_rw_with_rand_reset 0 5 0.00
ac_range_check_csr_mem_rw_with_rand_reset 1.303s 0.000us 0 5 0.00
regwen_csr_and_corresponding_lockable_csr 0 6 0.00
ac_range_check_csr_rw 0.880s 0.000us 0 5 0.00
ac_range_check_csr_aliasing 0.892s 0.000us 0 1 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_lock_range 0 20 0.00
ac_range_check_lock_range 0.907s 0.000us 0 20 0.00
ac_range_bypass_enable 0 1 0.00
ac_range_check_bypass 0.855s 0.000us 0 1 0.00
stress_all 9 10 90.00
ac_range_check_stress_all 206.000s 48635.487us 9 10 90.00
alert_test 0 10 0.00
ac_range_check_alert_test 1.303s 0.000us 0 10 0.00
intr_test 0 10 0.00
ac_range_check_intr_test 1.360s 0.000us 0 10 0.00
tl_d_oob_addr_access 0 25 0.00
ac_range_check_tl_errors 1.829s 0.000us 0 25 0.00
tl_d_illegal_access 0 25 0.00
ac_range_check_tl_errors 1.829s 0.000us 0 25 0.00
tl_d_outstanding_access 0 12 0.00
ac_range_check_csr_hw_reset 0.906s 0.000us 0 1 0.00
ac_range_check_csr_rw 0.880s 0.000us 0 5 0.00
ac_range_check_csr_aliasing 0.892s 0.000us 0 1 0.00
ac_range_check_same_csr_outstanding 1.475s 0.000us 0 5 0.00
tl_d_partial_access 0 12 0.00
ac_range_check_csr_hw_reset 0.906s 0.000us 0 1 0.00
ac_range_check_csr_rw 0.880s 0.000us 0 5 0.00
ac_range_check_csr_aliasing 0.892s 0.000us 0 1 0.00
ac_range_check_same_csr_outstanding 1.475s 0.000us 0 5 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 0 20 0.00
ac_range_check_shadow_reg_errors 1.408s 0.000us 0 20 0.00
shadow_reg_read_clear_staged_value 0 20 0.00
ac_range_check_shadow_reg_errors 1.408s 0.000us 0 20 0.00
shadow_reg_storage_error 0 20 0.00
ac_range_check_shadow_reg_errors 1.408s 0.000us 0 20 0.00
shadowed_reset_glitch 0 20 0.00
ac_range_check_shadow_reg_errors 1.408s 0.000us 0 20 0.00
shadow_reg_update_error_with_csr_rw 0 20 0.00
ac_range_check_shadow_reg_errors_with_csr_rw 1.808s 0.000us 0 20 0.00
tl_intg_err 0 30 0.00
ac_range_check_sec_cm 0.879s 0.000us 0 5 0.00
ac_range_check_tl_intg_err 1.805s 0.000us 0 25 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 10 0.00
ac_range_check_stress_all_with_rand_reset 1.358s 0.000us 0 10 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 0 20 0.00
ac_range_check_smoke_high_threshold 0.901s 0.000us 0 20 0.00

Error Messages

   Test seed line log context
Some pass patterns missing: ['^TEST PASSED (UVM_)?CHECKS$'] 224 test runs
ac_range_check_smoke 25508423428962798140177292041332369229789586029855854834300062171146789075588 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_smoke/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=3155442308 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/0.ac_range_check_smoke.3155442308 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 0.ac_range_check_smoke.3155442308 -covoverwrite' seed=25508423428962798140177292041332369229789586029855854834300062171146789075588 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=25508423428962798140177292041332369229789586029855854834300062171146789075588 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_racl 9621727509530377096389809376265627007434622814979083446246515103439993573183 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_smoke_racl/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=457051967 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_racl_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/0.ac_range_check_smoke_racl.457051967 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 0.ac_range_check_smoke_racl.457051967 -covoverwrite' seed=9621727509530377096389809376265627007434622814979083446246515103439993573183 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=9621727509530377096389809376265627007434622814979083446246515103439993573183 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_smoke_racl/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_racl_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_high_threshold 49618427840016485998267702545053357006673655367891620780596581771282633310102 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_smoke_high_threshold/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=1513209750 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_high_threshold_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/0.ac_range_check_smoke_high_threshold.1513209750 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 0.ac_range_check_smoke_high_threshold.1513209750 -covoverwrite' seed=49618427840016485998267702545053357006673655367891620780596581771282633310102 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=49618427840016485998267702545053357006673655367891620780596581771282633310102 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_smoke_high_threshold/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_high_threshold_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_bypass 38151216616657959101956474959921600080136323572876816522469480648613518940230 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_bypass/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=3137902662 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_bypass_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/0.ac_range_check_bypass.3137902662 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 0.ac_range_check_bypass.3137902662 -covoverwrite' seed=38151216616657959101956474959921600080136323572876816522469480648613518940230 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=38151216616657959101956474959921600080136323572876816522469480648613518940230 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_bypass/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_bypass_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_lock_range 30346039517723865025238918233710498008354555446790478758730137111023138541309 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_lock_range/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=1407094525 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_lock_range_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/0.ac_range_check_lock_range.1407094525 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 0.ac_range_check_lock_range.1407094525 -covoverwrite' seed=30346039517723865025238918233710498008354555446790478758730137111023138541309 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=30346039517723865025238918233710498008354555446790478758730137111023138541309 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_lock_range/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_lock_range_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_stress_all_with_rand_reset 91485240760931011531186842528476541800973245468158705182885881981664462555776 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_stress_all_with_rand_reset/latest run_opts='+run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=ac_range_check_stress_all_vseq +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=606521984 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/0.ac_range_check_stress_all_with_rand_reset.606521984 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 0.ac_range_check_stress_all_with_rand_reset.606521984 -covoverwrite' seed=91485240760931011531186842528476541800973245468158705182885881981664462555776 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=91485240760931011531186842528476541800973245468158705182885881981664462555776 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_sec_cm 64698037569316258057148414402735086558008403595419411877055613387684111486306 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_sec_cm/latest run_opts='+run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=3769404770 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/0.ac_range_check_sec_cm.3769404770 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 0.ac_range_check_sec_cm.3769404770 -covoverwrite' seed=64698037569316258057148414402735086558008403595419411877055613387684111486306 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=64698037569316258057148414402735086558008403595419411877055613387684111486306 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_sec_cm/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_errors 24270865116275492253795414468947052329407205896768863299228628673888908440860 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_tl_errors/latest run_opts='+run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=216233244 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/0.ac_range_check_tl_errors.216233244 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 0.ac_range_check_tl_errors.216233244 -covoverwrite' seed=24270865116275492253795414468947052329407205896768863299228628673888908440860 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=24270865116275492253795414468947052329407205896768863299228628673888908440860 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_intg_err 37010235980057999315957231261033495654441556472485071892925586060040878373615 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1114585839 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/0.ac_range_check_tl_intg_err.1114585839 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 0.ac_range_check_tl_intg_err.1114585839 -covoverwrite' seed=37010235980057999315957231261033495654441556472485071892925586060040878373615 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=37010235980057999315957231261033495654441556472485071892925586060040878373615 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors 92955859632142134954576205588276134605997433157556514805208378169708248067208 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_shadow_reg_errors/latest run_opts='+run_shadow_reg_errors +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=89156744 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/0.ac_range_check_shadow_reg_errors.89156744 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 0.ac_range_check_shadow_reg_errors.89156744 -covoverwrite' seed=92955859632142134954576205588276134605997433157556514805208378169708248067208 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=92955859632142134954576205588276134605997433157556514805208378169708248067208 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_shadow_reg_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors_with_csr_rw 47355194626606071381751109357226203344048801125145892944878898910246329319208 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_shadow_reg_errors_with_csr_rw/latest run_opts='+run_shadow_reg_errors_with_csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3898801960 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/0.ac_range_check_shadow_reg_errors_with_csr_rw.3898801960 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 0.ac_range_check_shadow_reg_errors_with_csr_rw.3898801960 -covoverwrite' seed=47355194626606071381751109357226203344048801125145892944878898910246329319208 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=47355194626606071381751109357226203344048801125145892944878898910246329319208 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_shadow_reg_errors_with_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_alert_test 91890068237380407015067220377170359073106909272144995178005687850925269786112 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_alert_test/latest run_opts='+run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=4266991104 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/0.ac_range_check_alert_test.4266991104 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 0.ac_range_check_alert_test.4266991104 -covoverwrite' seed=91890068237380407015067220377170359073106909272144995178005687850925269786112 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=91890068237380407015067220377170359073106909272144995178005687850925269786112 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_intr_test 97966669470523414750392552364656150014619470848169382643822597160898522367255 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_intr_test/latest run_opts='+run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1797637399 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/0.ac_range_check_intr_test.1797637399 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 0.ac_range_check_intr_test.1797637399 -covoverwrite' seed=97966669470523414750392552364656150014619470848169382643822597160898522367255 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=97966669470523414750392552364656150014619470848169382643822597160898522367255 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_csr_hw_reset 30286858000173207491551300216906281586450584155231251715553942641802251093678 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_csr_hw_reset/latest run_opts='+csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3766503086 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/0.ac_range_check_csr_hw_reset.3766503086 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 0.ac_range_check_csr_hw_reset.3766503086 -covoverwrite' seed=30286858000173207491551300216906281586450584155231251715553942641802251093678 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=30286858000173207491551300216906281586450584155231251715553942641802251093678 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_csr_hw_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_csr_rw 83276742582146061588862566236029220527239605548867809800001728187019756088270 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_csr_rw/latest run_opts='+csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1593879502 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/0.ac_range_check_csr_rw.1593879502 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 0.ac_range_check_csr_rw.1593879502 -covoverwrite' seed=83276742582146061588862566236029220527239605548867809800001728187019756088270 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=83276742582146061588862566236029220527239605548867809800001728187019756088270 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_csr_bit_bash 29276604196494258615694495688263624250578420333691871630912959244648715186873 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_csr_bit_bash/latest run_opts='+csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1818030777 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/0.ac_range_check_csr_bit_bash.1818030777 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 0.ac_range_check_csr_bit_bash.1818030777 -covoverwrite' seed=29276604196494258615694495688263624250578420333691871630912959244648715186873 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=29276604196494258615694495688263624250578420333691871630912959244648715186873 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_csr_bit_bash/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_csr_aliasing 28181555409830331735259476769487551687299326341706813609376047417787840697895 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_csr_aliasing/latest run_opts='+csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3804730919 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/0.ac_range_check_csr_aliasing.3804730919 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 0.ac_range_check_csr_aliasing.3804730919 -covoverwrite' seed=28181555409830331735259476769487551687299326341706813609376047417787840697895 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=28181555409830331735259476769487551687299326341706813609376047417787840697895 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_csr_aliasing/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_same_csr_outstanding 34713194414649930948440900141800145245818062676132527568930556691608784904377 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_same_csr_outstanding/latest run_opts='+run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2992152761 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/0.ac_range_check_same_csr_outstanding.2992152761 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 0.ac_range_check_same_csr_outstanding.2992152761 -covoverwrite' seed=34713194414649930948440900141800145245818062676132527568930556691608784904377 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=34713194414649930948440900141800145245818062676132527568930556691608784904377 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_same_csr_outstanding/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_csr_mem_rw_with_rand_reset 107310190286823810397636049205227904729897810578620918563907708296285017948760 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_csr_mem_rw_with_rand_reset/latest run_opts='+run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1332036184 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/0.ac_range_check_csr_mem_rw_with_rand_reset.1332036184 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 0.ac_range_check_csr_mem_rw_with_rand_reset.1332036184 -covoverwrite' seed=107310190286823810397636049205227904729897810578620918563907708296285017948760 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=107310190286823810397636049205227904729897810578620918563907708296285017948760 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/0.ac_range_check_csr_mem_rw_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke 88140427822027616934532409610284642050756549334850625173279538014692579122379 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_smoke/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=3963264203 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/1.ac_range_check_smoke.3963264203 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 1.ac_range_check_smoke.3963264203 -covoverwrite' seed=88140427822027616934532409610284642050756549334850625173279538014692579122379 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=88140427822027616934532409610284642050756549334850625173279538014692579122379 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_racl 97779619836955744218561487226791625034692153748997528584639302377602757956698 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_smoke_racl/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=671618138 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_racl_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/1.ac_range_check_smoke_racl.671618138 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 1.ac_range_check_smoke_racl.671618138 -covoverwrite' seed=97779619836955744218561487226791625034692153748997528584639302377602757956698 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=97779619836955744218561487226791625034692153748997528584639302377602757956698 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_smoke_racl/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_racl_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_high_threshold 45662710743396416110345900108521347777395559515125167970067436980301446671570 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_smoke_high_threshold/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=1107193042 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_high_threshold_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/1.ac_range_check_smoke_high_threshold.1107193042 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 1.ac_range_check_smoke_high_threshold.1107193042 -covoverwrite' seed=45662710743396416110345900108521347777395559515125167970067436980301446671570 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=45662710743396416110345900108521347777395559515125167970067436980301446671570 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_smoke_high_threshold/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_high_threshold_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_lock_range 53447332707803235901912282256591733786644100439037074243085856010517127389654 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_lock_range/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=1702126038 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_lock_range_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/1.ac_range_check_lock_range.1702126038 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 1.ac_range_check_lock_range.1702126038 -covoverwrite' seed=53447332707803235901912282256591733786644100439037074243085856010517127389654 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=53447332707803235901912282256591733786644100439037074243085856010517127389654 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_lock_range/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_lock_range_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_stress_all_with_rand_reset 53425525214526813260891593221559668286963952383472791395959820217537261112152 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_stress_all_with_rand_reset/latest run_opts='+run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=ac_range_check_stress_all_vseq +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=2860157784 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/1.ac_range_check_stress_all_with_rand_reset.2860157784 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 1.ac_range_check_stress_all_with_rand_reset.2860157784 -covoverwrite' seed=53425525214526813260891593221559668286963952383472791395959820217537261112152 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=53425525214526813260891593221559668286963952383472791395959820217537261112152 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_sec_cm 99935532649817586952205609148319715004485202342078535453198053263139361001032 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_sec_cm/latest run_opts='+run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=347344456 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/1.ac_range_check_sec_cm.347344456 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 1.ac_range_check_sec_cm.347344456 -covoverwrite' seed=99935532649817586952205609148319715004485202342078535453198053263139361001032 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=99935532649817586952205609148319715004485202342078535453198053263139361001032 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_sec_cm/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_errors 30418539177267852892358619313883623540745916582985209716330200830958892775404 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_tl_errors/latest run_opts='+run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1948022764 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/1.ac_range_check_tl_errors.1948022764 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 1.ac_range_check_tl_errors.1948022764 -covoverwrite' seed=30418539177267852892358619313883623540745916582985209716330200830958892775404 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=30418539177267852892358619313883623540745916582985209716330200830958892775404 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_intg_err 74888809656657415259451725656220311970436742335756787300247055671747396269822 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=4287657726 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/1.ac_range_check_tl_intg_err.4287657726 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 1.ac_range_check_tl_intg_err.4287657726 -covoverwrite' seed=74888809656657415259451725656220311970436742335756787300247055671747396269822 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=74888809656657415259451725656220311970436742335756787300247055671747396269822 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors 69221390079361740722288244972973574607417523045330671285622399388543715854286 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_shadow_reg_errors/latest run_opts='+run_shadow_reg_errors +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2409842638 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/1.ac_range_check_shadow_reg_errors.2409842638 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 1.ac_range_check_shadow_reg_errors.2409842638 -covoverwrite' seed=69221390079361740722288244972973574607417523045330671285622399388543715854286 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=69221390079361740722288244972973574607417523045330671285622399388543715854286 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_shadow_reg_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors_with_csr_rw 99955248862076169196204564580250182554893324978719107728044576555990094943034 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_shadow_reg_errors_with_csr_rw/latest run_opts='+run_shadow_reg_errors_with_csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2246808378 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/1.ac_range_check_shadow_reg_errors_with_csr_rw.2246808378 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 1.ac_range_check_shadow_reg_errors_with_csr_rw.2246808378 -covoverwrite' seed=99955248862076169196204564580250182554893324978719107728044576555990094943034 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=99955248862076169196204564580250182554893324978719107728044576555990094943034 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_shadow_reg_errors_with_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_alert_test 44151919209227386068617216511447980528281433664058609477230415874722304447975 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_alert_test/latest run_opts='+run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=184374759 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/1.ac_range_check_alert_test.184374759 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 1.ac_range_check_alert_test.184374759 -covoverwrite' seed=44151919209227386068617216511447980528281433664058609477230415874722304447975 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=44151919209227386068617216511447980528281433664058609477230415874722304447975 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_intr_test 75759011691300243763059273001986336628208543825024453615693917035186570020650 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_intr_test/latest run_opts='+run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2535343914 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/1.ac_range_check_intr_test.2535343914 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 1.ac_range_check_intr_test.2535343914 -covoverwrite' seed=75759011691300243763059273001986336628208543825024453615693917035186570020650 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=75759011691300243763059273001986336628208543825024453615693917035186570020650 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_csr_rw 56623762732702231956371107465421400227626277468582275934815200537784783153482 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_csr_rw/latest run_opts='+csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=136784202 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/1.ac_range_check_csr_rw.136784202 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 1.ac_range_check_csr_rw.136784202 -covoverwrite' seed=56623762732702231956371107465421400227626277468582275934815200537784783153482 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=56623762732702231956371107465421400227626277468582275934815200537784783153482 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_same_csr_outstanding 83151582476018498762911548211453987208091847060231310950287596539631373856092 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_same_csr_outstanding/latest run_opts='+run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1935093084 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/1.ac_range_check_same_csr_outstanding.1935093084 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 1.ac_range_check_same_csr_outstanding.1935093084 -covoverwrite' seed=83151582476018498762911548211453987208091847060231310950287596539631373856092 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=83151582476018498762911548211453987208091847060231310950287596539631373856092 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_same_csr_outstanding/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_csr_mem_rw_with_rand_reset 48437393913764084216077285161666123537424401321069470921783884383067240099560 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_csr_mem_rw_with_rand_reset/latest run_opts='+run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=246640360 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/1.ac_range_check_csr_mem_rw_with_rand_reset.246640360 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 1.ac_range_check_csr_mem_rw_with_rand_reset.246640360 -covoverwrite' seed=48437393913764084216077285161666123537424401321069470921783884383067240099560 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=48437393913764084216077285161666123537424401321069470921783884383067240099560 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/1.ac_range_check_csr_mem_rw_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke 14090188518866753916628166740692543797603849307035336945322865624517139114648 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_smoke/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=2639932056 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/2.ac_range_check_smoke.2639932056 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 2.ac_range_check_smoke.2639932056 -covoverwrite' seed=14090188518866753916628166740692543797603849307035336945322865624517139114648 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=14090188518866753916628166740692543797603849307035336945322865624517139114648 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_racl 65209674418637183545190804406946039924449970152882521922540288485537085329529 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_smoke_racl/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=620695673 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_racl_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/2.ac_range_check_smoke_racl.620695673 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 2.ac_range_check_smoke_racl.620695673 -covoverwrite' seed=65209674418637183545190804406946039924449970152882521922540288485537085329529 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=65209674418637183545190804406946039924449970152882521922540288485537085329529 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_smoke_racl/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_racl_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_high_threshold 39107521198400118058782035437334189733348512744320894698081884866068827966889 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_smoke_high_threshold/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=2402127273 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_high_threshold_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/2.ac_range_check_smoke_high_threshold.2402127273 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 2.ac_range_check_smoke_high_threshold.2402127273 -covoverwrite' seed=39107521198400118058782035437334189733348512744320894698081884866068827966889 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=39107521198400118058782035437334189733348512744320894698081884866068827966889 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_smoke_high_threshold/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_high_threshold_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_lock_range 66578426474170631570466591154468630058299812543058529043095531473824866363422 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_lock_range/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=1049618462 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_lock_range_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/2.ac_range_check_lock_range.1049618462 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 2.ac_range_check_lock_range.1049618462 -covoverwrite' seed=66578426474170631570466591154468630058299812543058529043095531473824866363422 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=66578426474170631570466591154468630058299812543058529043095531473824866363422 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_lock_range/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_lock_range_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_stress_all_with_rand_reset 56166873295493902221601965984411937543326115445457108199897016655245567373968 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_stress_all_with_rand_reset/latest run_opts='+run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=ac_range_check_stress_all_vseq +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=1937027728 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/2.ac_range_check_stress_all_with_rand_reset.1937027728 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 2.ac_range_check_stress_all_with_rand_reset.1937027728 -covoverwrite' seed=56166873295493902221601965984411937543326115445457108199897016655245567373968 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=56166873295493902221601965984411937543326115445457108199897016655245567373968 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_sec_cm 25408384599618034478982222259533031936097690191745241309692500066632830871795 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_sec_cm/latest run_opts='+run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=2824399091 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/2.ac_range_check_sec_cm.2824399091 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 2.ac_range_check_sec_cm.2824399091 -covoverwrite' seed=25408384599618034478982222259533031936097690191745241309692500066632830871795 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=25408384599618034478982222259533031936097690191745241309692500066632830871795 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_sec_cm/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_errors 92119725084312019225958414338011951811050264921934372765330377609875437127221 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_tl_errors/latest run_opts='+run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=136578613 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/2.ac_range_check_tl_errors.136578613 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 2.ac_range_check_tl_errors.136578613 -covoverwrite' seed=92119725084312019225958414338011951811050264921934372765330377609875437127221 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=92119725084312019225958414338011951811050264921934372765330377609875437127221 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_intg_err 42093975551306727324150355777682438514097314653900915542389978726013443304239 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2959928111 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/2.ac_range_check_tl_intg_err.2959928111 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 2.ac_range_check_tl_intg_err.2959928111 -covoverwrite' seed=42093975551306727324150355777682438514097314653900915542389978726013443304239 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=42093975551306727324150355777682438514097314653900915542389978726013443304239 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors 98088480478464708401997635097219270184490699722669240344281943611601803547740 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_shadow_reg_errors/latest run_opts='+run_shadow_reg_errors +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=926159964 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/2.ac_range_check_shadow_reg_errors.926159964 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 2.ac_range_check_shadow_reg_errors.926159964 -covoverwrite' seed=98088480478464708401997635097219270184490699722669240344281943611601803547740 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=98088480478464708401997635097219270184490699722669240344281943611601803547740 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_shadow_reg_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors_with_csr_rw 67386622972494716760408917442340475076769036925877823229369606483126201785621 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_shadow_reg_errors_with_csr_rw/latest run_opts='+run_shadow_reg_errors_with_csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2932514069 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/2.ac_range_check_shadow_reg_errors_with_csr_rw.2932514069 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 2.ac_range_check_shadow_reg_errors_with_csr_rw.2932514069 -covoverwrite' seed=67386622972494716760408917442340475076769036925877823229369606483126201785621 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=67386622972494716760408917442340475076769036925877823229369606483126201785621 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_shadow_reg_errors_with_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_alert_test 18411310086663570529415108621537199482948916052504090120059188532041855892204 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_alert_test/latest run_opts='+run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=4037376748 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/2.ac_range_check_alert_test.4037376748 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 2.ac_range_check_alert_test.4037376748 -covoverwrite' seed=18411310086663570529415108621537199482948916052504090120059188532041855892204 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=18411310086663570529415108621537199482948916052504090120059188532041855892204 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_intr_test 56821732604872591805851357367710717102344984803903303550148220193792228815518 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_intr_test/latest run_opts='+run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=404451998 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/2.ac_range_check_intr_test.404451998 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 2.ac_range_check_intr_test.404451998 -covoverwrite' seed=56821732604872591805851357367710717102344984803903303550148220193792228815518 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=56821732604872591805851357367710717102344984803903303550148220193792228815518 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_csr_rw 93667298583065088305444963426599541838063712961969363032124384994374639764606 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_csr_rw/latest run_opts='+csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2824684670 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/2.ac_range_check_csr_rw.2824684670 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 2.ac_range_check_csr_rw.2824684670 -covoverwrite' seed=93667298583065088305444963426599541838063712961969363032124384994374639764606 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=93667298583065088305444963426599541838063712961969363032124384994374639764606 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_same_csr_outstanding 33151529810867351236333521014341408603196947695733187836868188142177950154825 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_same_csr_outstanding/latest run_opts='+run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2559361097 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/2.ac_range_check_same_csr_outstanding.2559361097 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 2.ac_range_check_same_csr_outstanding.2559361097 -covoverwrite' seed=33151529810867351236333521014341408603196947695733187836868188142177950154825 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=33151529810867351236333521014341408603196947695733187836868188142177950154825 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_same_csr_outstanding/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_csr_mem_rw_with_rand_reset 13187690221256250632612594560720591745586993894424624472345056478820397872016 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_csr_mem_rw_with_rand_reset/latest run_opts='+run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1474950032 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/2.ac_range_check_csr_mem_rw_with_rand_reset.1474950032 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 2.ac_range_check_csr_mem_rw_with_rand_reset.1474950032 -covoverwrite' seed=13187690221256250632612594560720591745586993894424624472345056478820397872016 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=13187690221256250632612594560720591745586993894424624472345056478820397872016 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/2.ac_range_check_csr_mem_rw_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke 99635961822714056071408097649430553052956024294211576651814226617351749499521 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_smoke/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=936376961 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/3.ac_range_check_smoke.936376961 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 3.ac_range_check_smoke.936376961 -covoverwrite' seed=99635961822714056071408097649430553052956024294211576651814226617351749499521 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=99635961822714056071408097649430553052956024294211576651814226617351749499521 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_racl 345841459088048632203154418905729919554754054194241946880431892136978980279 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_smoke_racl/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=837459383 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_racl_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/3.ac_range_check_smoke_racl.837459383 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 3.ac_range_check_smoke_racl.837459383 -covoverwrite' seed=345841459088048632203154418905729919554754054194241946880431892136978980279 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=345841459088048632203154418905729919554754054194241946880431892136978980279 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_smoke_racl/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_racl_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_high_threshold 105668056915876536175701305606238254051306373506312921524110614051017130909445 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_smoke_high_threshold/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=2743475973 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_high_threshold_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/3.ac_range_check_smoke_high_threshold.2743475973 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 3.ac_range_check_smoke_high_threshold.2743475973 -covoverwrite' seed=105668056915876536175701305606238254051306373506312921524110614051017130909445 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=105668056915876536175701305606238254051306373506312921524110614051017130909445 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_smoke_high_threshold/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_high_threshold_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_lock_range 19891476899645300804599130989014590494712717131812709378648063769883637272567 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_lock_range/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=4294004727 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_lock_range_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/3.ac_range_check_lock_range.4294004727 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 3.ac_range_check_lock_range.4294004727 -covoverwrite' seed=19891476899645300804599130989014590494712717131812709378648063769883637272567 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=19891476899645300804599130989014590494712717131812709378648063769883637272567 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_lock_range/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_lock_range_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_stress_all_with_rand_reset 54821154877134022960494146697562524754318641457197588129099241452276475740674 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_stress_all_with_rand_reset/latest run_opts='+run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=ac_range_check_stress_all_vseq +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=1876410882 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/3.ac_range_check_stress_all_with_rand_reset.1876410882 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 3.ac_range_check_stress_all_with_rand_reset.1876410882 -covoverwrite' seed=54821154877134022960494146697562524754318641457197588129099241452276475740674 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=54821154877134022960494146697562524754318641457197588129099241452276475740674 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_sec_cm 41190160664934629236333149492416117171204458661857277860032533116933146036107 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_sec_cm/latest run_opts='+run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=2599045003 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/3.ac_range_check_sec_cm.2599045003 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 3.ac_range_check_sec_cm.2599045003 -covoverwrite' seed=41190160664934629236333149492416117171204458661857277860032533116933146036107 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=41190160664934629236333149492416117171204458661857277860032533116933146036107 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_sec_cm/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_errors 91389923593502295814566505232852651631047060125071033150915411131280540531975 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_tl_errors/latest run_opts='+run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3252124935 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/3.ac_range_check_tl_errors.3252124935 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 3.ac_range_check_tl_errors.3252124935 -covoverwrite' seed=91389923593502295814566505232852651631047060125071033150915411131280540531975 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=91389923593502295814566505232852651631047060125071033150915411131280540531975 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_intg_err 49071535875485993378001494129162553398435217089247497952561400810981496492412 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=743477628 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/3.ac_range_check_tl_intg_err.743477628 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 3.ac_range_check_tl_intg_err.743477628 -covoverwrite' seed=49071535875485993378001494129162553398435217089247497952561400810981496492412 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=49071535875485993378001494129162553398435217089247497952561400810981496492412 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors 36513671698095963610908521666968254051109455942223625131647949306605666208099 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_shadow_reg_errors/latest run_opts='+run_shadow_reg_errors +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2823194979 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/3.ac_range_check_shadow_reg_errors.2823194979 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 3.ac_range_check_shadow_reg_errors.2823194979 -covoverwrite' seed=36513671698095963610908521666968254051109455942223625131647949306605666208099 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=36513671698095963610908521666968254051109455942223625131647949306605666208099 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_shadow_reg_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors_with_csr_rw 79141536918496027152931314718517088197035413676912608381016944756761334362173 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_shadow_reg_errors_with_csr_rw/latest run_opts='+run_shadow_reg_errors_with_csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2161881149 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/3.ac_range_check_shadow_reg_errors_with_csr_rw.2161881149 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 3.ac_range_check_shadow_reg_errors_with_csr_rw.2161881149 -covoverwrite' seed=79141536918496027152931314718517088197035413676912608381016944756761334362173 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=79141536918496027152931314718517088197035413676912608381016944756761334362173 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_shadow_reg_errors_with_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_alert_test 92929430954149419102249894826499365464621379657900342584856288008224636637892 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_alert_test/latest run_opts='+run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=3678114500 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/3.ac_range_check_alert_test.3678114500 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 3.ac_range_check_alert_test.3678114500 -covoverwrite' seed=92929430954149419102249894826499365464621379657900342584856288008224636637892 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=92929430954149419102249894826499365464621379657900342584856288008224636637892 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_intr_test 71416674918315493819492569055446920502171123098000312391662994839478302528831 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_intr_test/latest run_opts='+run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2881082687 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/3.ac_range_check_intr_test.2881082687 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 3.ac_range_check_intr_test.2881082687 -covoverwrite' seed=71416674918315493819492569055446920502171123098000312391662994839478302528831 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=71416674918315493819492569055446920502171123098000312391662994839478302528831 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_csr_rw 52431396726990324634150547219960852736633779834255743376335181494824633215313 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_csr_rw/latest run_opts='+csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3165759825 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/3.ac_range_check_csr_rw.3165759825 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 3.ac_range_check_csr_rw.3165759825 -covoverwrite' seed=52431396726990324634150547219960852736633779834255743376335181494824633215313 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=52431396726990324634150547219960852736633779834255743376335181494824633215313 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_same_csr_outstanding 53434061745244214895637254307588771066639052128711427360817007616635790503117 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_same_csr_outstanding/latest run_opts='+run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1624321229 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/3.ac_range_check_same_csr_outstanding.1624321229 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 3.ac_range_check_same_csr_outstanding.1624321229 -covoverwrite' seed=53434061745244214895637254307588771066639052128711427360817007616635790503117 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=53434061745244214895637254307588771066639052128711427360817007616635790503117 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_same_csr_outstanding/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_csr_mem_rw_with_rand_reset 23719606499360841943898830099548985960677016215299876605928590663516356795961 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_csr_mem_rw_with_rand_reset/latest run_opts='+run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1088085561 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/3.ac_range_check_csr_mem_rw_with_rand_reset.1088085561 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 3.ac_range_check_csr_mem_rw_with_rand_reset.1088085561 -covoverwrite' seed=23719606499360841943898830099548985960677016215299876605928590663516356795961 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=23719606499360841943898830099548985960677016215299876605928590663516356795961 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/3.ac_range_check_csr_mem_rw_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke 107540003108256974055642513748521490047026974288542761892080430711546676056321 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_smoke/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=1913196801 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/4.ac_range_check_smoke.1913196801 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 4.ac_range_check_smoke.1913196801 -covoverwrite' seed=107540003108256974055642513748521490047026974288542761892080430711546676056321 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=107540003108256974055642513748521490047026974288542761892080430711546676056321 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_racl 58558654423969002165871215452201765521730555922974251222166525302001101603536 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_smoke_racl/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=2886632144 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_racl_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/4.ac_range_check_smoke_racl.2886632144 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 4.ac_range_check_smoke_racl.2886632144 -covoverwrite' seed=58558654423969002165871215452201765521730555922974251222166525302001101603536 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=58558654423969002165871215452201765521730555922974251222166525302001101603536 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_smoke_racl/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_racl_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_high_threshold 13930978975336861298024719139632117478601751218484907897031596049043143412763 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_smoke_high_threshold/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=1006783515 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_high_threshold_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/4.ac_range_check_smoke_high_threshold.1006783515 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 4.ac_range_check_smoke_high_threshold.1006783515 -covoverwrite' seed=13930978975336861298024719139632117478601751218484907897031596049043143412763 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=13930978975336861298024719139632117478601751218484907897031596049043143412763 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_smoke_high_threshold/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_high_threshold_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_lock_range 33236814767115897638347136297357929992206722606470709560853288690955113937793 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_lock_range/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=4171447169 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_lock_range_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/4.ac_range_check_lock_range.4171447169 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 4.ac_range_check_lock_range.4171447169 -covoverwrite' seed=33236814767115897638347136297357929992206722606470709560853288690955113937793 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=33236814767115897638347136297357929992206722606470709560853288690955113937793 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_lock_range/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_lock_range_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_stress_all_with_rand_reset 102938021329182854066380473324347616349598798008767586585411509342921431069575 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_stress_all_with_rand_reset/latest run_opts='+run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=ac_range_check_stress_all_vseq +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=1475228551 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/4.ac_range_check_stress_all_with_rand_reset.1475228551 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 4.ac_range_check_stress_all_with_rand_reset.1475228551 -covoverwrite' seed=102938021329182854066380473324347616349598798008767586585411509342921431069575 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=102938021329182854066380473324347616349598798008767586585411509342921431069575 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_sec_cm 26221891712991208523538752887975475984624637460696239705412804108099463667374 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_sec_cm/latest run_opts='+run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=3894140590 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/4.ac_range_check_sec_cm.3894140590 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 4.ac_range_check_sec_cm.3894140590 -covoverwrite' seed=26221891712991208523538752887975475984624637460696239705412804108099463667374 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=26221891712991208523538752887975475984624637460696239705412804108099463667374 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_sec_cm/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_errors 50135394062053862402119505024185057595843860585671235726590105388671163089276 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_tl_errors/latest run_opts='+run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1765720444 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/4.ac_range_check_tl_errors.1765720444 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 4.ac_range_check_tl_errors.1765720444 -covoverwrite' seed=50135394062053862402119505024185057595843860585671235726590105388671163089276 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=50135394062053862402119505024185057595843860585671235726590105388671163089276 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_intg_err 45211311912384025661592557851180404134027284346656981832813593706094421161579 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=814298731 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/4.ac_range_check_tl_intg_err.814298731 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 4.ac_range_check_tl_intg_err.814298731 -covoverwrite' seed=45211311912384025661592557851180404134027284346656981832813593706094421161579 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=45211311912384025661592557851180404134027284346656981832813593706094421161579 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors 1237987527884273555213765609772419927290559723762840271012006962854723064427 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_shadow_reg_errors/latest run_opts='+run_shadow_reg_errors +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=242487915 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/4.ac_range_check_shadow_reg_errors.242487915 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 4.ac_range_check_shadow_reg_errors.242487915 -covoverwrite' seed=1237987527884273555213765609772419927290559723762840271012006962854723064427 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=1237987527884273555213765609772419927290559723762840271012006962854723064427 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_shadow_reg_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors_with_csr_rw 67704666398694189583275724722992893051024473749072127611059615772470657339072 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_shadow_reg_errors_with_csr_rw/latest run_opts='+run_shadow_reg_errors_with_csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=4209692352 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/4.ac_range_check_shadow_reg_errors_with_csr_rw.4209692352 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 4.ac_range_check_shadow_reg_errors_with_csr_rw.4209692352 -covoverwrite' seed=67704666398694189583275724722992893051024473749072127611059615772470657339072 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=67704666398694189583275724722992893051024473749072127611059615772470657339072 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_shadow_reg_errors_with_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_alert_test 30782922824915273730987015485648399817484978163818172019322908135214993040793 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_alert_test/latest run_opts='+run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=4015449497 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/4.ac_range_check_alert_test.4015449497 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 4.ac_range_check_alert_test.4015449497 -covoverwrite' seed=30782922824915273730987015485648399817484978163818172019322908135214993040793 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=30782922824915273730987015485648399817484978163818172019322908135214993040793 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_intr_test 76369174281137662582810300620915154362489384848121533374781759354806964189336 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_intr_test/latest run_opts='+run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1047132312 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/4.ac_range_check_intr_test.1047132312 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 4.ac_range_check_intr_test.1047132312 -covoverwrite' seed=76369174281137662582810300620915154362489384848121533374781759354806964189336 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=76369174281137662582810300620915154362489384848121533374781759354806964189336 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_csr_rw 39577738561914158847789732349024793228255443402399869049875941858476574523636 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_csr_rw/latest run_opts='+csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2975219956 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/4.ac_range_check_csr_rw.2975219956 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 4.ac_range_check_csr_rw.2975219956 -covoverwrite' seed=39577738561914158847789732349024793228255443402399869049875941858476574523636 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=39577738561914158847789732349024793228255443402399869049875941858476574523636 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_same_csr_outstanding 51254674870648428778700821751158471132711527624111033913424971063926447957644 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_same_csr_outstanding/latest run_opts='+run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2506122892 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/4.ac_range_check_same_csr_outstanding.2506122892 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 4.ac_range_check_same_csr_outstanding.2506122892 -covoverwrite' seed=51254674870648428778700821751158471132711527624111033913424971063926447957644 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=51254674870648428778700821751158471132711527624111033913424971063926447957644 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_same_csr_outstanding/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_csr_mem_rw_with_rand_reset 108192564171794484288918619940716697129851252094994228149537588015927060678489 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_csr_mem_rw_with_rand_reset/latest run_opts='+run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=782059353 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/4.ac_range_check_csr_mem_rw_with_rand_reset.782059353 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 4.ac_range_check_csr_mem_rw_with_rand_reset.782059353 -covoverwrite' seed=108192564171794484288918619940716697129851252094994228149537588015927060678489 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=108192564171794484288918619940716697129851252094994228149537588015927060678489 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/4.ac_range_check_csr_mem_rw_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke 17410627461851847020355329714677962397988517774783176433248941599899694300911 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/5.ac_range_check_smoke/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=861044463 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/5.ac_range_check_smoke.861044463 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 5.ac_range_check_smoke.861044463 -covoverwrite' seed=17410627461851847020355329714677962397988517774783176433248941599899694300911 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=17410627461851847020355329714677962397988517774783176433248941599899694300911 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/5.ac_range_check_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_racl 81856497858348405667572080556835792149348386545276038124430670153531755173114 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/5.ac_range_check_smoke_racl/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=1790285050 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_racl_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/5.ac_range_check_smoke_racl.1790285050 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 5.ac_range_check_smoke_racl.1790285050 -covoverwrite' seed=81856497858348405667572080556835792149348386545276038124430670153531755173114 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=81856497858348405667572080556835792149348386545276038124430670153531755173114 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/5.ac_range_check_smoke_racl/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_racl_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_high_threshold 114245303006908733256453845639458105145747898373219624521615647866961733872285 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/5.ac_range_check_smoke_high_threshold/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=280488605 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_high_threshold_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/5.ac_range_check_smoke_high_threshold.280488605 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 5.ac_range_check_smoke_high_threshold.280488605 -covoverwrite' seed=114245303006908733256453845639458105145747898373219624521615647866961733872285 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=114245303006908733256453845639458105145747898373219624521615647866961733872285 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/5.ac_range_check_smoke_high_threshold/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_high_threshold_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_lock_range 14562304735289316611542311016472527375952970456816575181105240428856624547450 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/5.ac_range_check_lock_range/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=2667579002 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_lock_range_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/5.ac_range_check_lock_range.2667579002 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 5.ac_range_check_lock_range.2667579002 -covoverwrite' seed=14562304735289316611542311016472527375952970456816575181105240428856624547450 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=14562304735289316611542311016472527375952970456816575181105240428856624547450 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/5.ac_range_check_lock_range/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_lock_range_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_stress_all_with_rand_reset 85855897650588760649516709772805725415855709681466251145965708046599455882244 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/5.ac_range_check_stress_all_with_rand_reset/latest run_opts='+run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=ac_range_check_stress_all_vseq +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=4237409284 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/5.ac_range_check_stress_all_with_rand_reset.4237409284 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 5.ac_range_check_stress_all_with_rand_reset.4237409284 -covoverwrite' seed=85855897650588760649516709772805725415855709681466251145965708046599455882244 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=85855897650588760649516709772805725415855709681466251145965708046599455882244 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/5.ac_range_check_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_errors 2275324932196089726680404499362356653801736937144207205193385241804907824869 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/5.ac_range_check_tl_errors/latest run_opts='+run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3450685157 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/5.ac_range_check_tl_errors.3450685157 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 5.ac_range_check_tl_errors.3450685157 -covoverwrite' seed=2275324932196089726680404499362356653801736937144207205193385241804907824869 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=2275324932196089726680404499362356653801736937144207205193385241804907824869 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/5.ac_range_check_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_intg_err 42649983562763416582005630096481789267366575357340029831418161639164742909912 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/5.ac_range_check_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1542635480 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/5.ac_range_check_tl_intg_err.1542635480 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 5.ac_range_check_tl_intg_err.1542635480 -covoverwrite' seed=42649983562763416582005630096481789267366575357340029831418161639164742909912 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=42649983562763416582005630096481789267366575357340029831418161639164742909912 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/5.ac_range_check_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors 82672949091237121443703795005791378253454855659290921493201424912483314345102 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/5.ac_range_check_shadow_reg_errors/latest run_opts='+run_shadow_reg_errors +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3979912334 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/5.ac_range_check_shadow_reg_errors.3979912334 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 5.ac_range_check_shadow_reg_errors.3979912334 -covoverwrite' seed=82672949091237121443703795005791378253454855659290921493201424912483314345102 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=82672949091237121443703795005791378253454855659290921493201424912483314345102 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/5.ac_range_check_shadow_reg_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors_with_csr_rw 96949863765307639577972842291804755118319480045037648891575430647229259057033 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/5.ac_range_check_shadow_reg_errors_with_csr_rw/latest run_opts='+run_shadow_reg_errors_with_csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3019507593 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/5.ac_range_check_shadow_reg_errors_with_csr_rw.3019507593 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 5.ac_range_check_shadow_reg_errors_with_csr_rw.3019507593 -covoverwrite' seed=96949863765307639577972842291804755118319480045037648891575430647229259057033 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=96949863765307639577972842291804755118319480045037648891575430647229259057033 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/5.ac_range_check_shadow_reg_errors_with_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_alert_test 45979248217020627486009272581934491117216837524754021873363277425126530572578 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/5.ac_range_check_alert_test/latest run_opts='+run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=3591069986 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/5.ac_range_check_alert_test.3591069986 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 5.ac_range_check_alert_test.3591069986 -covoverwrite' seed=45979248217020627486009272581934491117216837524754021873363277425126530572578 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=45979248217020627486009272581934491117216837524754021873363277425126530572578 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/5.ac_range_check_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_intr_test 104887195475561503476538334099956068486799963161318587723073097426490483112467 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/5.ac_range_check_intr_test/latest run_opts='+run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2438560275 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/5.ac_range_check_intr_test.2438560275 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 5.ac_range_check_intr_test.2438560275 -covoverwrite' seed=104887195475561503476538334099956068486799963161318587723073097426490483112467 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=104887195475561503476538334099956068486799963161318587723073097426490483112467 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/5.ac_range_check_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke 108216877030264391844139364125499101567170275018823835092009764658989841192491 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/6.ac_range_check_smoke/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=651105835 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/6.ac_range_check_smoke.651105835 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 6.ac_range_check_smoke.651105835 -covoverwrite' seed=108216877030264391844139364125499101567170275018823835092009764658989841192491 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=108216877030264391844139364125499101567170275018823835092009764658989841192491 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/6.ac_range_check_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_racl 244024875559939497436979564790260364598133736552150876017655799840812284669 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/6.ac_range_check_smoke_racl/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=2323888893 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_racl_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/6.ac_range_check_smoke_racl.2323888893 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 6.ac_range_check_smoke_racl.2323888893 -covoverwrite' seed=244024875559939497436979564790260364598133736552150876017655799840812284669 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=244024875559939497436979564790260364598133736552150876017655799840812284669 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/6.ac_range_check_smoke_racl/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_racl_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_high_threshold 53887661499360254802608857228719124361279044325002240082283905013208560984542 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/6.ac_range_check_smoke_high_threshold/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=941384158 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_high_threshold_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/6.ac_range_check_smoke_high_threshold.941384158 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 6.ac_range_check_smoke_high_threshold.941384158 -covoverwrite' seed=53887661499360254802608857228719124361279044325002240082283905013208560984542 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=53887661499360254802608857228719124361279044325002240082283905013208560984542 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/6.ac_range_check_smoke_high_threshold/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_high_threshold_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_lock_range 24001559681943171095239750871658435397279118506007058551795526923445325317422 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/6.ac_range_check_lock_range/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=1046267182 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_lock_range_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/6.ac_range_check_lock_range.1046267182 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 6.ac_range_check_lock_range.1046267182 -covoverwrite' seed=24001559681943171095239750871658435397279118506007058551795526923445325317422 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=24001559681943171095239750871658435397279118506007058551795526923445325317422 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/6.ac_range_check_lock_range/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_lock_range_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_stress_all_with_rand_reset 43176394830963132998735785498525876138225962860860506619338602919117901102158 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/6.ac_range_check_stress_all_with_rand_reset/latest run_opts='+run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=ac_range_check_stress_all_vseq +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=867269710 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/6.ac_range_check_stress_all_with_rand_reset.867269710 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 6.ac_range_check_stress_all_with_rand_reset.867269710 -covoverwrite' seed=43176394830963132998735785498525876138225962860860506619338602919117901102158 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=43176394830963132998735785498525876138225962860860506619338602919117901102158 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/6.ac_range_check_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_errors 3137865040263569517491879670851138733647112807895481489635180058194098608846 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/6.ac_range_check_tl_errors/latest run_opts='+run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=131160782 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/6.ac_range_check_tl_errors.131160782 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 6.ac_range_check_tl_errors.131160782 -covoverwrite' seed=3137865040263569517491879670851138733647112807895481489635180058194098608846 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=3137865040263569517491879670851138733647112807895481489635180058194098608846 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/6.ac_range_check_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_intg_err 77351785821644146834238677063578192251611298056792233820688264615011780290204 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/6.ac_range_check_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3248907932 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/6.ac_range_check_tl_intg_err.3248907932 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 6.ac_range_check_tl_intg_err.3248907932 -covoverwrite' seed=77351785821644146834238677063578192251611298056792233820688264615011780290204 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=77351785821644146834238677063578192251611298056792233820688264615011780290204 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/6.ac_range_check_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors 93522194012228910769604062243624595306158726716585466989747511108118779942845 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/6.ac_range_check_shadow_reg_errors/latest run_opts='+run_shadow_reg_errors +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=10377149 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/6.ac_range_check_shadow_reg_errors.10377149 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 6.ac_range_check_shadow_reg_errors.10377149 -covoverwrite' seed=93522194012228910769604062243624595306158726716585466989747511108118779942845 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=93522194012228910769604062243624595306158726716585466989747511108118779942845 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/6.ac_range_check_shadow_reg_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors_with_csr_rw 27998478127658781485432438841454139583018661983715032351011681632978211689099 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/6.ac_range_check_shadow_reg_errors_with_csr_rw/latest run_opts='+run_shadow_reg_errors_with_csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1412158091 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/6.ac_range_check_shadow_reg_errors_with_csr_rw.1412158091 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 6.ac_range_check_shadow_reg_errors_with_csr_rw.1412158091 -covoverwrite' seed=27998478127658781485432438841454139583018661983715032351011681632978211689099 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=27998478127658781485432438841454139583018661983715032351011681632978211689099 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/6.ac_range_check_shadow_reg_errors_with_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_alert_test 16755596898403906488447675225512080203750036519129222896768054916673315603212 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/6.ac_range_check_alert_test/latest run_opts='+run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=121176844 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/6.ac_range_check_alert_test.121176844 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 6.ac_range_check_alert_test.121176844 -covoverwrite' seed=16755596898403906488447675225512080203750036519129222896768054916673315603212 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=16755596898403906488447675225512080203750036519129222896768054916673315603212 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/6.ac_range_check_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_intr_test 27290213243929345397448738190946005711997552184874110765335807785241359147732 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/6.ac_range_check_intr_test/latest run_opts='+run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1006625492 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/6.ac_range_check_intr_test.1006625492 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 6.ac_range_check_intr_test.1006625492 -covoverwrite' seed=27290213243929345397448738190946005711997552184874110765335807785241359147732 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=27290213243929345397448738190946005711997552184874110765335807785241359147732 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/6.ac_range_check_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke 9572517710631696204733668627651482806920133587286205986747755059879253260198 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/7.ac_range_check_smoke/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=1897281446 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/7.ac_range_check_smoke.1897281446 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 7.ac_range_check_smoke.1897281446 -covoverwrite' seed=9572517710631696204733668627651482806920133587286205986747755059879253260198 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=9572517710631696204733668627651482806920133587286205986747755059879253260198 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/7.ac_range_check_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_racl 47483131220081305604752932134623800629466005304924398862787078307040026040950 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/7.ac_range_check_smoke_racl/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=1834359414 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_racl_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/7.ac_range_check_smoke_racl.1834359414 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 7.ac_range_check_smoke_racl.1834359414 -covoverwrite' seed=47483131220081305604752932134623800629466005304924398862787078307040026040950 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=47483131220081305604752932134623800629466005304924398862787078307040026040950 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/7.ac_range_check_smoke_racl/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_racl_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_high_threshold 82810889139260232466817739048206402379133721298069894647444733897866534431650 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/7.ac_range_check_smoke_high_threshold/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=3791891362 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_high_threshold_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/7.ac_range_check_smoke_high_threshold.3791891362 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 7.ac_range_check_smoke_high_threshold.3791891362 -covoverwrite' seed=82810889139260232466817739048206402379133721298069894647444733897866534431650 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=82810889139260232466817739048206402379133721298069894647444733897866534431650 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/7.ac_range_check_smoke_high_threshold/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_high_threshold_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_lock_range 112302031893464928707675559442560546972102856427072227033546082525903476952428 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/7.ac_range_check_lock_range/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=2993360236 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_lock_range_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/7.ac_range_check_lock_range.2993360236 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 7.ac_range_check_lock_range.2993360236 -covoverwrite' seed=112302031893464928707675559442560546972102856427072227033546082525903476952428 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=112302031893464928707675559442560546972102856427072227033546082525903476952428 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/7.ac_range_check_lock_range/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_lock_range_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_stress_all_with_rand_reset 68407847640258193820815373160374566363084421853389614403420759830449498726318 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/7.ac_range_check_stress_all_with_rand_reset/latest run_opts='+run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=ac_range_check_stress_all_vseq +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=2748686254 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/7.ac_range_check_stress_all_with_rand_reset.2748686254 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 7.ac_range_check_stress_all_with_rand_reset.2748686254 -covoverwrite' seed=68407847640258193820815373160374566363084421853389614403420759830449498726318 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=68407847640258193820815373160374566363084421853389614403420759830449498726318 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/7.ac_range_check_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_errors 44011488224370127845955115532262704314362229505722762000586617692305411899649 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/7.ac_range_check_tl_errors/latest run_opts='+run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=24740097 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/7.ac_range_check_tl_errors.24740097 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 7.ac_range_check_tl_errors.24740097 -covoverwrite' seed=44011488224370127845955115532262704314362229505722762000586617692305411899649 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=44011488224370127845955115532262704314362229505722762000586617692305411899649 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/7.ac_range_check_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_intg_err 66887190980429734926665110069787080841424011855091307711582252866395859563573 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/7.ac_range_check_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3683628085 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/7.ac_range_check_tl_intg_err.3683628085 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 7.ac_range_check_tl_intg_err.3683628085 -covoverwrite' seed=66887190980429734926665110069787080841424011855091307711582252866395859563573 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=66887190980429734926665110069787080841424011855091307711582252866395859563573 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/7.ac_range_check_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors 15234237645691936454266489144706939401946270688697787193133866817751404164115 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/7.ac_range_check_shadow_reg_errors/latest run_opts='+run_shadow_reg_errors +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1711715347 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/7.ac_range_check_shadow_reg_errors.1711715347 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 7.ac_range_check_shadow_reg_errors.1711715347 -covoverwrite' seed=15234237645691936454266489144706939401946270688697787193133866817751404164115 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=15234237645691936454266489144706939401946270688697787193133866817751404164115 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/7.ac_range_check_shadow_reg_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors_with_csr_rw 38995908677420857035280939250515736384546324381463740288610958444568059362511 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/7.ac_range_check_shadow_reg_errors_with_csr_rw/latest run_opts='+run_shadow_reg_errors_with_csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1012710607 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/7.ac_range_check_shadow_reg_errors_with_csr_rw.1012710607 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 7.ac_range_check_shadow_reg_errors_with_csr_rw.1012710607 -covoverwrite' seed=38995908677420857035280939250515736384546324381463740288610958444568059362511 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=38995908677420857035280939250515736384546324381463740288610958444568059362511 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/7.ac_range_check_shadow_reg_errors_with_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_alert_test 61970557745958716823033887543127972984989856017872830073298432031141351114896 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/7.ac_range_check_alert_test/latest run_opts='+run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=2351679632 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/7.ac_range_check_alert_test.2351679632 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 7.ac_range_check_alert_test.2351679632 -covoverwrite' seed=61970557745958716823033887543127972984989856017872830073298432031141351114896 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=61970557745958716823033887543127972984989856017872830073298432031141351114896 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/7.ac_range_check_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_intr_test 42828394732170742888869984512413635114801286026151164455927849524013661317964 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/7.ac_range_check_intr_test/latest run_opts='+run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=871263052 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/7.ac_range_check_intr_test.871263052 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 7.ac_range_check_intr_test.871263052 -covoverwrite' seed=42828394732170742888869984512413635114801286026151164455927849524013661317964 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=42828394732170742888869984512413635114801286026151164455927849524013661317964 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/7.ac_range_check_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke 27575098436343029663306894955340732988325143427878787591631534916419317470510 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/8.ac_range_check_smoke/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=600642862 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/8.ac_range_check_smoke.600642862 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 8.ac_range_check_smoke.600642862 -covoverwrite' seed=27575098436343029663306894955340732988325143427878787591631534916419317470510 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=27575098436343029663306894955340732988325143427878787591631534916419317470510 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/8.ac_range_check_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_racl 56850605340263911915567859302939841765711648617910180319014620251793190092528 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/8.ac_range_check_smoke_racl/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=4047306480 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_racl_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/8.ac_range_check_smoke_racl.4047306480 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 8.ac_range_check_smoke_racl.4047306480 -covoverwrite' seed=56850605340263911915567859302939841765711648617910180319014620251793190092528 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=56850605340263911915567859302939841765711648617910180319014620251793190092528 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/8.ac_range_check_smoke_racl/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_racl_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_high_threshold 54612837875984884408311686597289187015613225768409535148833192586350157716031 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/8.ac_range_check_smoke_high_threshold/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=1570855487 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_high_threshold_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/8.ac_range_check_smoke_high_threshold.1570855487 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 8.ac_range_check_smoke_high_threshold.1570855487 -covoverwrite' seed=54612837875984884408311686597289187015613225768409535148833192586350157716031 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=54612837875984884408311686597289187015613225768409535148833192586350157716031 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/8.ac_range_check_smoke_high_threshold/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_high_threshold_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_lock_range 1916528558487123531690172590963600370408781943420248553357342930305814164802 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/8.ac_range_check_lock_range/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=2195256642 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_lock_range_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/8.ac_range_check_lock_range.2195256642 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 8.ac_range_check_lock_range.2195256642 -covoverwrite' seed=1916528558487123531690172590963600370408781943420248553357342930305814164802 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=1916528558487123531690172590963600370408781943420248553357342930305814164802 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/8.ac_range_check_lock_range/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_lock_range_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_stress_all_with_rand_reset 110409109980886194121803667870361881539357071433942278362198739128470233040218 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/8.ac_range_check_stress_all_with_rand_reset/latest run_opts='+run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=ac_range_check_stress_all_vseq +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=2201371994 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/8.ac_range_check_stress_all_with_rand_reset.2201371994 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 8.ac_range_check_stress_all_with_rand_reset.2201371994 -covoverwrite' seed=110409109980886194121803667870361881539357071433942278362198739128470233040218 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=110409109980886194121803667870361881539357071433942278362198739128470233040218 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/8.ac_range_check_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_errors 28973495873404513319879957882471350453228500575409713880103537194572787895726 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/8.ac_range_check_tl_errors/latest run_opts='+run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2525384110 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/8.ac_range_check_tl_errors.2525384110 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 8.ac_range_check_tl_errors.2525384110 -covoverwrite' seed=28973495873404513319879957882471350453228500575409713880103537194572787895726 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=28973495873404513319879957882471350453228500575409713880103537194572787895726 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/8.ac_range_check_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_intg_err 65669477938716007333673507516096714757487170469834321766589387442608294762961 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/8.ac_range_check_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=320248273 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/8.ac_range_check_tl_intg_err.320248273 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 8.ac_range_check_tl_intg_err.320248273 -covoverwrite' seed=65669477938716007333673507516096714757487170469834321766589387442608294762961 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=65669477938716007333673507516096714757487170469834321766589387442608294762961 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/8.ac_range_check_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors 93909056640712257341146305722258347190896729931021908601442430449196132320782 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/8.ac_range_check_shadow_reg_errors/latest run_opts='+run_shadow_reg_errors +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3784951310 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/8.ac_range_check_shadow_reg_errors.3784951310 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 8.ac_range_check_shadow_reg_errors.3784951310 -covoverwrite' seed=93909056640712257341146305722258347190896729931021908601442430449196132320782 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=93909056640712257341146305722258347190896729931021908601442430449196132320782 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/8.ac_range_check_shadow_reg_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors_with_csr_rw 104212303201541038564862152444053968279766882734513499190049929854926459477122 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/8.ac_range_check_shadow_reg_errors_with_csr_rw/latest run_opts='+run_shadow_reg_errors_with_csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2284297346 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/8.ac_range_check_shadow_reg_errors_with_csr_rw.2284297346 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 8.ac_range_check_shadow_reg_errors_with_csr_rw.2284297346 -covoverwrite' seed=104212303201541038564862152444053968279766882734513499190049929854926459477122 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=104212303201541038564862152444053968279766882734513499190049929854926459477122 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/8.ac_range_check_shadow_reg_errors_with_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_alert_test 9868679577051013240170689722023991964289582933013778953163604257223575913661 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/8.ac_range_check_alert_test/latest run_opts='+run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=4102079677 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/8.ac_range_check_alert_test.4102079677 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 8.ac_range_check_alert_test.4102079677 -covoverwrite' seed=9868679577051013240170689722023991964289582933013778953163604257223575913661 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=9868679577051013240170689722023991964289582933013778953163604257223575913661 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/8.ac_range_check_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_intr_test 9674051026431456064114928183601574221809454796402600447094264619972165913496 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/8.ac_range_check_intr_test/latest run_opts='+run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1233406872 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/8.ac_range_check_intr_test.1233406872 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 8.ac_range_check_intr_test.1233406872 -covoverwrite' seed=9674051026431456064114928183601574221809454796402600447094264619972165913496 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=9674051026431456064114928183601574221809454796402600447094264619972165913496 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/8.ac_range_check_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke 75781169335974942588131309243373732663077458690131332542322208941129694222086 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/9.ac_range_check_smoke/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=2632750854 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/9.ac_range_check_smoke.2632750854 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 9.ac_range_check_smoke.2632750854 -covoverwrite' seed=75781169335974942588131309243373732663077458690131332542322208941129694222086 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=75781169335974942588131309243373732663077458690131332542322208941129694222086 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/9.ac_range_check_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_racl 113480254257540823203333007665870771054763262741739033406126573053277745447098 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/9.ac_range_check_smoke_racl/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=2942042298 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_racl_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/9.ac_range_check_smoke_racl.2942042298 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 9.ac_range_check_smoke_racl.2942042298 -covoverwrite' seed=113480254257540823203333007665870771054763262741739033406126573053277745447098 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=113480254257540823203333007665870771054763262741739033406126573053277745447098 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/9.ac_range_check_smoke_racl/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_racl_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_high_threshold 19406779313931194635890530813632075106007723358044197189026245288170768115290 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/9.ac_range_check_smoke_high_threshold/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=1334126170 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_high_threshold_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/9.ac_range_check_smoke_high_threshold.1334126170 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 9.ac_range_check_smoke_high_threshold.1334126170 -covoverwrite' seed=19406779313931194635890530813632075106007723358044197189026245288170768115290 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=19406779313931194635890530813632075106007723358044197189026245288170768115290 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/9.ac_range_check_smoke_high_threshold/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_high_threshold_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_lock_range 42143606345760572302724568316737699652709094995320246050288399139135955153838 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/9.ac_range_check_lock_range/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=810562478 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_lock_range_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/9.ac_range_check_lock_range.810562478 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 9.ac_range_check_lock_range.810562478 -covoverwrite' seed=42143606345760572302724568316737699652709094995320246050288399139135955153838 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=42143606345760572302724568316737699652709094995320246050288399139135955153838 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/9.ac_range_check_lock_range/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_lock_range_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_stress_all_with_rand_reset 112722898142351920133122638939830712356849547903478924480068187931056648831543 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/9.ac_range_check_stress_all_with_rand_reset/latest run_opts='+run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=ac_range_check_stress_all_vseq +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=3496034871 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/9.ac_range_check_stress_all_with_rand_reset.3496034871 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 9.ac_range_check_stress_all_with_rand_reset.3496034871 -covoverwrite' seed=112722898142351920133122638939830712356849547903478924480068187931056648831543 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=112722898142351920133122638939830712356849547903478924480068187931056648831543 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/9.ac_range_check_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_errors 112908903201288496838084548056673800347363528578895907298539122690966177997608 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/9.ac_range_check_tl_errors/latest run_opts='+run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=956064552 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/9.ac_range_check_tl_errors.956064552 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 9.ac_range_check_tl_errors.956064552 -covoverwrite' seed=112908903201288496838084548056673800347363528578895907298539122690966177997608 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=112908903201288496838084548056673800347363528578895907298539122690966177997608 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/9.ac_range_check_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_intg_err 53309798707560746881228987475952729412830357104530435908589117353684729191377 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/9.ac_range_check_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2532432849 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/9.ac_range_check_tl_intg_err.2532432849 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 9.ac_range_check_tl_intg_err.2532432849 -covoverwrite' seed=53309798707560746881228987475952729412830357104530435908589117353684729191377 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=53309798707560746881228987475952729412830357104530435908589117353684729191377 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/9.ac_range_check_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors 56380972876357764467187286499355255877603089234395067498656578781454980529494 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/9.ac_range_check_shadow_reg_errors/latest run_opts='+run_shadow_reg_errors +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1362279766 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/9.ac_range_check_shadow_reg_errors.1362279766 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 9.ac_range_check_shadow_reg_errors.1362279766 -covoverwrite' seed=56380972876357764467187286499355255877603089234395067498656578781454980529494 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=56380972876357764467187286499355255877603089234395067498656578781454980529494 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/9.ac_range_check_shadow_reg_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors_with_csr_rw 74774708112352120191367020202285226814373517926493069687716230982050025818592 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/9.ac_range_check_shadow_reg_errors_with_csr_rw/latest run_opts='+run_shadow_reg_errors_with_csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2841102816 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/9.ac_range_check_shadow_reg_errors_with_csr_rw.2841102816 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 9.ac_range_check_shadow_reg_errors_with_csr_rw.2841102816 -covoverwrite' seed=74774708112352120191367020202285226814373517926493069687716230982050025818592 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=74774708112352120191367020202285226814373517926493069687716230982050025818592 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/9.ac_range_check_shadow_reg_errors_with_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_alert_test 84777185793549428293719296857972481456950271387371165482151786362722531696392 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/9.ac_range_check_alert_test/latest run_opts='+run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=2002280200 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/9.ac_range_check_alert_test.2002280200 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 9.ac_range_check_alert_test.2002280200 -covoverwrite' seed=84777185793549428293719296857972481456950271387371165482151786362722531696392 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=84777185793549428293719296857972481456950271387371165482151786362722531696392 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/9.ac_range_check_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_intr_test 74979614087546628860749290658812536952500305800970628335270113652885588564956 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/9.ac_range_check_intr_test/latest run_opts='+run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1678531548 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/9.ac_range_check_intr_test.1678531548 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 9.ac_range_check_intr_test.1678531548 -covoverwrite' seed=74979614087546628860749290658812536952500305800970628335270113652885588564956 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=74979614087546628860749290658812536952500305800970628335270113652885588564956 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/9.ac_range_check_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke 72587429546295846823020992572481012649663617255057990029708604473706120580492 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/10.ac_range_check_smoke/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=1074892172 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/10.ac_range_check_smoke.1074892172 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 10.ac_range_check_smoke.1074892172 -covoverwrite' seed=72587429546295846823020992572481012649663617255057990029708604473706120580492 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=72587429546295846823020992572481012649663617255057990029708604473706120580492 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/10.ac_range_check_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_racl 66538157599774125254435728715869742779767441068704159810608192664134342892760 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/10.ac_range_check_smoke_racl/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=1530354904 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_racl_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/10.ac_range_check_smoke_racl.1530354904 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 10.ac_range_check_smoke_racl.1530354904 -covoverwrite' seed=66538157599774125254435728715869742779767441068704159810608192664134342892760 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=66538157599774125254435728715869742779767441068704159810608192664134342892760 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/10.ac_range_check_smoke_racl/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_racl_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_high_threshold 23361151104393401167883588562333041324322100410326961099878031326040256398424 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/10.ac_range_check_smoke_high_threshold/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=2676737112 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_high_threshold_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/10.ac_range_check_smoke_high_threshold.2676737112 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 10.ac_range_check_smoke_high_threshold.2676737112 -covoverwrite' seed=23361151104393401167883588562333041324322100410326961099878031326040256398424 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=23361151104393401167883588562333041324322100410326961099878031326040256398424 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/10.ac_range_check_smoke_high_threshold/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_high_threshold_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_lock_range 25685106154257170313174622732209742381072026002130769470453805332911350334359 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/10.ac_range_check_lock_range/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=4188783511 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_lock_range_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/10.ac_range_check_lock_range.4188783511 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 10.ac_range_check_lock_range.4188783511 -covoverwrite' seed=25685106154257170313174622732209742381072026002130769470453805332911350334359 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=25685106154257170313174622732209742381072026002130769470453805332911350334359 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/10.ac_range_check_lock_range/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_lock_range_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_errors 28311411418007630517408885333045902999077522496821770201978130214325969964561 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/10.ac_range_check_tl_errors/latest run_opts='+run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3854781969 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/10.ac_range_check_tl_errors.3854781969 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 10.ac_range_check_tl_errors.3854781969 -covoverwrite' seed=28311411418007630517408885333045902999077522496821770201978130214325969964561 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=28311411418007630517408885333045902999077522496821770201978130214325969964561 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/10.ac_range_check_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_intg_err 16088765101858527879322579959487812881400854614679056643631791307661515969057 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/10.ac_range_check_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=4228928033 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/10.ac_range_check_tl_intg_err.4228928033 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 10.ac_range_check_tl_intg_err.4228928033 -covoverwrite' seed=16088765101858527879322579959487812881400854614679056643631791307661515969057 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=16088765101858527879322579959487812881400854614679056643631791307661515969057 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/10.ac_range_check_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors 26661455660020514637112161839051823978770016293021577730484888268172123699196 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/10.ac_range_check_shadow_reg_errors/latest run_opts='+run_shadow_reg_errors +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3070752764 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/10.ac_range_check_shadow_reg_errors.3070752764 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 10.ac_range_check_shadow_reg_errors.3070752764 -covoverwrite' seed=26661455660020514637112161839051823978770016293021577730484888268172123699196 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=26661455660020514637112161839051823978770016293021577730484888268172123699196 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/10.ac_range_check_shadow_reg_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors_with_csr_rw 51877649456074524673570286060406717200768686056230049730733387046846339075806 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/10.ac_range_check_shadow_reg_errors_with_csr_rw/latest run_opts='+run_shadow_reg_errors_with_csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3121467102 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/10.ac_range_check_shadow_reg_errors_with_csr_rw.3121467102 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 10.ac_range_check_shadow_reg_errors_with_csr_rw.3121467102 -covoverwrite' seed=51877649456074524673570286060406717200768686056230049730733387046846339075806 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=51877649456074524673570286060406717200768686056230049730733387046846339075806 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/10.ac_range_check_shadow_reg_errors_with_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke 109186069429965581972229714147727015289379273088717740061569442489752920653251 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/11.ac_range_check_smoke/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=1090125251 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/11.ac_range_check_smoke.1090125251 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 11.ac_range_check_smoke.1090125251 -covoverwrite' seed=109186069429965581972229714147727015289379273088717740061569442489752920653251 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=109186069429965581972229714147727015289379273088717740061569442489752920653251 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/11.ac_range_check_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_racl 28961130113143832787177283530824212453203384751060879683836911062316083915986 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/11.ac_range_check_smoke_racl/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=4242353362 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_racl_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/11.ac_range_check_smoke_racl.4242353362 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 11.ac_range_check_smoke_racl.4242353362 -covoverwrite' seed=28961130113143832787177283530824212453203384751060879683836911062316083915986 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=28961130113143832787177283530824212453203384751060879683836911062316083915986 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/11.ac_range_check_smoke_racl/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_racl_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_high_threshold 6132383635270534076428847894886323480237301405741409133284422336737647902700 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/11.ac_range_check_smoke_high_threshold/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=3559505900 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_high_threshold_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/11.ac_range_check_smoke_high_threshold.3559505900 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 11.ac_range_check_smoke_high_threshold.3559505900 -covoverwrite' seed=6132383635270534076428847894886323480237301405741409133284422336737647902700 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=6132383635270534076428847894886323480237301405741409133284422336737647902700 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/11.ac_range_check_smoke_high_threshold/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_high_threshold_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_lock_range 104762841922162437481423501349084596000664370175554852529540850422736443981507 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/11.ac_range_check_lock_range/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=3728260803 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_lock_range_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/11.ac_range_check_lock_range.3728260803 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 11.ac_range_check_lock_range.3728260803 -covoverwrite' seed=104762841922162437481423501349084596000664370175554852529540850422736443981507 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=104762841922162437481423501349084596000664370175554852529540850422736443981507 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/11.ac_range_check_lock_range/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_lock_range_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_errors 7749258196626690484907186427139574105246352368366989056133942735084382914458 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/11.ac_range_check_tl_errors/latest run_opts='+run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3571779482 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/11.ac_range_check_tl_errors.3571779482 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 11.ac_range_check_tl_errors.3571779482 -covoverwrite' seed=7749258196626690484907186427139574105246352368366989056133942735084382914458 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=7749258196626690484907186427139574105246352368366989056133942735084382914458 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/11.ac_range_check_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_intg_err 90954902858954544970356716627475476165152278547528281895673820205603097917367 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/11.ac_range_check_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3618879415 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/11.ac_range_check_tl_intg_err.3618879415 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 11.ac_range_check_tl_intg_err.3618879415 -covoverwrite' seed=90954902858954544970356716627475476165152278547528281895673820205603097917367 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=90954902858954544970356716627475476165152278547528281895673820205603097917367 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/11.ac_range_check_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors 82905230295487510436218503414734706201040050215471309906786832250503842798014 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/11.ac_range_check_shadow_reg_errors/latest run_opts='+run_shadow_reg_errors +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1039702462 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/11.ac_range_check_shadow_reg_errors.1039702462 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 11.ac_range_check_shadow_reg_errors.1039702462 -covoverwrite' seed=82905230295487510436218503414734706201040050215471309906786832250503842798014 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=82905230295487510436218503414734706201040050215471309906786832250503842798014 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/11.ac_range_check_shadow_reg_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors_with_csr_rw 62289905204709907211827478253730230428526358791070509498663783465665364440566 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/11.ac_range_check_shadow_reg_errors_with_csr_rw/latest run_opts='+run_shadow_reg_errors_with_csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=167720438 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/11.ac_range_check_shadow_reg_errors_with_csr_rw.167720438 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 11.ac_range_check_shadow_reg_errors_with_csr_rw.167720438 -covoverwrite' seed=62289905204709907211827478253730230428526358791070509498663783465665364440566 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=62289905204709907211827478253730230428526358791070509498663783465665364440566 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/11.ac_range_check_shadow_reg_errors_with_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke 3824814594865212361064317022421671745579486347235003483026268536774620015020 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/12.ac_range_check_smoke/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=3076712876 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/12.ac_range_check_smoke.3076712876 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 12.ac_range_check_smoke.3076712876 -covoverwrite' seed=3824814594865212361064317022421671745579486347235003483026268536774620015020 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=3824814594865212361064317022421671745579486347235003483026268536774620015020 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/12.ac_range_check_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_racl 94177654431920817357594184519503377766257456490900525558629158834798588739359 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/12.ac_range_check_smoke_racl/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=978206495 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_racl_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/12.ac_range_check_smoke_racl.978206495 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 12.ac_range_check_smoke_racl.978206495 -covoverwrite' seed=94177654431920817357594184519503377766257456490900525558629158834798588739359 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=94177654431920817357594184519503377766257456490900525558629158834798588739359 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/12.ac_range_check_smoke_racl/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_racl_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_high_threshold 101966501514649732449414247903732679326499877339205080591223209159909640217048 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/12.ac_range_check_smoke_high_threshold/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=4275544536 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_high_threshold_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/12.ac_range_check_smoke_high_threshold.4275544536 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 12.ac_range_check_smoke_high_threshold.4275544536 -covoverwrite' seed=101966501514649732449414247903732679326499877339205080591223209159909640217048 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=101966501514649732449414247903732679326499877339205080591223209159909640217048 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/12.ac_range_check_smoke_high_threshold/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_high_threshold_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_lock_range 51971128900817694785229996310909707033971261210136340176168528571712999019548 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/12.ac_range_check_lock_range/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=2738902044 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_lock_range_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/12.ac_range_check_lock_range.2738902044 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 12.ac_range_check_lock_range.2738902044 -covoverwrite' seed=51971128900817694785229996310909707033971261210136340176168528571712999019548 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=51971128900817694785229996310909707033971261210136340176168528571712999019548 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/12.ac_range_check_lock_range/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_lock_range_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_errors 54421470784088493418270282148421356439805604708269236907322656399347158524196 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/12.ac_range_check_tl_errors/latest run_opts='+run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=4275478820 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/12.ac_range_check_tl_errors.4275478820 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 12.ac_range_check_tl_errors.4275478820 -covoverwrite' seed=54421470784088493418270282148421356439805604708269236907322656399347158524196 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=54421470784088493418270282148421356439805604708269236907322656399347158524196 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/12.ac_range_check_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_intg_err 31356486025693723987873316484257983905452692243921340031021125115531400779044 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/12.ac_range_check_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2711295268 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/12.ac_range_check_tl_intg_err.2711295268 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 12.ac_range_check_tl_intg_err.2711295268 -covoverwrite' seed=31356486025693723987873316484257983905452692243921340031021125115531400779044 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=31356486025693723987873316484257983905452692243921340031021125115531400779044 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/12.ac_range_check_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors 68786720924722026216944955360987124218147126046483366927446328083341589795763 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/12.ac_range_check_shadow_reg_errors/latest run_opts='+run_shadow_reg_errors +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3284587443 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/12.ac_range_check_shadow_reg_errors.3284587443 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 12.ac_range_check_shadow_reg_errors.3284587443 -covoverwrite' seed=68786720924722026216944955360987124218147126046483366927446328083341589795763 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=68786720924722026216944955360987124218147126046483366927446328083341589795763 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/12.ac_range_check_shadow_reg_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors_with_csr_rw 61205464430145034558984960963237415308395943918870461603121289157989148091232 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/12.ac_range_check_shadow_reg_errors_with_csr_rw/latest run_opts='+run_shadow_reg_errors_with_csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=424108896 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/12.ac_range_check_shadow_reg_errors_with_csr_rw.424108896 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 12.ac_range_check_shadow_reg_errors_with_csr_rw.424108896 -covoverwrite' seed=61205464430145034558984960963237415308395943918870461603121289157989148091232 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=61205464430145034558984960963237415308395943918870461603121289157989148091232 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/12.ac_range_check_shadow_reg_errors_with_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke 50374157338384834471495683985131648562863416680717168117324427263147923629545 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/13.ac_range_check_smoke/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=3343541737 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/13.ac_range_check_smoke.3343541737 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 13.ac_range_check_smoke.3343541737 -covoverwrite' seed=50374157338384834471495683985131648562863416680717168117324427263147923629545 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=50374157338384834471495683985131648562863416680717168117324427263147923629545 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/13.ac_range_check_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_racl 34126849049323339957029019188213721824560843289537192035853232483563220962946 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/13.ac_range_check_smoke_racl/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=2180714114 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_racl_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/13.ac_range_check_smoke_racl.2180714114 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 13.ac_range_check_smoke_racl.2180714114 -covoverwrite' seed=34126849049323339957029019188213721824560843289537192035853232483563220962946 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=34126849049323339957029019188213721824560843289537192035853232483563220962946 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/13.ac_range_check_smoke_racl/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_racl_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_high_threshold 114609790854716564807086327909634534295327185256320600534950323476348990418087 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/13.ac_range_check_smoke_high_threshold/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=1906863271 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_high_threshold_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/13.ac_range_check_smoke_high_threshold.1906863271 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 13.ac_range_check_smoke_high_threshold.1906863271 -covoverwrite' seed=114609790854716564807086327909634534295327185256320600534950323476348990418087 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=114609790854716564807086327909634534295327185256320600534950323476348990418087 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/13.ac_range_check_smoke_high_threshold/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_high_threshold_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_lock_range 89503046779808585667122442869436751604432693574784323973609973096244771679163 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/13.ac_range_check_lock_range/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=2145774523 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_lock_range_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/13.ac_range_check_lock_range.2145774523 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 13.ac_range_check_lock_range.2145774523 -covoverwrite' seed=89503046779808585667122442869436751604432693574784323973609973096244771679163 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=89503046779808585667122442869436751604432693574784323973609973096244771679163 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/13.ac_range_check_lock_range/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_lock_range_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_errors 69377298270362439007182823853976498842111762766447328398867714582512403713311 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/13.ac_range_check_tl_errors/latest run_opts='+run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=854822175 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/13.ac_range_check_tl_errors.854822175 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 13.ac_range_check_tl_errors.854822175 -covoverwrite' seed=69377298270362439007182823853976498842111762766447328398867714582512403713311 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=69377298270362439007182823853976498842111762766447328398867714582512403713311 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/13.ac_range_check_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_intg_err 51762102677249305702715558579553411845627713133432280739123100475944598126126 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/13.ac_range_check_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3341434414 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/13.ac_range_check_tl_intg_err.3341434414 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 13.ac_range_check_tl_intg_err.3341434414 -covoverwrite' seed=51762102677249305702715558579553411845627713133432280739123100475944598126126 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=51762102677249305702715558579553411845627713133432280739123100475944598126126 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/13.ac_range_check_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors 114035055004329781896229093369213808532062614863035092563325719714570413318016 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/13.ac_range_check_shadow_reg_errors/latest run_opts='+run_shadow_reg_errors +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=486317952 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/13.ac_range_check_shadow_reg_errors.486317952 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 13.ac_range_check_shadow_reg_errors.486317952 -covoverwrite' seed=114035055004329781896229093369213808532062614863035092563325719714570413318016 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=114035055004329781896229093369213808532062614863035092563325719714570413318016 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/13.ac_range_check_shadow_reg_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors_with_csr_rw 50489130187497623037641597091609873257544367577861117687732792134933491354954 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/13.ac_range_check_shadow_reg_errors_with_csr_rw/latest run_opts='+run_shadow_reg_errors_with_csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2604535114 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/13.ac_range_check_shadow_reg_errors_with_csr_rw.2604535114 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 13.ac_range_check_shadow_reg_errors_with_csr_rw.2604535114 -covoverwrite' seed=50489130187497623037641597091609873257544367577861117687732792134933491354954 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=50489130187497623037641597091609873257544367577861117687732792134933491354954 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/13.ac_range_check_shadow_reg_errors_with_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke 3165653554964233373222263577891113107460796300678811307255375825386335155024 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/14.ac_range_check_smoke/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=3415257936 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/14.ac_range_check_smoke.3415257936 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 14.ac_range_check_smoke.3415257936 -covoverwrite' seed=3165653554964233373222263577891113107460796300678811307255375825386335155024 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=3165653554964233373222263577891113107460796300678811307255375825386335155024 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/14.ac_range_check_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_racl 82788051679354212868918672664606197867424925909347092621054469871561130234948 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/14.ac_range_check_smoke_racl/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=4033991748 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_racl_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/14.ac_range_check_smoke_racl.4033991748 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 14.ac_range_check_smoke_racl.4033991748 -covoverwrite' seed=82788051679354212868918672664606197867424925909347092621054469871561130234948 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=82788051679354212868918672664606197867424925909347092621054469871561130234948 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/14.ac_range_check_smoke_racl/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_racl_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_high_threshold 2380389922208007736429480426903865778002012197769298088817762389728356218971 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/14.ac_range_check_smoke_high_threshold/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=2050504795 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_high_threshold_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/14.ac_range_check_smoke_high_threshold.2050504795 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 14.ac_range_check_smoke_high_threshold.2050504795 -covoverwrite' seed=2380389922208007736429480426903865778002012197769298088817762389728356218971 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=2380389922208007736429480426903865778002012197769298088817762389728356218971 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/14.ac_range_check_smoke_high_threshold/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_high_threshold_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_lock_range 25131288368169091274446375590445797219637473574510092628301824612728245445134 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/14.ac_range_check_lock_range/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=3312050702 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_lock_range_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/14.ac_range_check_lock_range.3312050702 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 14.ac_range_check_lock_range.3312050702 -covoverwrite' seed=25131288368169091274446375590445797219637473574510092628301824612728245445134 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=25131288368169091274446375590445797219637473574510092628301824612728245445134 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/14.ac_range_check_lock_range/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_lock_range_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_errors 76782226153828126267941999668070890953069285734460277197979025925459823411827 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/14.ac_range_check_tl_errors/latest run_opts='+run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2297807475 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/14.ac_range_check_tl_errors.2297807475 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 14.ac_range_check_tl_errors.2297807475 -covoverwrite' seed=76782226153828126267941999668070890953069285734460277197979025925459823411827 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=76782226153828126267941999668070890953069285734460277197979025925459823411827 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/14.ac_range_check_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_intg_err 28436249683043833777371735163294747141100433751645560205944844004373790324818 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/14.ac_range_check_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2542139474 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/14.ac_range_check_tl_intg_err.2542139474 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 14.ac_range_check_tl_intg_err.2542139474 -covoverwrite' seed=28436249683043833777371735163294747141100433751645560205944844004373790324818 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=28436249683043833777371735163294747141100433751645560205944844004373790324818 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/14.ac_range_check_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors 71532702062600445985338733640073759088388479529843312421958553646241382330601 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/14.ac_range_check_shadow_reg_errors/latest run_opts='+run_shadow_reg_errors +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2989158633 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/14.ac_range_check_shadow_reg_errors.2989158633 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 14.ac_range_check_shadow_reg_errors.2989158633 -covoverwrite' seed=71532702062600445985338733640073759088388479529843312421958553646241382330601 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=71532702062600445985338733640073759088388479529843312421958553646241382330601 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/14.ac_range_check_shadow_reg_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors_with_csr_rw 30467852625724249275159161861097805862959059375733083567682298931156679821595 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/14.ac_range_check_shadow_reg_errors_with_csr_rw/latest run_opts='+run_shadow_reg_errors_with_csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3724183835 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/14.ac_range_check_shadow_reg_errors_with_csr_rw.3724183835 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 14.ac_range_check_shadow_reg_errors_with_csr_rw.3724183835 -covoverwrite' seed=30467852625724249275159161861097805862959059375733083567682298931156679821595 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=30467852625724249275159161861097805862959059375733083567682298931156679821595 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/14.ac_range_check_shadow_reg_errors_with_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke 5219513070963182260131477976269834187965431580162036395992161823682030280633 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/15.ac_range_check_smoke/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=2752061369 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/15.ac_range_check_smoke.2752061369 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 15.ac_range_check_smoke.2752061369 -covoverwrite' seed=5219513070963182260131477976269834187965431580162036395992161823682030280633 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=5219513070963182260131477976269834187965431580162036395992161823682030280633 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/15.ac_range_check_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_racl 19319640546629677120321518890816291773809906597859872743616281091955718779248 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/15.ac_range_check_smoke_racl/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=81162608 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_racl_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/15.ac_range_check_smoke_racl.81162608 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 15.ac_range_check_smoke_racl.81162608 -covoverwrite' seed=19319640546629677120321518890816291773809906597859872743616281091955718779248 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=19319640546629677120321518890816291773809906597859872743616281091955718779248 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/15.ac_range_check_smoke_racl/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_racl_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_high_threshold 5179088693819352721339597772391325425561935170239158783427815444703892278577 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/15.ac_range_check_smoke_high_threshold/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=3668249905 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_high_threshold_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/15.ac_range_check_smoke_high_threshold.3668249905 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 15.ac_range_check_smoke_high_threshold.3668249905 -covoverwrite' seed=5179088693819352721339597772391325425561935170239158783427815444703892278577 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=5179088693819352721339597772391325425561935170239158783427815444703892278577 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/15.ac_range_check_smoke_high_threshold/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_high_threshold_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_lock_range 57853217295449892785934484494063384287517797437697989619058218725753962339673 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/15.ac_range_check_lock_range/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=850369881 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_lock_range_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/15.ac_range_check_lock_range.850369881 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 15.ac_range_check_lock_range.850369881 -covoverwrite' seed=57853217295449892785934484494063384287517797437697989619058218725753962339673 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=57853217295449892785934484494063384287517797437697989619058218725753962339673 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/15.ac_range_check_lock_range/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_lock_range_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_errors 84038559416497508941477667257130197314184994312875997242852480203977054739602 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/15.ac_range_check_tl_errors/latest run_opts='+run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2569264274 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/15.ac_range_check_tl_errors.2569264274 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 15.ac_range_check_tl_errors.2569264274 -covoverwrite' seed=84038559416497508941477667257130197314184994312875997242852480203977054739602 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=84038559416497508941477667257130197314184994312875997242852480203977054739602 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/15.ac_range_check_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_intg_err 5865929410995364932372374079781288471734300428237517400597924878500160028924 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/15.ac_range_check_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2711830780 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/15.ac_range_check_tl_intg_err.2711830780 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 15.ac_range_check_tl_intg_err.2711830780 -covoverwrite' seed=5865929410995364932372374079781288471734300428237517400597924878500160028924 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=5865929410995364932372374079781288471734300428237517400597924878500160028924 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/15.ac_range_check_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors 80994419792156781930348059275286918711268471797874750471926867685796764531915 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/15.ac_range_check_shadow_reg_errors/latest run_opts='+run_shadow_reg_errors +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2665823435 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/15.ac_range_check_shadow_reg_errors.2665823435 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 15.ac_range_check_shadow_reg_errors.2665823435 -covoverwrite' seed=80994419792156781930348059275286918711268471797874750471926867685796764531915 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=80994419792156781930348059275286918711268471797874750471926867685796764531915 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/15.ac_range_check_shadow_reg_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors_with_csr_rw 86058693982853845215259466994753766341581346029180919180051112310995393448183 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/15.ac_range_check_shadow_reg_errors_with_csr_rw/latest run_opts='+run_shadow_reg_errors_with_csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2436368631 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/15.ac_range_check_shadow_reg_errors_with_csr_rw.2436368631 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 15.ac_range_check_shadow_reg_errors_with_csr_rw.2436368631 -covoverwrite' seed=86058693982853845215259466994753766341581346029180919180051112310995393448183 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=86058693982853845215259466994753766341581346029180919180051112310995393448183 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/15.ac_range_check_shadow_reg_errors_with_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke 107249038953136322641152109091986525323004718634049432223940168438749197635204 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/16.ac_range_check_smoke/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=2363887236 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/16.ac_range_check_smoke.2363887236 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 16.ac_range_check_smoke.2363887236 -covoverwrite' seed=107249038953136322641152109091986525323004718634049432223940168438749197635204 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=107249038953136322641152109091986525323004718634049432223940168438749197635204 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/16.ac_range_check_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_racl 59346535628030156394386414524467261564460150655201485489812853077661759433208 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/16.ac_range_check_smoke_racl/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=818801144 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_racl_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/16.ac_range_check_smoke_racl.818801144 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 16.ac_range_check_smoke_racl.818801144 -covoverwrite' seed=59346535628030156394386414524467261564460150655201485489812853077661759433208 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=59346535628030156394386414524467261564460150655201485489812853077661759433208 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/16.ac_range_check_smoke_racl/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_racl_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_high_threshold 111838649217708250890537622905402752565427673293762688816292957947062544644809 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/16.ac_range_check_smoke_high_threshold/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=883571401 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_high_threshold_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/16.ac_range_check_smoke_high_threshold.883571401 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 16.ac_range_check_smoke_high_threshold.883571401 -covoverwrite' seed=111838649217708250890537622905402752565427673293762688816292957947062544644809 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=111838649217708250890537622905402752565427673293762688816292957947062544644809 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/16.ac_range_check_smoke_high_threshold/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_high_threshold_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_lock_range 34337628986479370172544928374420917632255584837432855883965143089711821600023 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/16.ac_range_check_lock_range/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=150451479 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_lock_range_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/16.ac_range_check_lock_range.150451479 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 16.ac_range_check_lock_range.150451479 -covoverwrite' seed=34337628986479370172544928374420917632255584837432855883965143089711821600023 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=34337628986479370172544928374420917632255584837432855883965143089711821600023 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/16.ac_range_check_lock_range/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_lock_range_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_errors 95542686632441570204418214469586421728334111936353407772374419247671871990150 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/16.ac_range_check_tl_errors/latest run_opts='+run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=275704198 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/16.ac_range_check_tl_errors.275704198 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 16.ac_range_check_tl_errors.275704198 -covoverwrite' seed=95542686632441570204418214469586421728334111936353407772374419247671871990150 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=95542686632441570204418214469586421728334111936353407772374419247671871990150 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/16.ac_range_check_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_intg_err 95129537538900446324268084044915666397777851907536553125210874227165402306107 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/16.ac_range_check_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3958707771 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/16.ac_range_check_tl_intg_err.3958707771 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 16.ac_range_check_tl_intg_err.3958707771 -covoverwrite' seed=95129537538900446324268084044915666397777851907536553125210874227165402306107 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=95129537538900446324268084044915666397777851907536553125210874227165402306107 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/16.ac_range_check_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors 86280936266483073182854566862232197849196638650900476270317933934932806015068 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/16.ac_range_check_shadow_reg_errors/latest run_opts='+run_shadow_reg_errors +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=416225372 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/16.ac_range_check_shadow_reg_errors.416225372 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 16.ac_range_check_shadow_reg_errors.416225372 -covoverwrite' seed=86280936266483073182854566862232197849196638650900476270317933934932806015068 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=86280936266483073182854566862232197849196638650900476270317933934932806015068 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/16.ac_range_check_shadow_reg_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors_with_csr_rw 37491594154034547658498737134884877533951488037740082413555147498564230530937 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/16.ac_range_check_shadow_reg_errors_with_csr_rw/latest run_opts='+run_shadow_reg_errors_with_csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=633554809 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/16.ac_range_check_shadow_reg_errors_with_csr_rw.633554809 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 16.ac_range_check_shadow_reg_errors_with_csr_rw.633554809 -covoverwrite' seed=37491594154034547658498737134884877533951488037740082413555147498564230530937 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=37491594154034547658498737134884877533951488037740082413555147498564230530937 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/16.ac_range_check_shadow_reg_errors_with_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke 75988102412616105286477706756711906503842050931565786711032816414659687386436 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/17.ac_range_check_smoke/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=150375748 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/17.ac_range_check_smoke.150375748 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 17.ac_range_check_smoke.150375748 -covoverwrite' seed=75988102412616105286477706756711906503842050931565786711032816414659687386436 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=75988102412616105286477706756711906503842050931565786711032816414659687386436 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/17.ac_range_check_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_racl 21088570488165791422570298867496378041822977148010184619677120574110069796669 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/17.ac_range_check_smoke_racl/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=1747300157 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_racl_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/17.ac_range_check_smoke_racl.1747300157 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 17.ac_range_check_smoke_racl.1747300157 -covoverwrite' seed=21088570488165791422570298867496378041822977148010184619677120574110069796669 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=21088570488165791422570298867496378041822977148010184619677120574110069796669 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/17.ac_range_check_smoke_racl/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_racl_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_high_threshold 60728445942120526214320907070282646746889044041209683386242338294585644210996 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/17.ac_range_check_smoke_high_threshold/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=998955828 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_high_threshold_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/17.ac_range_check_smoke_high_threshold.998955828 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 17.ac_range_check_smoke_high_threshold.998955828 -covoverwrite' seed=60728445942120526214320907070282646746889044041209683386242338294585644210996 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=60728445942120526214320907070282646746889044041209683386242338294585644210996 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/17.ac_range_check_smoke_high_threshold/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_high_threshold_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_lock_range 44410685232348001372300521315751073125701978897950137243721420437215061518433 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/17.ac_range_check_lock_range/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=2174527585 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_lock_range_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/17.ac_range_check_lock_range.2174527585 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 17.ac_range_check_lock_range.2174527585 -covoverwrite' seed=44410685232348001372300521315751073125701978897950137243721420437215061518433 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=44410685232348001372300521315751073125701978897950137243721420437215061518433 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/17.ac_range_check_lock_range/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_lock_range_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_errors 61662483980911395612048284661241264123009374564224455010866889290312564720223 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/17.ac_range_check_tl_errors/latest run_opts='+run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=4163224159 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/17.ac_range_check_tl_errors.4163224159 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 17.ac_range_check_tl_errors.4163224159 -covoverwrite' seed=61662483980911395612048284661241264123009374564224455010866889290312564720223 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=61662483980911395612048284661241264123009374564224455010866889290312564720223 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/17.ac_range_check_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_intg_err 49775245377395692634509231572589494590673485202662335242252183048179724852914 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/17.ac_range_check_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3656916658 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/17.ac_range_check_tl_intg_err.3656916658 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 17.ac_range_check_tl_intg_err.3656916658 -covoverwrite' seed=49775245377395692634509231572589494590673485202662335242252183048179724852914 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=49775245377395692634509231572589494590673485202662335242252183048179724852914 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/17.ac_range_check_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors 60235286931258981481944156164179752433073365372037568704942438581794177414166 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/17.ac_range_check_shadow_reg_errors/latest run_opts='+run_shadow_reg_errors +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1490940950 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/17.ac_range_check_shadow_reg_errors.1490940950 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 17.ac_range_check_shadow_reg_errors.1490940950 -covoverwrite' seed=60235286931258981481944156164179752433073365372037568704942438581794177414166 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=60235286931258981481944156164179752433073365372037568704942438581794177414166 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/17.ac_range_check_shadow_reg_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors_with_csr_rw 84883741784095013434634802855987114630159991807784251830624769476658350783637 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/17.ac_range_check_shadow_reg_errors_with_csr_rw/latest run_opts='+run_shadow_reg_errors_with_csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2373188757 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/17.ac_range_check_shadow_reg_errors_with_csr_rw.2373188757 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 17.ac_range_check_shadow_reg_errors_with_csr_rw.2373188757 -covoverwrite' seed=84883741784095013434634802855987114630159991807784251830624769476658350783637 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=84883741784095013434634802855987114630159991807784251830624769476658350783637 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/17.ac_range_check_shadow_reg_errors_with_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke 33619070650527687787985467361318370780118843754343311798447719411883779225252 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/18.ac_range_check_smoke/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=557250212 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/18.ac_range_check_smoke.557250212 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 18.ac_range_check_smoke.557250212 -covoverwrite' seed=33619070650527687787985467361318370780118843754343311798447719411883779225252 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=33619070650527687787985467361318370780118843754343311798447719411883779225252 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/18.ac_range_check_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_racl 20588009016998650964701898323564917967287486958172645691520279879672022553939 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/18.ac_range_check_smoke_racl/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=549573971 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_racl_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/18.ac_range_check_smoke_racl.549573971 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 18.ac_range_check_smoke_racl.549573971 -covoverwrite' seed=20588009016998650964701898323564917967287486958172645691520279879672022553939 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=20588009016998650964701898323564917967287486958172645691520279879672022553939 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/18.ac_range_check_smoke_racl/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_racl_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_high_threshold 23376293660431395184866992880488177071567794790764025177191051546355809839676 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/18.ac_range_check_smoke_high_threshold/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=2629757500 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_high_threshold_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/18.ac_range_check_smoke_high_threshold.2629757500 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 18.ac_range_check_smoke_high_threshold.2629757500 -covoverwrite' seed=23376293660431395184866992880488177071567794790764025177191051546355809839676 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=23376293660431395184866992880488177071567794790764025177191051546355809839676 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/18.ac_range_check_smoke_high_threshold/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_high_threshold_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_lock_range 84510781740925500793333808028199712860573868602189151997254635562875070925539 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/18.ac_range_check_lock_range/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=576670435 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_lock_range_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/18.ac_range_check_lock_range.576670435 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 18.ac_range_check_lock_range.576670435 -covoverwrite' seed=84510781740925500793333808028199712860573868602189151997254635562875070925539 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=84510781740925500793333808028199712860573868602189151997254635562875070925539 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/18.ac_range_check_lock_range/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_lock_range_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_errors 76544574048605535844020689407810885542850881193393643894774389243246167255148 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/18.ac_range_check_tl_errors/latest run_opts='+run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3776768108 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/18.ac_range_check_tl_errors.3776768108 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 18.ac_range_check_tl_errors.3776768108 -covoverwrite' seed=76544574048605535844020689407810885542850881193393643894774389243246167255148 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=76544574048605535844020689407810885542850881193393643894774389243246167255148 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/18.ac_range_check_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_intg_err 102344746778114854838213091225937283457386586776478435872837292569230276059655 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/18.ac_range_check_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2428789255 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/18.ac_range_check_tl_intg_err.2428789255 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 18.ac_range_check_tl_intg_err.2428789255 -covoverwrite' seed=102344746778114854838213091225937283457386586776478435872837292569230276059655 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=102344746778114854838213091225937283457386586776478435872837292569230276059655 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/18.ac_range_check_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors 12570562214908711953724777614207326721157212606397112991521006650674103308301 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/18.ac_range_check_shadow_reg_errors/latest run_opts='+run_shadow_reg_errors +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3948269581 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/18.ac_range_check_shadow_reg_errors.3948269581 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 18.ac_range_check_shadow_reg_errors.3948269581 -covoverwrite' seed=12570562214908711953724777614207326721157212606397112991521006650674103308301 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=12570562214908711953724777614207326721157212606397112991521006650674103308301 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/18.ac_range_check_shadow_reg_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors_with_csr_rw 57364458113314902380932953481418141446549294705333579444537646945797426949532 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/18.ac_range_check_shadow_reg_errors_with_csr_rw/latest run_opts='+run_shadow_reg_errors_with_csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3587485084 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/18.ac_range_check_shadow_reg_errors_with_csr_rw.3587485084 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 18.ac_range_check_shadow_reg_errors_with_csr_rw.3587485084 -covoverwrite' seed=57364458113314902380932953481418141446549294705333579444537646945797426949532 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=57364458113314902380932953481418141446549294705333579444537646945797426949532 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/18.ac_range_check_shadow_reg_errors_with_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke 81711096744769148021920451585810342628997434334846275356764403099726632327676 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/19.ac_range_check_smoke/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=384440828 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/19.ac_range_check_smoke.384440828 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 19.ac_range_check_smoke.384440828 -covoverwrite' seed=81711096744769148021920451585810342628997434334846275356764403099726632327676 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=81711096744769148021920451585810342628997434334846275356764403099726632327676 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/19.ac_range_check_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_racl 12759914431047099580547496502800571640124279462759234766626726019403493097070 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/19.ac_range_check_smoke_racl/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=4236721774 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_racl_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/19.ac_range_check_smoke_racl.4236721774 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 19.ac_range_check_smoke_racl.4236721774 -covoverwrite' seed=12759914431047099580547496502800571640124279462759234766626726019403493097070 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=12759914431047099580547496502800571640124279462759234766626726019403493097070 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/19.ac_range_check_smoke_racl/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_racl_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_smoke_high_threshold 65004968875087958182834507707757968854264728897573267693067586464712649976060 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/19.ac_range_check_smoke_high_threshold/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=1880729852 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_smoke_high_threshold_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/19.ac_range_check_smoke_high_threshold.1880729852 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 19.ac_range_check_smoke_high_threshold.1880729852 -covoverwrite' seed=65004968875087958182834507707757968854264728897573267693067586464712649976060 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=65004968875087958182834507707757968854264728897573267693067586464712649976060 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/19.ac_range_check_smoke_high_threshold/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_smoke_high_threshold_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_lock_range 104263625798255208540567244382424084183691455306404799615115457816971270587102 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/19.ac_range_check_lock_range/latest run_opts='+UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/default/xcelium.d -r tb +SVSEED=1007059678 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_lock_range_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/default/19.ac_range_check_lock_range.1007059678 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope default -covtest 19.ac_range_check_lock_range.1007059678 -covoverwrite' seed=104263625798255208540567244382424084183691455306404799615115457816971270587102 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=104263625798255208540567244382424084183691455306404799615115457816971270587102 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/19.ac_range_check_lock_range/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_lock_range_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_errors 25329666685901607020272821119125639701652604182364331775315093884637251715723 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/19.ac_range_check_tl_errors/latest run_opts='+run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=4272767627 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/19.ac_range_check_tl_errors.4272767627 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 19.ac_range_check_tl_errors.4272767627 -covoverwrite' seed=25329666685901607020272821119125639701652604182364331775315093884637251715723 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=25329666685901607020272821119125639701652604182364331775315093884637251715723 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/19.ac_range_check_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_intg_err 64021730037947994527200576888257973411951236741044305308589224465657039021178 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/19.ac_range_check_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1386865786 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/19.ac_range_check_tl_intg_err.1386865786 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 19.ac_range_check_tl_intg_err.1386865786 -covoverwrite' seed=64021730037947994527200576888257973411951236741044305308589224465657039021178 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=64021730037947994527200576888257973411951236741044305308589224465657039021178 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/19.ac_range_check_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors 32713538267996882241404143536883532056914494171384967138087716487514669328981 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/19.ac_range_check_shadow_reg_errors/latest run_opts='+run_shadow_reg_errors +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=35269205 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/19.ac_range_check_shadow_reg_errors.35269205 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 19.ac_range_check_shadow_reg_errors.35269205 -covoverwrite' seed=32713538267996882241404143536883532056914494171384967138087716487514669328981 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=32713538267996882241404143536883532056914494171384967138087716487514669328981 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/19.ac_range_check_shadow_reg_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_shadow_reg_errors_with_csr_rw 77668108554199160584130719944748565928950519868812955947679607769420329026483 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/19.ac_range_check_shadow_reg_errors_with_csr_rw/latest run_opts='+run_shadow_reg_errors_with_csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1395295155 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/19.ac_range_check_shadow_reg_errors_with_csr_rw.1395295155 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 19.ac_range_check_shadow_reg_errors_with_csr_rw.1395295155 -covoverwrite' seed=77668108554199160584130719944748565928950519868812955947679607769420329026483 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=77668108554199160584130719944748565928950519868812955947679607769420329026483 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/19.ac_range_check_shadow_reg_errors_with_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_errors 12073522962689064167879324584955602008380077229138657496097037700472665006810 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/20.ac_range_check_tl_errors/latest run_opts='+run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2499011290 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/20.ac_range_check_tl_errors.2499011290 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 20.ac_range_check_tl_errors.2499011290 -covoverwrite' seed=12073522962689064167879324584955602008380077229138657496097037700472665006810 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=12073522962689064167879324584955602008380077229138657496097037700472665006810 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/20.ac_range_check_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_intg_err 65134656554342594324605662119094299847676743314425535849454289983761175952278 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/20.ac_range_check_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=243153814 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/20.ac_range_check_tl_intg_err.243153814 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 20.ac_range_check_tl_intg_err.243153814 -covoverwrite' seed=65134656554342594324605662119094299847676743314425535849454289983761175952278 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=65134656554342594324605662119094299847676743314425535849454289983761175952278 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/20.ac_range_check_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_errors 1468985495499899938088158332356897948369361440231399183579637390812127377728 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/21.ac_range_check_tl_errors/latest run_opts='+run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=243218752 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/21.ac_range_check_tl_errors.243218752 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 21.ac_range_check_tl_errors.243218752 -covoverwrite' seed=1468985495499899938088158332356897948369361440231399183579637390812127377728 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=1468985495499899938088158332356897948369361440231399183579637390812127377728 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/21.ac_range_check_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_intg_err 100608124933286700321424288181969055934998789823869017378121692608017542544261 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/21.ac_range_check_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1438251909 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/21.ac_range_check_tl_intg_err.1438251909 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 21.ac_range_check_tl_intg_err.1438251909 -covoverwrite' seed=100608124933286700321424288181969055934998789823869017378121692608017542544261 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=100608124933286700321424288181969055934998789823869017378121692608017542544261 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/21.ac_range_check_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_errors 50508298961037445440881074134998819325695951490705682922704167080314863953560 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/22.ac_range_check_tl_errors/latest run_opts='+run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2980914840 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/22.ac_range_check_tl_errors.2980914840 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 22.ac_range_check_tl_errors.2980914840 -covoverwrite' seed=50508298961037445440881074134998819325695951490705682922704167080314863953560 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=50508298961037445440881074134998819325695951490705682922704167080314863953560 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/22.ac_range_check_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_intg_err 108708382776538225642778360309818145278287218188596048152667510204867693531042 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/22.ac_range_check_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1578651554 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/22.ac_range_check_tl_intg_err.1578651554 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 22.ac_range_check_tl_intg_err.1578651554 -covoverwrite' seed=108708382776538225642778360309818145278287218188596048152667510204867693531042 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=108708382776538225642778360309818145278287218188596048152667510204867693531042 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/22.ac_range_check_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_errors 5692712722017490066262046193981130164857923583189993996360346541771390148674 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/23.ac_range_check_tl_errors/latest run_opts='+run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3282788418 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/23.ac_range_check_tl_errors.3282788418 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 23.ac_range_check_tl_errors.3282788418 -covoverwrite' seed=5692712722017490066262046193981130164857923583189993996360346541771390148674 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=5692712722017490066262046193981130164857923583189993996360346541771390148674 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/23.ac_range_check_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_intg_err 115008862044226171901840142356430292811993018004119442914561550510075383466003 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/23.ac_range_check_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2883930131 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/23.ac_range_check_tl_intg_err.2883930131 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 23.ac_range_check_tl_intg_err.2883930131 -covoverwrite' seed=115008862044226171901840142356430292811993018004119442914561550510075383466003 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=115008862044226171901840142356430292811993018004119442914561550510075383466003 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/23.ac_range_check_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_errors 102975879159428795763321890503498167248037756824348016972325597520487601203569 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/24.ac_range_check_tl_errors/latest run_opts='+run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=4075874673 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/24.ac_range_check_tl_errors.4075874673 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 24.ac_range_check_tl_errors.4075874673 -covoverwrite' seed=102975879159428795763321890503498167248037756824348016972325597520487601203569 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=102975879159428795763321890503498167248037756824348016972325597520487601203569 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/24.ac_range_check_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
ac_range_check_tl_intg_err 62933753281866031274266360626521020745178936493282228839792231223582178460445 None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/24.ac_range_check_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=657507101 +UVM_TESTNAME=ac_range_check_base_test +UVM_TEST_SEQ=ac_range_check_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage/cover_reg_top/24.ac_range_check_tl_intg_err.657507101 -covworkdir /nightly/current_run/scratch/master/ac_range_check-sim-xcelium/coverage -covscope cover_reg_top -covtest 24.ac_range_check_tl_intg_err.657507101 -covoverwrite' seed=62933753281866031274266360626521020745178936493282228839792231223582178460445 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='"'"''"'"' --sw-build-opts='"'"''"'"' --sw-build-device= --seed=62933753281866031274266360626521020745178936493282228839792231223582178460445 --run-dir=/nightly/current_run/scratch/master/ac_range_check-sim-xcelium/24.ac_range_check_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=ac_range_check_base_test uvm_test_seq=ac_range_check_common_vseq
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126
UVM_ERROR (ac_range_check_scoreboard.sv:373) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: ac_range_check_reg_block.intr_state 1 test run
ac_range_check_stress_all 28146577776315048585806924259882018243702337232875880442929068059064643476781 4587
UVM_INFO @ 1925912674 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Job returned a non-zero exit code: * 1 test run
ac_range_check None None
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk cov_merge cov_merge_cmd=imc cov_merge_opts='-64bit -licqueue -exec /nightly/current_run/opentitan/hw/dv/tools/xcelium/cov_merge.tcl'
/usr/bin/env: ‘bash’: Input/output error
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:109: cov_merge] Error 126
Job cancelled because one of its dependencies failed or was killed. 1 test run
ac_range_check None None