| V1 |
|
100.00% |
| V2 |
|
97.49% |
| V2S |
|
91.88% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| wake_up | 1 | 1 | 100.00 | |||
| aes_wake_up | 3.000s | 84.630us | 1 | 1 | 100.00 | |
| smoke | 10 | 10 | 100.00 | |||
| aes_smoke | 6.000s | 281.221us | 10 | 10 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| aes_csr_hw_reset | 2.000s | 104.476us | 1 | 1 | 100.00 | |
| csr_rw | 5 | 5 | 100.00 | |||
| aes_csr_rw | 3.000s | 74.382us | 5 | 5 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| aes_csr_bit_bash | 6.000s | 380.511us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| aes_csr_aliasing | 3.000s | 139.756us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 5 | 5 | 100.00 | |||
| aes_csr_mem_rw_with_rand_reset | 2.000s | 90.292us | 5 | 5 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 6 | 6 | 100.00 | |||
| aes_csr_rw | 3.000s | 74.382us | 5 | 5 | 100.00 | |
| aes_csr_aliasing | 3.000s | 139.756us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| algorithm | 70 | 70 | 100.00 | |||
| aes_smoke | 6.000s | 281.221us | 10 | 10 | 100.00 | |
| aes_config_error | 10.000s | 1309.113us | 50 | 50 | 100.00 | |
| aes_stress | 7.000s | 124.211us | 10 | 10 | 100.00 | |
| key_length | 70 | 70 | 100.00 | |||
| aes_smoke | 6.000s | 281.221us | 10 | 10 | 100.00 | |
| aes_config_error | 10.000s | 1309.113us | 50 | 50 | 100.00 | |
| aes_stress | 7.000s | 124.211us | 10 | 10 | 100.00 | |
| back2back | 35 | 35 | 100.00 | |||
| aes_stress | 7.000s | 124.211us | 10 | 10 | 100.00 | |
| aes_b2b | 29.000s | 779.158us | 25 | 25 | 100.00 | |
| backpressure | 10 | 10 | 100.00 | |||
| aes_stress | 7.000s | 124.211us | 10 | 10 | 100.00 | |
| multi_message | 92 | 95 | 96.84 | |||
| aes_smoke | 6.000s | 281.221us | 10 | 10 | 100.00 | |
| aes_config_error | 10.000s | 1309.113us | 50 | 50 | 100.00 | |
| aes_stress | 7.000s | 124.211us | 10 | 10 | 100.00 | |
| aes_alert_reset | 3601.000s | 0.000us | 22 | 25 | 88.00 | |
| failure_test | 82 | 85 | 96.47 | |||
| aes_man_cfg_err | 4.000s | 91.947us | 10 | 10 | 100.00 | |
| aes_config_error | 10.000s | 1309.113us | 50 | 50 | 100.00 | |
| aes_alert_reset | 3601.000s | 0.000us | 22 | 25 | 88.00 | |
| trigger_clear_test | 10 | 10 | 100.00 | |||
| aes_clear | 8.000s | 266.894us | 10 | 10 | 100.00 | |
| nist_test_vectors | 1 | 1 | 100.00 | |||
| aes_nist_vectors | 46.000s | 5434.135us | 1 | 1 | 100.00 | |
| nist_test_vectors_gcm | 1 | 1 | 100.00 | |||
| aes_nist_vectors_gcm | 10.000s | 2345.911us | 1 | 1 | 100.00 | |
| reset_recovery | 22 | 25 | 88.00 | |||
| aes_alert_reset | 3601.000s | 0.000us | 22 | 25 | 88.00 | |
| stress | 10 | 10 | 100.00 | |||
| aes_stress | 7.000s | 124.211us | 10 | 10 | 100.00 | |
| sideload | 20 | 20 | 100.00 | |||
| aes_stress | 7.000s | 124.211us | 10 | 10 | 100.00 | |
| aes_sideload | 9.000s | 805.008us | 10 | 10 | 100.00 | |
| deinitialization | 10 | 10 | 100.00 | |||
| aes_deinit | 9.000s | 325.902us | 10 | 10 | 100.00 | |
| stress_all | 5 | 10 | 50.00 | |||
| aes_stress_all | 10814.000s | 0.000us | 5 | 10 | 50.00 | |
| gcm_save_and_restore | 100 | 100 | 100.00 | |||
| aes_gcm_save_restore | 13.000s | 586.339us | 100 | 100 | 100.00 | |
| alert_test | 10 | 10 | 100.00 | |||
| aes_alert_test | 3.000s | 102.677us | 10 | 10 | 100.00 | |
| tl_d_oob_addr_access | 25 | 25 | 100.00 | |||
| aes_tl_errors | 4.000s | 798.943us | 25 | 25 | 100.00 | |
| tl_d_illegal_access | 25 | 25 | 100.00 | |||
| aes_tl_errors | 4.000s | 798.943us | 25 | 25 | 100.00 | |
| tl_d_outstanding_access | 12 | 12 | 100.00 | |||
| aes_csr_hw_reset | 2.000s | 104.476us | 1 | 1 | 100.00 | |
| aes_csr_rw | 3.000s | 74.382us | 5 | 5 | 100.00 | |
| aes_csr_aliasing | 3.000s | 139.756us | 1 | 1 | 100.00 | |
| aes_same_csr_outstanding | 3.000s | 104.117us | 5 | 5 | 100.00 | |
| tl_d_partial_access | 12 | 12 | 100.00 | |||
| aes_csr_hw_reset | 2.000s | 104.476us | 1 | 1 | 100.00 | |
| aes_csr_rw | 3.000s | 74.382us | 5 | 5 | 100.00 | |
| aes_csr_aliasing | 3.000s | 139.756us | 1 | 1 | 100.00 | |
| aes_same_csr_outstanding | 3.000s | 104.117us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| reseeding | 4 | 10 | 40.00 | |||
| aes_reseed | 15.000s | 607.647us | 4 | 10 | 40.00 | |
| fault_inject | 586 | 660 | 88.79 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 273 | 300 | 91.00 | |
| aes_cipher_fi | 61.000s | 0.000us | 313 | 350 | 89.43 | |
| shadow_reg_update_error | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 626.201us | 20 | 20 | 100.00 | |
| shadow_reg_read_clear_staged_value | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 626.201us | 20 | 20 | 100.00 | |
| shadow_reg_storage_error | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 626.201us | 20 | 20 | 100.00 | |
| shadowed_reset_glitch | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 626.201us | 20 | 20 | 100.00 | |
| shadow_reg_update_error_with_csr_rw | 19 | 20 | 95.00 | |||
| aes_shadow_reg_errors_with_csr_rw | 5.000s | 595.956us | 19 | 20 | 95.00 | |
| tl_intg_err | 30 | 30 | 100.00 | |||
| aes_sec_cm | 12.000s | 2504.982us | 5 | 5 | 100.00 | |
| aes_tl_intg_err | 4.000s | 233.187us | 25 | 25 | 100.00 | |
| sec_cm_bus_integrity | 25 | 25 | 100.00 | |||
| aes_tl_intg_err | 4.000s | 233.187us | 25 | 25 | 100.00 | |
| sec_cm_lc_escalate_en_intersig_mubi | 22 | 25 | 88.00 | |||
| aes_alert_reset | 3601.000s | 0.000us | 22 | 25 | 88.00 | |
| sec_cm_main_config_shadow | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 626.201us | 20 | 20 | 100.00 | |
| sec_cm_gcm_config_shadow | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 626.201us | 20 | 20 | 100.00 | |
| sec_cm_main_config_sparse | 131 | 145 | 90.34 | |||
| aes_smoke | 6.000s | 281.221us | 10 | 10 | 100.00 | |
| aes_stress | 7.000s | 124.211us | 10 | 10 | 100.00 | |
| aes_alert_reset | 3601.000s | 0.000us | 22 | 25 | 88.00 | |
| aes_core_fi | 90.000s | 10007.148us | 89 | 100 | 89.00 | |
| sec_cm_gcm_config_sparse | 249 | 260 | 95.77 | |||
| aes_gcm_save_restore | 13.000s | 586.339us | 100 | 100 | 100.00 | |
| aes_config_error | 10.000s | 1309.113us | 50 | 50 | 100.00 | |
| aes_stress | 7.000s | 124.211us | 10 | 10 | 100.00 | |
| aes_core_fi | 90.000s | 10007.148us | 89 | 100 | 89.00 | |
| sec_cm_aux_config_shadow | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 626.201us | 20 | 20 | 100.00 | |
| sec_cm_aux_config_regwen | 20 | 20 | 100.00 | |||
| aes_readability | 3.000s | 152.273us | 10 | 10 | 100.00 | |
| aes_stress | 7.000s | 124.211us | 10 | 10 | 100.00 | |
| sec_cm_key_sideload | 20 | 20 | 100.00 | |||
| aes_stress | 7.000s | 124.211us | 10 | 10 | 100.00 | |
| aes_sideload | 9.000s | 805.008us | 10 | 10 | 100.00 | |
| sec_cm_key_sw_unreadable | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 152.273us | 10 | 10 | 100.00 | |
| sec_cm_data_reg_sw_unreadable | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 152.273us | 10 | 10 | 100.00 | |
| sec_cm_key_sec_wipe | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 152.273us | 10 | 10 | 100.00 | |
| sec_cm_iv_config_sec_wipe | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 152.273us | 10 | 10 | 100.00 | |
| sec_cm_data_reg_sec_wipe | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 152.273us | 10 | 10 | 100.00 | |
| sec_cm_data_reg_key_sca | 10 | 10 | 100.00 | |||
| aes_stress | 7.000s | 124.211us | 10 | 10 | 100.00 | |
| sec_cm_key_masking | 10 | 10 | 100.00 | |||
| aes_stress | 7.000s | 124.211us | 10 | 10 | 100.00 | |
| sec_cm_main_fsm_sparse | 0 | 10 | 0.00 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| sec_cm_main_fsm_redun | 611 | 685 | 89.20 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 273 | 300 | 91.00 | |
| aes_cipher_fi | 61.000s | 0.000us | 313 | 350 | 89.43 | |
| aes_ctr_fi | 6.000s | 146.391us | 25 | 25 | 100.00 | |
| sec_cm_cipher_fsm_sparse | 0 | 10 | 0.00 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| sec_cm_cipher_fsm_redun | 586 | 660 | 88.79 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 273 | 300 | 91.00 | |
| aes_cipher_fi | 61.000s | 0.000us | 313 | 350 | 89.43 | |
| sec_cm_cipher_ctr_redun | 313 | 350 | 89.43 | |||
| aes_cipher_fi | 61.000s | 0.000us | 313 | 350 | 89.43 | |
| sec_cm_ctr_fsm_sparse | 0 | 10 | 0.00 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| sec_cm_ctr_fsm_redun | 298 | 335 | 88.96 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 273 | 300 | 91.00 | |
| aes_ctr_fi | 6.000s | 146.391us | 25 | 25 | 100.00 | |
| sec_cm_ghash_fsm_sparse | 0 | 10 | 0.00 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| sec_cm_ctrl_sparse | 611 | 685 | 89.20 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 273 | 300 | 91.00 | |
| aes_cipher_fi | 61.000s | 0.000us | 313 | 350 | 89.43 | |
| aes_ctr_fi | 6.000s | 146.391us | 25 | 25 | 100.00 | |
| sec_cm_main_fsm_global_esc | 22 | 25 | 88.00 | |||
| aes_alert_reset | 3601.000s | 0.000us | 22 | 25 | 88.00 | |
| sec_cm_main_fsm_local_esc | 611 | 685 | 89.20 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 273 | 300 | 91.00 | |
| aes_cipher_fi | 61.000s | 0.000us | 313 | 350 | 89.43 | |
| aes_ctr_fi | 6.000s | 146.391us | 25 | 25 | 100.00 | |
| sec_cm_cipher_fsm_local_esc | 611 | 685 | 89.20 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 273 | 300 | 91.00 | |
| aes_cipher_fi | 61.000s | 0.000us | 313 | 350 | 89.43 | |
| aes_ctr_fi | 6.000s | 146.391us | 25 | 25 | 100.00 | |
| sec_cm_ctr_fsm_local_esc | 298 | 335 | 88.96 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 273 | 300 | 91.00 | |
| aes_ctr_fi | 6.000s | 146.391us | 25 | 25 | 100.00 | |
| sec_cm_ghash_fsm_local_esc | 90 | 100 | 90.00 | |||
| aes_ghash_fi | 12.000s | 1142.087us | 90 | 90 | 100.00 | |
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| sec_cm_data_reg_local_esc | 586 | 660 | 88.79 | |||
| aes_fi | 3601.000s | 0.000us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 273 | 300 | 91.00 | |
| aes_cipher_fi | 61.000s | 0.000us | 313 | 350 | 89.43 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 0 | 10 | 0.00 | |||
| aes_stress_all_with_rand_reset | 45.000s | 3774.037us | 0 | 10 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| Job timed out after * minutes | 33 test runs | |||
| aes_fi | 8486764601956086081225853217542203589020750061009477460274560615878932568637 | None | ||
| aes_stress_all | 3670070408396498637870571384264523042054873947615355018253240930240590450674 | None | ||
| aes_alert_reset | 8046708090717420745205322152893868561060042653078396326810901284276405805000 | None | ||
| aes_control_fi | 50093849019641067807999737572800814202377663728580352456758511860147136449752 | None | ||
| aes_control_fi | 40479595316341250680318586417694393837878689357202609881950594564997056708072 | None | ||
| aes_control_fi | 40188145726447527521205951114612908590846526945736102119049504681372042746949 | None | ||
| aes_cipher_fi | 59963824766201711700232717938093600822579995860499455857286772148653600727495 | None | ||
| aes_control_fi | 15544067584102119492011615645312987454936109804766112632662308556069909388376 | None | ||
| aes_cipher_fi | 33512269149584531457527701136178295022779027488798321842088001822584580133884 | None | ||
| aes_cipher_fi | 31521362197303050015273730299444448078762303145320019397616084103608024752128 | None | ||
| aes_control_fi | 44483808289618354505034673485091586955261171786202677961052146838545382480809 | None | ||
| aes_cipher_fi | 84436307155747876954787306297945996975832632541450851480296616942107421817710 | None | ||
| aes_control_fi | 77398024339664453076844683915370468058474753020598316785982636702102849163214 | None | ||
| aes_cipher_fi | 89994000345777850291466514960256822577892771315188685190138366943691145282265 | None | ||
| aes_cipher_fi | 74583234129019445780892526087360209713611996836204288306257142814826730949834 | None | ||
| aes_control_fi | 62673083342557511462014699954859152056056971291217707736455456724803959735763 | None | ||
| aes_cipher_fi | 17105230332875191324654865124832695523126132744279643184743329375929117018562 | None | ||
| aes_cipher_fi | 3398389834112205572719251319234760989824048941206091981017560824929469564524 | None | ||
| aes_cipher_fi | 80128408486514342418414022646181655538769172972144547336613431492599377388080 | None | ||
| aes_cipher_fi | 91549216766701184107073387818862550903627357949558675132249832988623492986265 | None | ||
| aes_control_fi | 4809213778811005067260874561406307701528816955937022669198280641953793693324 | None | ||
| aes_cipher_fi | 47833400590709988734724606259375031124819876118095626484208843332998968120666 | None | ||
| aes_control_fi | 7235566038314739299315708892625166593419094085032785758794096492418833009197 | None | ||
| aes_cipher_fi | 9942948733074208242736943035395775676333253680908336265553762677953572678168 | None | ||
| aes_control_fi | 95763522608593166262608445204458440610517226724681148181648962173649001835208 | None | ||
| aes_control_fi | 114940218752873532521482717886128937730432406205976109585857784800412638498980 | None | ||
| aes_control_fi | 77284807891540493887833163143521880912991223659483220728338564507834719911234 | None | ||
| aes_cipher_fi | 52876448756438740311835407345215199151158649607995673177166413224078037972133 | None | ||
| aes_cipher_fi | 44189675571394068509284487951652447329920436171881821875340385732510021506817 | None | ||
| aes_cipher_fi | 50895403674147178803311248356192726164224495482394436820001265225270349410980 | None | ||
| aes_control_fi | 107233971229093234695793441465501603462672713708194981438006457165916019751778 | None | ||
| aes_control_fi | 72754328166406797970892610001641452480099358722505357942590828727807195199027 | None | ||
| aes_cipher_fi | 78435228274154195921675590344270628450471878180359447286723511026911029044114 | None | ||
| UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred! | 20 test runs | |||
| aes_cipher_fi | 99206846296448480154890771759105039265994648447313328765875633460724352758331 | 143 |
UVM_INFO @ 10172169133 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 70446543003547671890914497419970515434677547274466518938829522144709909268000 | 150 |
UVM_INFO @ 10011093858 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 53686769672007032758163212119369515221134740889463577934492262021544668625493 | 150 |
UVM_INFO @ 10007913842 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 108515000356511525587614409718090992031352834681278252556575633283445228423085 | 153 |
UVM_INFO @ 10024209118 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 39929166792004744203708415956121823525919928725989627031842345203052987156300 | 148 |
UVM_INFO @ 10011510616 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 88359207617085352402175132134630235132078047365933901510095532556907819744090 | 143 |
UVM_INFO @ 10091441859 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 50889965465236722653915059729508087858336080619095667949023063190127156491049 | 144 |
UVM_INFO @ 10015820589 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 83854289071379668495294381499460051107498724046575276176870828841915289193257 | 162 |
UVM_INFO @ 10006943075 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 86131134835704635030754932215062348010277578919264094091113106567650910555223 | 141 |
UVM_INFO @ 10097139944 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 1106942519087899500919677032487678245682239603051862883368555555225608678653 | 145 |
UVM_INFO @ 10008217823 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 33977824951419337380934118897251351932302836053958693465400097333724527717863 | 151 |
UVM_INFO @ 10013000432 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 26901914097407364838610405605564780408412108366995030162060222963270236864776 | 157 |
UVM_INFO @ 10008038712 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 79147666228966636835189509656456931333535156581884867472406135867884829021419 | 146 |
UVM_INFO @ 10095739592 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 4653627674619915679007415390843546178261253093098794544193220253095552026385 | 149 |
UVM_INFO @ 10018382146 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 34884361708795724868598047541445987006301761474133731186307028025103743091136 | 150 |
UVM_INFO @ 10027631792 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 114915052854381319502959129235658616703563278701201832251501605765970804288000 | 156 |
UVM_INFO @ 10049289402 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 14915571174494218799870243148161928306805762670958868462427268747039519957793 | 145 |
UVM_INFO @ 10055100244 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 9960825396242206196029229880730877600510892344618483787556016681558115613110 | 152 |
UVM_INFO @ 10016985449 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 64250484388596246555397453630340499405252744803523691814811869094950721567157 | 147 |
UVM_INFO @ 10027793374 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 22736332955775940251242703833708964511257036554045234865840775094561417783693 | 151 |
UVM_INFO @ 10012783280 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'parent_sequence' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues | 15 test runs | |||
| aes_reseed | 39369783575332062565222541767607059037804294291667928920337727239882146543741 | 2072 |
UVM_INFO @ 95561839 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all | 81611235867063946078120178528390046303355075676519738385497152418960669763763 | 91116 |
UVM_INFO @ 367875173 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_reseed | 3386955226405083674763611092972391564846521984856096062612570420277547148203 | 5367 |
UVM_INFO @ 88965094 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 80097386843072588139853361007649957806069809270401507189817775534226023707492 | 364 |
UVM_INFO @ 1044288694 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_reseed | 31707247851833029092535600336773439833189703458281532730495082082392933530573 | 30452 |
UVM_INFO @ 607646551 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all | 96125155727969765753724561953761690847448186356194913023084189208723520789042 | 83053 |
UVM_INFO @ 362110175 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 29879006062182705447627709475772579142235157411240441030276868454602133206217 | 332 |
UVM_INFO @ 539427166 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_reseed | 99902168436033168716518679720643987276317037711458312304826792531518901606456 | 8323 |
UVM_INFO @ 121690662 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 68707667063718857539724383133245829871064974829893880146210113666020632144853 | 347 |
UVM_INFO @ 348112928 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all | 115139684627162611256093733564310347382732974621824923092785461446752876430549 | 76333 |
UVM_INFO @ 1308987757 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_reseed | 12329444962304141514300224433720791869949987841879136453221476355269380006087 | 3359 |
UVM_INFO @ 76099841 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all | 30100091129047974805534448864403444469156562301825992006318490998051121344607 | 119090 |
UVM_INFO @ 988089843 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_reseed | 21543795577896234880197902931373156448255213444246743298355433295881958612638 | 5793 |
UVM_INFO @ 22971675 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 39701470369664120703960872502454663768322684515655088897917053761056477276061 | 179 |
UVM_INFO @ 76904394 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 36079222697664867030369590786838977944492456147240087867464650856405521578059 | 583 |
UVM_INFO @ 1141272013 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred! | 12 test runs | |||
| aes_control_fi | 58419900129422656998529072428948839831647485179934909689333369395507574634488 | 143 |
UVM_INFO @ 10050628603 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 18978974933664912209075167181546783781333184150913774257046274575427502096433 | 154 |
UVM_INFO @ 10041486401 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 70865213643403423729073725272397741177233405865880676091980482530422009425565 | 143 |
UVM_INFO @ 10019943497 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 60499523561089021687764146606473500897968166602602624534986920952488171959508 | 146 |
UVM_INFO @ 10006386899 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 40895724595559688822033064396548559601055513461197680604851586986972980749361 | 145 |
UVM_INFO @ 10050426387 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 21313689652260074911345070030510322879889366088673512686382081487308676199159 | 150 |
UVM_INFO @ 10022560819 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 10392126732972160698745546513749325950788706733414674859723641770589954216766 | 150 |
UVM_INFO @ 10020855240 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 75572221070019913294672723429662707873736125691104057784828436094534020303263 | 142 |
UVM_INFO @ 10023655365 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 68387839635711626321487668810898764992705536627838165667381361589866717379586 | 144 |
UVM_INFO @ 10075727460 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 70490636466636852078876880035824548442397113090674212687052069240625713106946 | 145 |
UVM_INFO @ 10005730257 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 75477245415320265443232733862561517262294316367924925748403412493603906336039 | 157 |
UVM_INFO @ 10010133257 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 96753739800085750593825993287512686703183749491912141931456662763536619637677 | 154 |
UVM_INFO @ 10123624394 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_core_fi_vseq.sv:70) [aes_core_fi_vseq] wait timeout occurred! | 11 test runs | |||
| aes_core_fi | 9028681276069564367983730428233857651069137026356591464565698733382118909132 | 152 |
UVM_INFO @ 10057578829 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 28305999964294884174954130511044223773334470634425424363662824142168048118819 | 143 |
UVM_INFO @ 10007148239 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 12523614691811183280561777013215548871888643955252175548302833302768770685717 | 147 |
UVM_INFO @ 10009516691 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 107438234415627824191399646054167565269358590546525500040714961940894823063469 | 146 |
UVM_INFO @ 10007145440 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 14033333207588558574561841756930743170432480748077861041313866727362586661284 | 151 |
UVM_INFO @ 10009919557 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 97996793047997163454153710971887339204080632423743866370841349367521239914834 | 141 |
UVM_INFO @ 10012975041 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 100672045995947207089337273368115355070245253233627103852485277614668538132372 | 152 |
UVM_INFO @ 10036004198 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 3133538769122265780792342339847344130286222447562720682559743528852238537753 | 145 |
UVM_INFO @ 10009205548 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 96454441811058776361304842614592413933131134862265982889303002292639226003339 | 149 |
UVM_INFO @ 10008201409 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 84594975092684113966118792183608091989737373616705637120985362635323517246554 | 146 |
UVM_INFO @ 10006557294 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 70118334844125464795811487942185454232814795562597956224242237713549375353169 | 143 |
UVM_INFO @ 10029179825 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_scoreboard.sv:923) scoreboard [scoreboard] | 8 test runs | |||
| aes_fi | 79647739521498339089748969829529385379967245997223058401543086977023677236650 | 3621 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 2
----| Expected corrupted: 0
|
|
| aes_fi | 3461659754805465410163270802827883345885715089725545856646362560122849380794 | 8741 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 2
----| Expected corrupted: 0
|
|
| aes_fi | 10839484947991304715893788863131701937083939691232547038834146097312188897479 | 40554 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 5
----| Seen: 4
----| Expected corrupted: 0
|
|
| aes_fi | 73153464637232950624598026641580734012118112366148899409064713833637382669746 | 9909 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 5
----| Expected corrupted: 0
|
|
| aes_fi | 99590518139492171202187308588501778890954467137765728898405742016934513793510 | 11552 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 5
----| Expected corrupted: 0
|
|
| aes_fi | 75939779288109208148600474377728016395957039138911606110347548943679067587497 | 20417 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 5
----| Seen: 4
----| Expected corrupted: 0
|
|
| aes_fi | 14286060620977155131638812111587144135157189276652153720270888124613613875938 | 18920 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 5
----| Seen: 4
----| Expected corrupted: 0
|
|
| aes_fi | 45938449196421302380636821682468990494429176085895165911576208721196964886756 | 16313 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 2
----| Expected corrupted: 0
|
|
| UVM_FATAL (cip_base_vseq.sv:1230) [aes_common_vseq] Check failed (vseq_done) | 3 test runs | |||
| aes_stress_all_with_rand_reset | 43130141608702174237699327967953291489110347580790752009233023933473817820810 | 171 |
UVM_INFO @ 39230889 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 48298349762365900580214726006115877543722150820202953845405066158979319595964 | 163 |
UVM_INFO @ 21348377 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 6969814796193575302900630764521788973966821799056496883436249664688671529029 | 621 |
UVM_INFO @ 3774037419 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue | 3 test runs | |||
| aes_fi | 21208515838621818853755098661959472911711063561600368945312858234586780381866 | 7709066 |
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_alert_reset | 45551193738466535793435173588996665243838812289954285812418360345840499917690 | 4723054 |
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_alert_reset | 108330745749514886553973558785141242998175267422312597892035546224077284275801 | 7331998 |
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_base_vseq.sv:87) [aes_stress_all_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) | 2 test runs | |||
| aes_stress_all_with_rand_reset | 92269890162059231671908018634501472918369407429094785945487272445452900075858 | 112 |
UVM_INFO @ 26390485 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 32897290293879100595156038244909519260568782991316353494807657741699963214599 | 112 |
UVM_INFO @ 13574703 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (cip_base_vseq.sv:1391) [aes_common_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_fault does not trigger! | 1 test run | |||
| aes_shadow_reg_errors_with_csr_rw | 93651024050960558269498432329019984261445617951042687679332256032191944441720 | 110 |
UVM_INFO @ 595956414 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (csr_utils_pkg.sv:623) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=6) | 1 test run | |||
| aes_cipher_fi | 115534063099581560577356894580278511809851551152551911729784333003359239062740 | 140 |
UVM_INFO @ 10041774870 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_gcm_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_*/rtl/aes_core.sv,1143): Assertion AesSecCmDataRegLocalEscIv has failed (* cycles, starting * PS) | 1 test run | |||
| aes_control_fi | 17061346301790048025703501568200780432612439864015329439491561248361054591136 | 145 |
UVM_ERROR @ 14992311 ps: (aes_core.sv:1143) [ASSERT FAILED] AesSecCmDataRegLocalEscIv
UVM_INFO @ 14992311 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|