Simulation Results: otbn

 
04/09/2026 15:01:37 DVSim: v1.49.0 sha: 02ae8da json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 92.58 %
  • code
  • 86.88 %
  • assert
  • 90.87 %
  • func
  • 100.00 %
  • block
  • 99.30 %
  • line
  • 99.52 %
  • branch
  • 94.90 %
  • toggle
  • 85.49 %
  • FSM
  • 67.61 %
Validation stages
V1
100.00%
V2
95.88%
V2S
98.18%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 2 2 100.00
otbn_smoke 12.000s 43.139us 1 1 100.00
otbn_smoke_vectorized 7.000s 81.890us 1 1 100.00
single_binary 100 100 100.00
otbn_single 484.000s 1704.681us 100 100 100.00
csr_hw_reset 1 1 100.00
otbn_csr_hw_reset 9.000s 24.611us 1 1 100.00
csr_rw 5 5 100.00
otbn_csr_rw 5.000s 44.808us 5 5 100.00
csr_bit_bash 1 1 100.00
otbn_csr_bit_bash 15.000s 146.842us 1 1 100.00
csr_aliasing 1 1 100.00
otbn_csr_aliasing 9.000s 37.853us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
otbn_csr_mem_rw_with_rand_reset 10.000s 157.627us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
otbn_csr_rw 5.000s 44.808us 5 5 100.00
otbn_csr_aliasing 9.000s 37.853us 1 1 100.00
mem_walk 1 1 100.00
otbn_mem_walk 152.000s 5868.339us 1 1 100.00
mem_partial_access 1 1 100.00
otbn_mem_partial_access 29.000s 574.015us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reset_recovery 10 10 100.00
otbn_reset 46.000s 110.850us 10 10 100.00
multi_error 1 1 100.00
otbn_multi_err 67.000s 169.738us 1 1 100.00
wfi 1 7 14.29
otbn_wfi_smoke 6.000s 6.906us 0 1 0.00
otbn_wfi_sec_wipe 10.000s 26.804us 1 5 20.00
otbn_wfi_back_to_back 7.000s 20.108us 0 1 0.00
back_to_back 10 10 100.00
otbn_multi 544.000s 8035.936us 10 10 100.00
stress_all 10 10 100.00
otbn_stress_all 215.000s 1726.297us 10 10 100.00
lc_escalation 59 60 98.33
otbn_escalate 25.000s 53.283us 59 60 98.33
zero_state_err_urnd 5 5 100.00
otbn_zero_state_err_urnd 9.000s 16.419us 5 5 100.00
sw_errs_fatal_chk 10 10 100.00
otbn_sw_errs_fatal_chk 26.000s 133.910us 10 10 100.00
alert_test 10 10 100.00
otbn_alert_test 11.000s 17.461us 10 10 100.00
intr_test 10 10 100.00
otbn_intr_test 5.000s 19.850us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
otbn_tl_errors 9.000s 651.929us 25 25 100.00
tl_d_illegal_access 25 25 100.00
otbn_tl_errors 9.000s 651.929us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
otbn_csr_hw_reset 9.000s 24.611us 1 1 100.00
otbn_csr_rw 5.000s 44.808us 5 5 100.00
otbn_csr_aliasing 9.000s 37.853us 1 1 100.00
otbn_same_csr_outstanding 6.000s 34.905us 5 5 100.00
tl_d_partial_access 12 12 100.00
otbn_csr_hw_reset 9.000s 24.611us 1 1 100.00
otbn_csr_rw 5.000s 44.808us 5 5 100.00
otbn_csr_aliasing 9.000s 37.853us 1 1 100.00
otbn_same_csr_outstanding 6.000s 34.905us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
mem_integrity 25 25 100.00
otbn_imem_err 14.000s 36.352us 10 10 100.00
otbn_dmem_err 16.000s 47.420us 15 15 100.00
internal_integrity 16 17 94.12
otbn_alu_bignum_mod_err 19.000s 76.250us 5 5 100.00
otbn_controller_ispr_rdata_err 14.000s 252.492us 5 5 100.00
otbn_mac_bignum_acc_err 29.000s 63.855us 5 5 100.00
otbn_urnd_err 7.000s 16.448us 1 2 50.00
illegal_bus_access 5 5 100.00
otbn_illegal_mem_acc 15.000s 47.086us 5 5 100.00
otbn_mem_gnt_acc_err 2 2 100.00
otbn_mem_gnt_acc_err 8.000s 13.754us 2 2 100.00
otbn_non_sec_partial_wipe 9 10 90.00
otbn_partial_wipe 9.000s 29.868us 9 10 90.00
tl_intg_err 30 30 100.00
otbn_sec_cm 773.000s 3469.861us 5 5 100.00
otbn_tl_intg_err 43.000s 241.369us 25 25 100.00
passthru_mem_tl_intg_err 2 5 40.00
otbn_passthru_mem_tl_intg_err 44.000s 145.732us 2 5 40.00
prim_fsm_check 5 5 100.00
otbn_sec_cm 773.000s 3469.861us 5 5 100.00
prim_count_check 5 5 100.00
otbn_sec_cm 773.000s 3469.861us 5 5 100.00
sec_cm_mem_scramble 1 1 100.00
otbn_smoke 12.000s 43.139us 1 1 100.00
sec_cm_data_mem_integrity 15 15 100.00
otbn_dmem_err 16.000s 47.420us 15 15 100.00
sec_cm_instruction_mem_integrity 10 10 100.00
otbn_imem_err 14.000s 36.352us 10 10 100.00
sec_cm_bus_integrity 25 25 100.00
otbn_tl_intg_err 43.000s 241.369us 25 25 100.00
sec_cm_controller_fsm_global_esc 59 60 98.33
otbn_escalate 25.000s 53.283us 59 60 98.33
sec_cm_controller_fsm_local_esc 40 40 100.00
otbn_imem_err 14.000s 36.352us 10 10 100.00
otbn_dmem_err 16.000s 47.420us 15 15 100.00
otbn_zero_state_err_urnd 9.000s 16.419us 5 5 100.00
otbn_illegal_mem_acc 15.000s 47.086us 5 5 100.00
otbn_sec_cm 773.000s 3469.861us 5 5 100.00
sec_cm_controller_fsm_sparse 5 5 100.00
otbn_sec_cm 773.000s 3469.861us 5 5 100.00
sec_cm_scramble_key_sideload 100 100 100.00
otbn_single 484.000s 1704.681us 100 100 100.00
sec_cm_scramble_ctrl_fsm_local_esc 40 40 100.00
otbn_imem_err 14.000s 36.352us 10 10 100.00
otbn_dmem_err 16.000s 47.420us 15 15 100.00
otbn_zero_state_err_urnd 9.000s 16.419us 5 5 100.00
otbn_illegal_mem_acc 15.000s 47.086us 5 5 100.00
otbn_sec_cm 773.000s 3469.861us 5 5 100.00
sec_cm_scramble_ctrl_fsm_sparse 5 5 100.00
otbn_sec_cm 773.000s 3469.861us 5 5 100.00
sec_cm_start_stop_ctrl_fsm_global_esc 59 60 98.33
otbn_escalate 25.000s 53.283us 59 60 98.33
sec_cm_start_stop_ctrl_fsm_local_esc 40 40 100.00
otbn_imem_err 14.000s 36.352us 10 10 100.00
otbn_dmem_err 16.000s 47.420us 15 15 100.00
otbn_zero_state_err_urnd 9.000s 16.419us 5 5 100.00
otbn_illegal_mem_acc 15.000s 47.086us 5 5 100.00
otbn_sec_cm 773.000s 3469.861us 5 5 100.00
sec_cm_start_stop_ctrl_fsm_sparse 5 5 100.00
otbn_sec_cm 773.000s 3469.861us 5 5 100.00
sec_cm_data_reg_sw_sca 100 100 100.00
otbn_single 484.000s 1704.681us 100 100 100.00
sec_cm_ctrl_redun 12 12 100.00
otbn_ctrl_redun 10.000s 20.076us 12 12 100.00
sec_cm_pc_ctrl_flow_redun 5 5 100.00
otbn_pc_ctrl_flow_redun 9.000s 126.672us 5 5 100.00
sec_cm_rnd_bus_consistency 5 5 100.00
otbn_rnd_sec_cm 41.000s 760.729us 5 5 100.00
sec_cm_rnd_rng_digest 5 5 100.00
otbn_rnd_sec_cm 41.000s 760.729us 5 5 100.00
sec_cm_rf_base_data_reg_sw_integrity 10 10 100.00
otbn_rf_base_intg_err 19.000s 76.887us 10 10 100.00
sec_cm_rf_base_data_reg_sw_glitch_detect 5 5 100.00
otbn_sec_cm 773.000s 3469.861us 5 5 100.00
sec_cm_stack_wr_ptr_ctr_redun 5 5 100.00
otbn_sec_cm 773.000s 3469.861us 5 5 100.00
sec_cm_rf_bignum_data_reg_sw_integrity 10 10 100.00
otbn_rf_bignum_intg_err 15.000s 130.921us 10 10 100.00
sec_cm_rf_bignum_data_reg_sw_glitch_detect 5 5 100.00
otbn_sec_cm 773.000s 3469.861us 5 5 100.00
sec_cm_loop_stack_ctr_redun 5 5 100.00
otbn_sec_cm 773.000s 3469.861us 5 5 100.00
sec_cm_loop_stack_addr_integrity 5 5 100.00
otbn_stack_addr_integ_chk 15.000s 71.551us 5 5 100.00
sec_cm_call_stack_addr_integrity 5 5 100.00
otbn_stack_addr_integ_chk 15.000s 71.551us 5 5 100.00
sec_cm_start_stop_ctrl_state_consistency 7 7 100.00
otbn_sec_wipe_err 19.000s 51.825us 7 7 100.00
sec_cm_data_mem_sec_wipe 100 100 100.00
otbn_single 484.000s 1704.681us 100 100 100.00
sec_cm_instruction_mem_sec_wipe 100 100 100.00
otbn_single 484.000s 1704.681us 100 100 100.00
sec_cm_data_reg_sw_sec_wipe 100 100 100.00
otbn_single 484.000s 1704.681us 100 100 100.00
sec_cm_write_mem_integrity 10 10 100.00
otbn_multi 544.000s 8035.936us 10 10 100.00
sec_cm_ctrl_flow_count 100 100 100.00
otbn_single 484.000s 1704.681us 100 100 100.00
sec_cm_ctrl_flow_sca 100 100 100.00
otbn_single 484.000s 1704.681us 100 100 100.00
sec_cm_data_mem_sw_noaccess 5 5 100.00
otbn_sw_no_acc 25.000s 130.474us 5 5 100.00
sec_cm_key_sideload 100 100 100.00
otbn_single 484.000s 1704.681us 100 100 100.00
sec_cm_tlul_fifo_ctr_redun 5 5 100.00
otbn_sec_cm 773.000s 3469.861us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 10 0.00
otbn_stress_all_with_rand_reset 79.000s 4875.413us 0 10 0.00

Error Messages

   Test seed line log context
UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -* 9 test runs
otbn_stress_all_with_rand_reset 39422188610762683182578042778437596584331539246189665528496738880793327567677 150
UVM_INFO @ 22457001 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_stress_all_with_rand_reset 75688900772647612682500622012099073312956932209640624660752844926739452731007 148
UVM_INFO @ 14109189 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_stress_all_with_rand_reset 44907551709596470891810583243874281478395678056442607711577105883666259919515 161
UVM_INFO @ 126965686 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_stress_all_with_rand_reset 101647400962245934693433996653275781600740217619827983718730263972164995110256 203
UVM_INFO @ 409070020 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_stress_all_with_rand_reset 7468791420544740083192444776094333478327177298119163603153519196602944118439 144
UVM_INFO @ 99298169 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_stress_all_with_rand_reset 99001587452514713357766593577261625519570049229266784958508768041208395793644 146
UVM_INFO @ 40685823 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_stress_all_with_rand_reset 60036317632753663582283508261571130782383515874959490594007081018258466238394 165
UVM_INFO @ 56676101 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_stress_all_with_rand_reset 4696146083633153001178752217579360310905661400646926941565137420105582883097 146
UVM_INFO @ 12119038 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_stress_all_with_rand_reset 70022236192797972488539711074201216189148532389755642298779646627170568580056 146
UVM_INFO @ 8594737 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_*/otbn_env_cov.sv, Line: *):(Time: * PS + *) Sampled value (*) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@*_*.cur_cp) is an illegal value. 4 test runs
otbn_wfi_sec_wipe 41901384970330811880458159493893114339915296988728556016376955060087018776291 113
UVM_FATAL @ 18038296 ps: (otbn_env_cov.sv:2728) [uvm_test_top.env.cov] Unknown encoding () for instruction `wfi'
UVM_INFO @ 18038296 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_wfi_sec_wipe 72746747477909862684199660415367844093163037383430884471249571003319157989632 113
UVM_FATAL @ 20413052 ps: (otbn_env_cov.sv:2728) [uvm_test_top.env.cov] Unknown encoding () for instruction `wfi'
UVM_INFO @ 20413052 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_wfi_sec_wipe 31183966286144831778071561241390613491250719826376926805317197633900753905097 113
UVM_FATAL @ 20149590 ps: (otbn_env_cov.sv:2728) [uvm_test_top.env.cov] Unknown encoding () for instruction `wfi'
UVM_INFO @ 20149590 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_wfi_sec_wipe 74165621704774674669185608179093980969820103365849935004656789139356070556327 113
UVM_FATAL @ 7541322 ps: (otbn_env_cov.sv:2728) [uvm_test_top.env.cov] Unknown encoding () for instruction `wfi'
UVM_INFO @ 7541322 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_scoreboard.sv:440) [scoreboard] Check failed model_status == * (* [*] vs * [*]) Saw instruction when not in BUSY_EXECUTE operational state. 2 test runs
otbn_wfi_smoke 28450548020494592137996533746431704294408004775673991269913011260564746242894 115
UVM_INFO @ 6906231 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_wfi_back_to_back 77491042599519201513082464900209748638529405988711488727686578455187988327515 113
UVM_INFO @ 20107762 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_scoreboard.sv:551) scoreboard [scoreboard] We saw a STATUS change * cycles ago that implied we'd get a recov alert but it still hasn't arrived. 2 test runs
otbn_passthru_mem_tl_intg_err 82640047584066061478828878755851298428103484557657989518646193826849769632193 106
UVM_INFO @ 135784155 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_passthru_mem_tl_intg_err 74603657434000206961934901110813862911993524550996046843517591205242216705256 86
UVM_INFO @ 3945135 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_sva_*/otbn_idle_checker.sv,196): Assertion NotRunningWhenLocked_A has failed 1 test run
otbn_urnd_err 110762802505122231675968462744002208476646132385536724315964470718592944513646 109
UVM_ERROR @ 11959376 ps: (otbn_idle_checker.sv:196) [ASSERT FAILED] NotRunningWhenLocked_A
UVM_INFO @ 11959376 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_scoreboard.sv:551) scoreboard [scoreboard] We saw a STATUS change * cycles ago that implied we'd get a fatal alert but it still hasn't arrived. 1 test run
otbn_passthru_mem_tl_intg_err 31235460610902865011558708772914703862978832781604933045985688819501830419948 86
UVM_INFO @ 4727248 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1297) [otbn_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. 1 test run
otbn_stress_all_with_rand_reset 54155921125860141395907730317162572867046078088384431245203639495919213123627 159
UVM_INFO @ 4875412984 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otbn_scoreboard.sv:322) [scoreboard] Check failed item.d_data == exp_read_data.val (* [*] vs * [*]) value for register otbn_reg_block.status 1 test run
otbn_partial_wipe 9736555013201352462861727537280442017552156324514584704179152892459979790680 114
UVM_INFO @ 12584588 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_scoreboard.sv:256) scoreboard [scoreboard] alert fatal has unexpected timeout error 1 test run
otbn_escalate 76615125535766360321216989184184570418556470964406640545872993118799885557916 114
UVM_INFO @ 102391055 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---