Simulation Results: otp_ctrl

 
11/09/2026 15:01:27 DVSim: v1.49.0 sha: 55d8d87 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 85.02 %
  • code
  • 80.32 %
  • assert
  • 94.94 %
  • func
  • 79.81 %
  • line
  • 88.37 %
  • branch
  • 86.46 %
  • cond
  • 88.43 %
  • toggle
  • 86.23 %
  • FSM
  • 52.09 %
Validation stages
V1
100.00%
V2
56.44%
V2S
57.73%
V3
6.93%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
otp_ctrl_wake_up 2.590s 207.893us 1 1 100.00
smoke 10 10 100.00
otp_ctrl_smoke 28.760s 8160.180us 10 10 100.00
csr_hw_reset 1 1 100.00
otp_ctrl_csr_hw_reset 3.430s 158.555us 1 1 100.00
csr_rw 5 5 100.00
otp_ctrl_csr_rw 3.350s 601.702us 5 5 100.00
csr_bit_bash 1 1 100.00
otp_ctrl_csr_bit_bash 22.730s 9365.549us 1 1 100.00
csr_aliasing 1 1 100.00
otp_ctrl_csr_aliasing 2.760s 45.555us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
otp_ctrl_csr_mem_rw_with_rand_reset 5.250s 2027.262us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
otp_ctrl_csr_rw 3.350s 601.702us 5 5 100.00
otp_ctrl_csr_aliasing 2.760s 45.555us 1 1 100.00
mem_walk 1 1 100.00
otp_ctrl_mem_walk 2.400s 153.358us 1 1 100.00
mem_partial_access 1 1 100.00
otp_ctrl_mem_partial_access 2.870s 639.604us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
dai_access_partition_walk 0 1 0.00
otp_ctrl_partition_walk 132.750s 2792.540us 0 1 0.00
init_fail 182 300 60.67
otp_ctrl_init_fail 10.710s 2324.042us 182 300 60.67
partition_check 17 60 28.33
otp_ctrl_background_chks 32.690s 17095.748us 3 10 30.00
otp_ctrl_check_fail 31.000s 1653.254us 14 50 28.00
regwen_during_otp_init 21 30 70.00
otp_ctrl_regwen 19.070s 5147.919us 21 30 70.00
partition_lock 12 30 40.00
otp_ctrl_dai_lock 43.970s 4434.014us 12 30 40.00
interface_key_check 5 10 50.00
otp_ctrl_parallel_key_req 25.270s 594.096us 5 10 50.00
lc_interactions 122 210 58.10
otp_ctrl_parallel_lc_req 20.200s 6815.471us 6 10 60.00
otp_ctrl_parallel_lc_esc 31.480s 6683.224us 116 200 58.00
otp_dai_errors 4 25 16.00
otp_ctrl_dai_errs 55.890s 11158.475us 4 25 16.00
otp_macro_errors 2 10 20.00
otp_ctrl_macro_errs 29.670s 1399.602us 2 10 20.00
test_access 2 10 20.00
otp_ctrl_test_access 69.420s 22915.355us 2 10 20.00
stress_all 1 10 10.00
otp_ctrl_stress_all 129.340s 63542.574us 1 10 10.00
intr_test 10 10 100.00
otp_ctrl_intr_test 2.960s 595.369us 10 10 100.00
alert_test 10 10 100.00
otp_ctrl_alert_test 3.470s 107.164us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
otp_ctrl_tl_errors 8.580s 394.254us 25 25 100.00
tl_d_illegal_access 25 25 100.00
otp_ctrl_tl_errors 8.580s 394.254us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
otp_ctrl_csr_hw_reset 3.430s 158.555us 1 1 100.00
otp_ctrl_csr_rw 3.350s 601.702us 5 5 100.00
otp_ctrl_csr_aliasing 2.760s 45.555us 1 1 100.00
otp_ctrl_same_csr_outstanding 5.790s 713.157us 5 5 100.00
tl_d_partial_access 12 12 100.00
otp_ctrl_csr_hw_reset 3.430s 158.555us 1 1 100.00
otp_ctrl_csr_rw 3.350s 601.702us 5 5 100.00
otp_ctrl_csr_aliasing 2.760s 45.555us 1 1 100.00
otp_ctrl_same_csr_outstanding 5.790s 713.157us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 4 5 80.00
otp_ctrl_sec_cm 495.290s 72680.780us 4 5 80.00
tl_intg_err 24 30 80.00
otp_ctrl_sec_cm 495.290s 72680.780us 4 5 80.00
otp_ctrl_tl_intg_err 38.500s 1924.816us 20 25 80.00
prim_count_check 4 5 80.00
otp_ctrl_sec_cm 495.290s 72680.780us 4 5 80.00
prim_fsm_check 4 5 80.00
otp_ctrl_sec_cm 495.290s 72680.780us 4 5 80.00
sec_cm_bus_integrity 20 25 80.00
otp_ctrl_tl_intg_err 38.500s 1924.816us 20 25 80.00
sec_cm_secret_mem_scramble 10 10 100.00
otp_ctrl_smoke 28.760s 8160.180us 10 10 100.00
sec_cm_part_mem_digest 10 10 100.00
otp_ctrl_smoke 28.760s 8160.180us 10 10 100.00
sec_cm_dai_fsm_sparse 4 5 80.00
otp_ctrl_sec_cm 495.290s 72680.780us 4 5 80.00
sec_cm_kdi_fsm_sparse 4 5 80.00
otp_ctrl_sec_cm 495.290s 72680.780us 4 5 80.00
sec_cm_lci_fsm_sparse 4 5 80.00
otp_ctrl_sec_cm 495.290s 72680.780us 4 5 80.00
sec_cm_part_fsm_sparse 4 5 80.00
otp_ctrl_sec_cm 495.290s 72680.780us 4 5 80.00
sec_cm_scrmbl_fsm_sparse 4 5 80.00
otp_ctrl_sec_cm 495.290s 72680.780us 4 5 80.00
sec_cm_timer_fsm_sparse 4 5 80.00
otp_ctrl_sec_cm 495.290s 72680.780us 4 5 80.00
sec_cm_dai_ctr_redun 4 5 80.00
otp_ctrl_sec_cm 495.290s 72680.780us 4 5 80.00
sec_cm_kdi_seed_ctr_redun 4 5 80.00
otp_ctrl_sec_cm 495.290s 72680.780us 4 5 80.00
sec_cm_kdi_entropy_ctr_redun 4 5 80.00
otp_ctrl_sec_cm 495.290s 72680.780us 4 5 80.00
sec_cm_lci_ctr_redun 4 5 80.00
otp_ctrl_sec_cm 495.290s 72680.780us 4 5 80.00
sec_cm_part_ctr_redun 4 5 80.00
otp_ctrl_sec_cm 495.290s 72680.780us 4 5 80.00
sec_cm_scrmbl_ctr_redun 4 5 80.00
otp_ctrl_sec_cm 495.290s 72680.780us 4 5 80.00
sec_cm_timer_integ_ctr_redun 4 5 80.00
otp_ctrl_sec_cm 495.290s 72680.780us 4 5 80.00
sec_cm_timer_cnsty_ctr_redun 4 5 80.00
otp_ctrl_sec_cm 495.290s 72680.780us 4 5 80.00
sec_cm_timer_lfsr_redun 4 5 80.00
otp_ctrl_sec_cm 495.290s 72680.780us 4 5 80.00
sec_cm_dai_fsm_local_esc 120 205 58.54
otp_ctrl_parallel_lc_esc 31.480s 6683.224us 116 200 58.00
otp_ctrl_sec_cm 495.290s 72680.780us 4 5 80.00
sec_cm_lci_fsm_local_esc 116 200 58.00
otp_ctrl_parallel_lc_esc 31.480s 6683.224us 116 200 58.00
sec_cm_kdi_fsm_local_esc 116 200 58.00
otp_ctrl_parallel_lc_esc 31.480s 6683.224us 116 200 58.00
sec_cm_part_fsm_local_esc 118 210 56.19
otp_ctrl_parallel_lc_esc 31.480s 6683.224us 116 200 58.00
otp_ctrl_macro_errs 29.670s 1399.602us 2 10 20.00
sec_cm_scrmbl_fsm_local_esc 116 200 58.00
otp_ctrl_parallel_lc_esc 31.480s 6683.224us 116 200 58.00
sec_cm_timer_fsm_local_esc 120 205 58.54
otp_ctrl_parallel_lc_esc 31.480s 6683.224us 116 200 58.00
otp_ctrl_sec_cm 495.290s 72680.780us 4 5 80.00
sec_cm_dai_fsm_global_esc 120 205 58.54
otp_ctrl_parallel_lc_esc 31.480s 6683.224us 116 200 58.00
otp_ctrl_sec_cm 495.290s 72680.780us 4 5 80.00
sec_cm_lci_fsm_global_esc 116 200 58.00
otp_ctrl_parallel_lc_esc 31.480s 6683.224us 116 200 58.00
sec_cm_kdi_fsm_global_esc 116 200 58.00
otp_ctrl_parallel_lc_esc 31.480s 6683.224us 116 200 58.00
sec_cm_part_fsm_global_esc 118 210 56.19
otp_ctrl_parallel_lc_esc 31.480s 6683.224us 116 200 58.00
otp_ctrl_macro_errs 29.670s 1399.602us 2 10 20.00
sec_cm_scrmbl_fsm_global_esc 116 200 58.00
otp_ctrl_parallel_lc_esc 31.480s 6683.224us 116 200 58.00
sec_cm_timer_fsm_global_esc 120 205 58.54
otp_ctrl_parallel_lc_esc 31.480s 6683.224us 116 200 58.00
otp_ctrl_sec_cm 495.290s 72680.780us 4 5 80.00
sec_cm_part_data_reg_integrity 182 300 60.67
otp_ctrl_init_fail 10.710s 2324.042us 182 300 60.67
sec_cm_part_data_reg_bkgn_chk 14 50 28.00
otp_ctrl_check_fail 31.000s 1653.254us 14 50 28.00
sec_cm_part_mem_regren 12 30 40.00
otp_ctrl_dai_lock 43.970s 4434.014us 12 30 40.00
sec_cm_part_mem_sw_unreadable 12 30 40.00
otp_ctrl_dai_lock 43.970s 4434.014us 12 30 40.00
sec_cm_part_mem_sw_unwritable 12 30 40.00
otp_ctrl_dai_lock 43.970s 4434.014us 12 30 40.00
sec_cm_lc_part_mem_sw_noaccess 12 30 40.00
otp_ctrl_dai_lock 43.970s 4434.014us 12 30 40.00
sec_cm_access_ctrl_mubi 12 30 40.00
otp_ctrl_dai_lock 43.970s 4434.014us 12 30 40.00
sec_cm_token_valid_ctrl_mubi 10 10 100.00
otp_ctrl_smoke 28.760s 8160.180us 10 10 100.00
sec_cm_lc_ctrl_intersig_mubi 12 30 40.00
otp_ctrl_dai_lock 43.970s 4434.014us 12 30 40.00
sec_cm_test_bus_lc_gated 10 10 100.00
otp_ctrl_smoke 28.760s 8160.180us 10 10 100.00
sec_cm_test_tl_lc_gate_fsm_sparse 4 5 80.00
otp_ctrl_sec_cm 495.290s 72680.780us 4 5 80.00
sec_cm_direct_access_config_regwen 21 30 70.00
otp_ctrl_regwen 19.070s 5147.919us 21 30 70.00
sec_cm_check_trigger_config_regwen 10 10 100.00
otp_ctrl_smoke 28.760s 8160.180us 10 10 100.00
sec_cm_check_config_regwen 10 10 100.00
otp_ctrl_smoke 28.760s 8160.180us 10 10 100.00
sec_cm_macro_mem_integrity 2 10 20.00
otp_ctrl_macro_errs 29.670s 1399.602us 2 10 20.00
Testpoint Test Max Runtime Sim Time Pass Total %
otp_ctrl_low_freq_read 0 1 0.00
otp_ctrl_low_freq_read 92.910s 69358.184us 0 1 0.00
stress_all_with_rand_reset 7 100 7.00
otp_ctrl_stress_all_with_rand_reset 139.180s 22174.194us 7 100 7.00

Error Messages

   Test seed line log context
UVM_ERROR (csr_utils_pkg.sv:461) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: * 100 test runs
otp_ctrl_partition_walk 91424389934685128391201647015874112255706424197938478258850117264962505262011 160061
UVM_INFO @ 2792539697 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 11110278706598768331956607722981228417557878968307032542682961684919608936807 837
UVM_INFO @ 48629479 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 67750469280205246390939186576110688523434082892157498961866900309426408896779 1800
UVM_INFO @ 121127343 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 41098787492083872690635666547898361309468209907620114941257769028015704639720 391
UVM_INFO @ 87071822 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 94417178392948939532564363907414072659235183573509982489340495977582704276706 1818
UVM_INFO @ 68092895 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 30739836397418473833755358837689309036401142926673567390927291181159794761496 147
UVM_INFO @ 37539705 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 82116807050950966850190586270487439906234699937023055555295298121015969780882 646
UVM_INFO @ 39567993 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 79921263394267684793835204660603570599371322851915372470286610995326846305585 10220
UVM_INFO @ 410408420 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 85459088740044457786281076375446010855073268022355197929531447503405768579191 4362
UVM_INFO @ 1925480373 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 27359999941929728809632163189027034208798461069397422480098700518092349836808 4510
UVM_INFO @ 463496956 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 34495928865364414407237892707697147294168861668756397557647997780100690868435 654
UVM_INFO @ 192695421 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 110791846734084279895484985954467711952477672443690472655654705068398673590916 2003
UVM_INFO @ 305285223 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 108437513790377013837637901758791662064148175792104652954676095320121056366116 912
UVM_INFO @ 777778270 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 15741723386709760539250727813138917001718948850073393088610756596368941698074 757
UVM_INFO @ 191232769 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 93504790480753613256645667896561622940299044338733262509837034455447206051307 1101
UVM_INFO @ 61780621 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 104656809525017041568366107269322458472664612371403339128081115072679521608700 563
UVM_INFO @ 80658369 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 67303876872449153437245655015431316596541357622136519636856529429610913394740 723
UVM_INFO @ 42629121 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 112008452327402900164635298836478389384480143786748233967158667891043119777105 5832
UVM_INFO @ 485900527 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 38704264739874798738716944952251024680082838550144292755116536602728902560140 1121
UVM_INFO @ 64495866 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 40445938694299850496367006857644714735875030024652805780161302213442710520895 783
UVM_INFO @ 700891374 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 104690524338844132691923330007716829873466692578147017034933032031536790889777 189
UVM_INFO @ 46533432 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 92073558148873933655506966220799354301075512317784613413374347257362564936808 205
UVM_INFO @ 31979221 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 66570961475065755556540664885417991699474467124831860902542232562288532148120 227
UVM_INFO @ 72630986 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 115105283727078538123520129460523991641431860041410693634122067118271633214626 1051
UVM_INFO @ 163705167 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 75350375331587113018214826762002014506987919239001486985896555170535454464403 441
UVM_INFO @ 611384593 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 94944673260253485201213313759220193808599724081343453498927218400053036415602 1719
UVM_INFO @ 166015037 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 102015062671633625600321022183303294121196972213767026480396946665653335067022 677
UVM_INFO @ 49346953 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 43721903142235764563896431940343118393204229485699649309383762048491330722665 1615
UVM_INFO @ 944449978 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 115292151563091700889857229548568216557849081983305266540451673674619632185343 231
UVM_INFO @ 111499170 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 56151104882883379916817802626790330771230624994555157386913699419507833949299 923
UVM_INFO @ 305005991 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 101783738099134632043967193483743129073149211286131913322287244621959809076739 909
UVM_INFO @ 113571528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 69203104685408139774057697872474548558781514771529033586522368327818211358553 329
UVM_INFO @ 54808117 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 17324259656842720468343788391233830285774140456771676144507434728042407412353 313
UVM_INFO @ 149309208 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 88617894141866913102772480089388848011829320067469755943554140939864646067104 621
UVM_INFO @ 114782248 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 80295601017076403629616848194195058146259498518180934779445148139019973450235 271
UVM_INFO @ 545818195 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 108182832680163485574700189863741778825991083461031214020761272064491374531724 1383
UVM_INFO @ 75187339 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 39112654363092288773697837404324863312323254198119480113915558823673580139658 1679
UVM_INFO @ 950682316 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 89068567224244632657584961522124906303365870667582990528464779871114888638032 1165
UVM_INFO @ 228248963 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 17670098329518319528819581067725960778401662372637290391286752033274143422166 667
UVM_INFO @ 57537986 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 17613533097356602104053695310376428951924790584829758857031089449596726946348 1091
UVM_INFO @ 150960034 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 38725747398442444452184730420425903291811580205298573089411962027709901491062 925
UVM_INFO @ 50028214 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 86584349314073076613824121781676053855079666317458735814286155977511826969624 327
UVM_INFO @ 39942376 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 69960444698927773665464549708535119585080784299603641469178887824271518870175 147
UVM_INFO @ 116208864 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 94404427551657335742200457970498289310911128468624051715321614448252075663048 1163
UVM_INFO @ 50517678 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 97805431654102643205228493920029340387508401694903259467388593754688808524178 205
UVM_INFO @ 51492512 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 55265137614505609253272094179954099725846486339237117087340084583216107299509 105
UVM_INFO @ 38479082 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 74130276505142392872380947958359148867841104042334252063062567735252927308171 189
UVM_INFO @ 67024898 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 72264775499021673297538135215981013527810912857938575551727180083127021204500 1125
UVM_INFO @ 52540869 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 101366362770509607016166741503941785549268964390242040400241521250010659212815 1069
UVM_INFO @ 53344248 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 109221076615165644585413221291795938813909197585876596450083206491824941135901 273
UVM_INFO @ 80619825 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 38695453122282508508667145221522545186552773206169637526775111840942420594653 189
UVM_INFO @ 524268504 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 32255398199446877279917321833803809848265274653634721604972335924233960541342 329
UVM_INFO @ 144382669 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 54921269527842965141547712947759650994663237603950050430454616028122421476979 1789
UVM_INFO @ 249719186 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 47802220117033634979969060878678561943487042017864227659115140590371709025600 825
UVM_INFO @ 86684472 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 24288606317521346605171633690420878637277147870146390409718844696181452504988 667
UVM_INFO @ 52602036 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 35678224985748082702181892841089760172332494984572338521406646380663093207406 641
UVM_INFO @ 657084391 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 45007839245779365338263043078295739213364664156178084733391103856960054506500 247
UVM_INFO @ 70726132 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 115317566828162188209653495222163502043156222403807947137993408132422283492131 1233
UVM_INFO @ 226758453 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 77164990262973308078733885434838051101391905973879796228076741096836255810820 105
UVM_INFO @ 67202319 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 22049941538930828898192411452658516397503312448087706343338844700224605686149 2363
UVM_INFO @ 265429503 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 13866253584695535877889587881287529927184618905946184928926514226370427714820 313
UVM_INFO @ 573862217 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 42269439005407399532659937491167647811792897142149784464746271050248835107311 329
UVM_INFO @ 67199525 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 107975192959085990457962377746298839563528352227819932729223175578034929953415 1103
UVM_INFO @ 234762704 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 93925245262389883142562303325668474762467715772681070925836742565188456532106 273
UVM_INFO @ 35477542 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 16598061964187326089602999191846162195653898228537342119970332506999136765944 1887
UVM_INFO @ 81229585 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 8126407321524802471762647101335559129066184598492128121822795724058506451074 2435
UVM_INFO @ 73213120 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 6045838250813334381383449812704273047123654177886752682352897679545903379961 721
UVM_INFO @ 66627404 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 27542759591092859077142531776431315774838664169965673732662075945627381025243 1353
UVM_INFO @ 51923319 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 98992585118488974426252238130852762046281211115169682890003453047950063178746 1611
UVM_INFO @ 899337633 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 85171203855463196311914828116866232352527047698630857722303792617169247058430 1535
UVM_INFO @ 55351291 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 76597912565540162142446025584151681531394813056355193888421481664872103327705 1905
UVM_INFO @ 72306671 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 40890616476265893792621090705368227649670843705702429877351830456405291733068 1001
UVM_INFO @ 76805230 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 20983559030537887664307832362585465120964801198413757018060193796518327757007 965
UVM_INFO @ 66222763 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 99059581749907122279436179721082686828842982544413748681676012541002059512307 411
UVM_INFO @ 101743877 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 31614559387239338366936031129816564988118802016737592839787404488080547110627 289
UVM_INFO @ 567324109 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 109540063847760633068185247706148164993333160909790895596045433393410443792172 1481
UVM_INFO @ 106383595 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 70553665109785243313165102366442004627182056713138299561162799142734484523350 355
UVM_INFO @ 47425937 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 3873414840268646581553976714787455591536377028839610091632876003374993620576 993
UVM_INFO @ 126468493 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 9792184348278910260338130167168048748412028161908387918893984031016335347469 513
UVM_INFO @ 79051844 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 64999034903532627446485967976876452846808039887388841107976474867470516183761 1513
UVM_INFO @ 102132190 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 47582415058668667648347081157789531280123469741554059095039555874545085354700 1583
UVM_INFO @ 225836589 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 14713438801148821513776093788415342676840905374143053405477951956059831821039 2557
UVM_INFO @ 150653352 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 76314653478937182651206581220468361229578333006054143831608610714296466457264 847
UVM_INFO @ 241883495 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 100354804496717010562700447975765472059000578341776583665908651102755301478665 347
UVM_INFO @ 42195053 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 106523195868260609201842276148454450340449450241029994624693846871834503695025 1601
UVM_INFO @ 267989467 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 28369016912373274876975782715567211506234542438514861092813377613963897752136 513
UVM_INFO @ 625658763 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 1158811101928089466648875204067413970872089692410752870133457180606327582405 793
UVM_INFO @ 701324847 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 42562174567530229541328697782623118859702455290486875837121982862268127395278 145
UVM_INFO @ 47517386 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 74825678578175856839023338374034886959078115121883268641542943780484543322559 1199
UVM_INFO @ 53434668 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 21030617581061799763408438311196992610662925119950347162900773819506706973625 489
UVM_INFO @ 243026087 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 109869377609240692252341950711082051322120297010840154185483222104241829938822 539
UVM_INFO @ 169411316 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 52303958860181672906654021747404962022425957416927046257949019153465766686922 2313
UVM_INFO @ 108021643 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 7372624562209532798501196689223124386518986822135348197628823028649041543430 345
UVM_INFO @ 49483559 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 71486574699098791136087398750028994156403339581455970202942983311528622811330 105
UVM_INFO @ 689384038 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 6912989001313650202627556499541939764073380227576693379554289998965641958494 1621
UVM_INFO @ 144018540 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 64255814900973996450765058599417581734010644222943426554429085474774361091374 1287
UVM_INFO @ 162063672 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 5550228477076850520316704119839488595834699724577441437078317849035811570686 1077
UVM_INFO @ 892513709 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 28072669991647207967615331035093818584641171771290220050270002537317669761912 1567
UVM_INFO @ 905022608 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 42524581558115347952487823301971168500561540279617050163285508136708503050380 271
UVM_INFO @ 70254867 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 26992362929913642657305896866866476636957491434048497882339969924339785782461 613
UVM_INFO @ 86418586 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1323) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.err_code_* 70 test runs
otp_ctrl_background_chks 25794419177795366399575709606826617960072422625489669003735855816145880544497 1246
UVM_INFO @ 200205035 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 64387811862987375266557136508720078699917812469550797507039247618973999032513 284
UVM_INFO @ 53678545 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 20832374550790884651522385275312665055352947456366690448083769322270002174874 2966
UVM_INFO @ 164125352 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 1931981055287629397218340350878441580738353884673996426184149820607114485641 4748
UVM_INFO @ 241977604 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 95316383497150714012758061896960952489127284938259248293814940236308036448674 2494
UVM_INFO @ 97102561 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 50411925969902811975059740981886775691105396142089237095270048091428991427643 2465
UVM_INFO @ 968391207 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 65538166894280959699035181202327877087567517773870571159359780552914427898988 2898
UVM_INFO @ 97771756 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 61960561778074300324535011048118835881886080328941885731266350517420553527782 7365
UVM_INFO @ 2628639579 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 25676258488469527468900785657942969312319455325085837843840834349396866508519 3255
UVM_INFO @ 184490662 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 57800388448966627374602455978116464443198987954805196037877079667271550249764 8021
UVM_INFO @ 344017424 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 9374106717564714880573944898568988354726785685400715297748863476040203721814 2344
UVM_INFO @ 3014807854 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 111235911490609603390492998395277023364031597807409355811570656604614728005144 1214
UVM_INFO @ 108126258 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 107255936113058616627467801337906713425746282703165803390809243236680312106125 2062
UVM_INFO @ 96000070 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 60842709740709634730057352495881191402921724052326453869840725688072394675640 12806
UVM_INFO @ 3285983122 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 47699594196058821432370112253351648379363553306685973818558264957742093331675 22228
UVM_INFO @ 8361577118 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 112553707100408739445859262778978243732645306725167497144559927943130262084500 3082
UVM_INFO @ 932829102 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 82618507070871660042605655819626478951495177820359709985812237736281199156415 1688
UVM_INFO @ 2298329323 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 111853084706784940122766340563619016000988749200287911548826561088008796661757 7393
UVM_INFO @ 9793900543 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 82916963778457980581232660718808589551276878252028790969772300095826371075606 7215
UVM_INFO @ 398958488 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 106513177759121826032204073193889678142678188761561039294349482985764203961998 17590
UVM_INFO @ 22915354604 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 65054804322180201154201185880177021619724384596575361276531365529108863512206 2057
UVM_INFO @ 101024089 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 108961698960678096002979607990825447203819948305837220214983967337237304420496 3785
UVM_INFO @ 471433913 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 77507800096823097352302580063875349951637563749246582962941928492881738975745 10172
UVM_INFO @ 1230880501 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 228334976464576046441508381212205958723113241300007778691879459024674617237 3550
UVM_INFO @ 553609092 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 31443434038708819091715367923611119057325138468252097792317406598641202163141 6655
UVM_INFO @ 224659701 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 108196376896705737082934044060367234752187074555323299006617073026746569056365 7435
UVM_INFO @ 453109059 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 43977008256593959505244753341137014327358448323034494213757247896478459638883 1596
UVM_INFO @ 2078066886 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 82290495230397291057842249548829822410379951609802792429403021878817995808927 2632
UVM_INFO @ 1234323623 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 37383832786495236288514580006122987224594973951424435993481900607170514746714 716
UVM_INFO @ 109761296 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 20926549639731957365986969794509818812312820205259628775774234322848085906823 1540
UVM_INFO @ 140932791 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 8741381575590320095083852922666497494212310972265073466091370346973138816729 4866
UVM_INFO @ 861157894 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 23540965381960200466473186862607933029038167039087429086125804232963821776851 1510
UVM_INFO @ 258774409 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 102056544122148887440096101075599195578310743227003300948653288098808654548098 9159
UVM_INFO @ 202883633 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 6944338692385191727678829683257236120110008773413604798417755061467830293514 5927
UVM_INFO @ 818475839 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 22932231270520170611567352973429348713637825109974898641892630505507456851470 822
UVM_INFO @ 43330095 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 55418833172600616218528305311352932093771314151201708264448360118371516150261 2865
UVM_INFO @ 4304729989 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 63555104256166292295241187542414338410447398564726425922590415776076423238799 838
UVM_INFO @ 127170111 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 29886122845102719041003730960179337797380412939684353672766854049128407545985 2884
UVM_INFO @ 4035932264 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 49315441368345740687300111339098505177967873992305023809227925819128285032164 1314
UVM_INFO @ 2040660168 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 13506315915405365365239903381809728212227609158879549233593985147622601656542 2390
UVM_INFO @ 66513689 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 87768167516355994802994270157288201589030888423262672879034722788617342984399 1862
UVM_INFO @ 133011410 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 37495617817525348436362808007546933123922559010670278764882336948904408398650 6416
UVM_INFO @ 447853820 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 78792412186650353851097478739636676307061654186725960685834742565089190996173 16800
UVM_INFO @ 12434861620 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 72758954336576723079618489958022058774307942950410961885985840753287032263558 6113
UVM_INFO @ 836938029 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 44878187009197639428476895242852369551028696820737951755802668413993926220929 2925
UVM_INFO @ 314450687 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 22805158205746824372842339454442900159938995503907183034325622086374401668128 3268
UVM_INFO @ 107135924 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 32396905222076278041982415968984375615799271391305661544571371514891687925934 4319
UVM_INFO @ 516598830 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 87027621218983048399022665729342124898774702580855040559659134587474890607649 5332
UVM_INFO @ 212415385 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 35672956225614764637326427304544610445542650260410129744706266830424015968511 2936
UVM_INFO @ 6337422029 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 17226140438369843769627101595386850005418998845227832885037187171293973895431 2456
UVM_INFO @ 255866212 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 75113325902003402652498739353970948989268125916810890991580004036491859495446 16885
UVM_INFO @ 12175345088 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 110701872612348534718927243492690948563135084293201281454060307866674787527856 1445
UVM_INFO @ 1537009160 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 97798808531692036733530561650444800358625751681657959359378892477950573787824 2029
UVM_INFO @ 999610262 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 113299949217044438049195629101442725690830831873751027438071230387862028793127 826
UVM_INFO @ 82480532 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 94350376698638617547230347665847836989845111359046067966563817719610302827930 8027
UVM_INFO @ 303198873 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 112316054909601999544094621625962539869231391260651008136716106713410356427119 3834
UVM_INFO @ 154578845 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 114556745885714814823152699257827254737669139582114348841696198737627041426432 26815
UVM_INFO @ 2446080627 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 103757245819893253544600392385066817500303746336818230409380286090266753373570 492
UVM_INFO @ 76771829 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 18263974914521717634391647276081596617324304255143204517535447614022200651811 4733
UVM_INFO @ 2033313211 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 108345770762839936307762413585871580776279395303562208658526458821297572157622 1640
UVM_INFO @ 163828360 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 59611185739314833841877859070578418213099660955024177744293930872654659614926 1669
UVM_INFO @ 338181902 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 71372324028637970466859968803238793282318583142311919780671690177964151246552 698
UVM_INFO @ 253004320 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 7836658054993987564503575315414809409699757353402500639503404268240547222808 11227
UVM_INFO @ 4319385195 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 29428899015507248577310654543220528045216024553954047046128857134836817288929 420
UVM_INFO @ 149461760 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 108611847173604417477581740858650417010237816096366162130355337099472754662968 166
UVM_INFO @ 587531099 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 87493614461349518670637983445334837458450030108740044144135959283446870325246 750
UVM_INFO @ 93391918 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 95935619821914861853763768123291743088486550117487395571344976236111665557730 1512
UVM_INFO @ 53928877 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 27596604333237375619663647452040309272800229508742679698931059798449245949517 1608
UVM_INFO @ 561551329 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 75008028396893729956774904803204256310167552584469459078141181284287851156282 656
UVM_INFO @ 81856379 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 60864004641595940922755820263902018853902468467600667381390333732346788033795 1508
UVM_INFO @ 51609760 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_scoreboard.sv:419) scoreboard [scoreboard] Waited * cycles but did not see alert fatal_check_error. (Max wait calculated ALERT_B2B_DELAY + max_delay + * = * + * + *) 70 test runs
otp_ctrl_dai_errs 76476019715107669334249400349018858648755645200324018337912520341732617770870 5484
UVM_INFO @ 2292408554 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 28348259194908901086925339418200760488585381739470585849960455996472882924376 11427
UVM_INFO @ 746639014 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 25024708977763574894831003060685758121435536413466948055263998396264234020926 7706
UVM_INFO @ 553571635 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 63850654599581318961176856784692294152001694466846106242944042709728919771420 1926
UVM_INFO @ 361133163 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 14610303067964781184828526440324214829520819715951655277876496194258777578316 954
UVM_INFO @ 717845610 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 113158431944830079748425971155764561354771905672460165382633688861411299676521 24091
UVM_INFO @ 3186098677 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 80123176929684619347500923848947880594637214861156408515039521936948343573902 3758
UVM_INFO @ 559495664 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 55126115481349726974799689445490704102871878374445225365354337767301064440788 43296
UVM_INFO @ 1142710313 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 41998936410976403707235659569834623798126939079755174272459350748531032405017 3610
UVM_INFO @ 677152999 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 2868334064373679760863636238337383561603086811538619206287461578379056545284 4326
UVM_INFO @ 850176813 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 77264245924391109822871237917483128934480174075707333341344170690285731939269 18507
UVM_INFO @ 2617467995 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 7588701503885373062919939147898852518169020665369475354217542720853162846927 8743
UVM_INFO @ 1211044004 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 14070976012151804415565217395771860466590384946884746902475871167991818879343 16632
UVM_INFO @ 641852189 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 16440239928373004683781783147302210295657400175328607761125119170849943857043 12920
UVM_INFO @ 3524357553 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 18383038121817301859194985301503040670851925231330653252509131722611335111409 2972
UVM_INFO @ 4204425709 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 49105399007558677975783125756652814075198088861154974742421957200512575614548 12757
UVM_INFO @ 807480124 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 54353668948604805705206562678180779556823406251138925393408072966927783664060 17801
UVM_INFO @ 2567487248 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 89290216167064923644245142213762853133012202479741287008740070002719904755644 1892
UVM_INFO @ 156832453 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 29651746216455419410131999208609646941418362917831354640866715311078667138595 3999
UVM_INFO @ 601522654 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 76013698711825599152650406766811797693173925102048744437379605921241148209341 6668
UVM_INFO @ 544984860 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 92531853008043009938331676929302002735602297396240977083790795722160417213482 718
UVM_INFO @ 88563590 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 90783532316501466885543917550019975018526012547604043209250615944806378959186 20116
UVM_INFO @ 1064728479 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 16986189137663433498264255179763883745377719453126872819419211136977397660826 2888
UVM_INFO @ 455291857 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 82298814412021036842776955781462769804061906926985518620109411555455723361509 4637
UVM_INFO @ 5875743537 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 75790246228577823506572637319183800522071798748399142353328322310811384714420 22364
UVM_INFO @ 1313905769 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 72108152701331147980738668294813295736421508105720218382467850207327012845128 4336
UVM_INFO @ 1328955381 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 74271819211671458922840753870050961475118180984868926661224968223894440113581 6848
UVM_INFO @ 7097901654 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 77240652680980083358573820967074659618443785533830045830060874556867777136062 6220
UVM_INFO @ 7127283751 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 38548017606320635599612907084852321462919155818420778568420923702666357391431 2527
UVM_INFO @ 196250040 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 80881800149000550924756133829973108429972712879273011305663585490223545272490 2705
UVM_INFO @ 229762223 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 74053701684410822607685241317232755958531957339617635841922961308560920270918 2711
UVM_INFO @ 477673098 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 3734933708636930977137428052100658255594209766982449905989170121330471927835 1015
UVM_INFO @ 237610099 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 23263662070749916533203264716419534387704432180365713019729555906627572661227 8554
UVM_INFO @ 1451995853 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 99132275939800033585366060942882115852009278384620898800701853699477176255785 4668
UVM_INFO @ 719451041 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 109219230069657158163448768321242291153980090883484917956814429920900607026004 15770
UVM_INFO @ 282681678 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 32590733000068297288564943346027806487940685295113640540644361770355602381541 10723
UVM_INFO @ 1523324628 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 67365803988709424220995393098239044887859308578668231178847181017181424435717 9156
UVM_INFO @ 236765005 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 54460492768253372705508240686513209286655673283965723045245119106170461664713 8336
UVM_INFO @ 729127250 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 17935994040780611366639801218119597386403031865032049154524531736652372262904 1524
UVM_INFO @ 131280119 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 89297904292354394944956810444677452197999343541303817521984065645920281289984 368
UVM_INFO @ 738439191 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 100190022397149888113769910499972784764781567413896652146359704746226620064485 3648
UVM_INFO @ 307015338 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 48482734474048420611158864526200413742063937701525795088480390695467974005628 4263
UVM_INFO @ 5392717916 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 10344578278505438541694221134382935721240346788961838812896147591310528008270 2390
UVM_INFO @ 1095444311 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 108416892199050191089937782307149014342383349040589397682310798392344645086659 10874
UVM_INFO @ 818503092 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 81363731217750327771580703090556573330535720016644230286203351820087003881683 2244
UVM_INFO @ 67413926 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 68227528523648179235269214334542494074966362301884143232529416454751862108127 1369
UVM_INFO @ 486985932 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 113090306417956091679953433212761477181312910835255708460446254811988475357164 8065
UVM_INFO @ 178220385 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 1599246447222567950285745524097173743435455392332234959682097980258828658110 19984
UVM_INFO @ 1339983394 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 55023513436279069936891418425416183154677388592246160030255102032542060089325 12399
UVM_INFO @ 1613901555 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 28760071661894286937532217853091439743094186657474641774563965938862790087849 2192
UVM_INFO @ 827137363 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 30921153078235725287307278003801767232028535376437591062341175420471527761108 6594
UVM_INFO @ 1745397671 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 71770378448680260368110025832312717576478638914248011101946402088005748989353 10131
UVM_INFO @ 1387077677 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 77988475878490646060962765370286089300521142917539279469718612117922526016339 5381
UVM_INFO @ 1934693569 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 28147619564791425854685053446914271920090567452709903592798278098005648083931 11330
UVM_INFO @ 1162537071 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 115211749929778910017938458061264336572370322767225086842047292994418707942536 3101
UVM_INFO @ 967163526 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 21311941482318745286953557443131592416733920470293887101385300713186226779136 3401
UVM_INFO @ 494567602 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 113769743218678971420982360697523103678138422034829943250554044387485700436408 19709
UVM_INFO @ 3406336409 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 76924121754647836957080778447583535262118555793810088254006038248216121362182 2321
UVM_INFO @ 817806129 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 104634502618240586130135886179030176725749854398556423471981482575789573648637 2854
UVM_INFO @ 226060074 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 43561548035802221297440708151033709867092177661133276716112312585583459234665 3514
UVM_INFO @ 107997618 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 69939059197450116981971691252149292472945374149225926683284794288681800930098 3540
UVM_INFO @ 566801197 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 37262492578172231162332894987488363337721334013871837174777998966930646457227 2133
UVM_INFO @ 151584181 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 13659415299080453083091585536759370762939992931905437127010928209808408286858 12830
UVM_INFO @ 326703277 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 110042008037368194660893394150970179797354682912116601194143389845776460586143 6413
UVM_INFO @ 143827137 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 114087225893875658703960421450026750695516677450709630349056404038801242558610 3123
UVM_INFO @ 518741518 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 19862803120752192735349889133108734394915984629597350691085934296203639927844 5451
UVM_INFO @ 341934008 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 54163346545730029197174442902662898088412992107575967033857846632740186164810 1511
UVM_INFO @ 989415377 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 73455427933868380210402375002940541654322955179823129343728767001015866056199 21635
UVM_INFO @ 5190557335 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 86389897157995080380597177160031580707403200718166901746897528768492852145858 975
UVM_INFO @ 227795656 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 17420943879335570195513665905861163839802660239822745194191289937840120572947 9495
UVM_INFO @ 777530874 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1323) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.intr_state 33 test runs
otp_ctrl_parallel_lc_req 100358813988310784096608656735208681311949841194313430125469986187542372281835 10362
UVM_INFO @ 520475770 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 74964298764428544096047295382931172875872439576016315704351692168853866853831 8277
UVM_INFO @ 11214219699 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 9989386194778427795709146171737020373614218759638203435186578284950844814090 4450
UVM_INFO @ 2555041870 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 63868744210527137336078953591814095521906580551923482659956690760300186382431 2185
UVM_INFO @ 346994702 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 91512516237774350654965930544709918073088231376871883445641318538327301452478 10765
UVM_INFO @ 4023104472 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 89686733491199622117234954300807368849897730570205416381253373975819303831425 2948
UVM_INFO @ 763867721 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 13921000448837011182750694683128120694853702677599107341475964135694023372294 10972
UVM_INFO @ 12817339333 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 25687573685959369944150577183749875315988448693122791082723461053146607830865 12226
UVM_INFO @ 4607269760 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 111140792389818260066166624935282750360906239744228236969099499150617954371209 5616
UVM_INFO @ 286098596 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 78355154010567156509054099779824969922116775188369393325447571042198895542225 6273
UVM_INFO @ 832385907 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 88522833344832419164472197708986595569209434970551077559234322210590773788982 4628
UVM_INFO @ 5502766538 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 46751058491249648222947485619157115763486749447604102814559975991617508232450 12662
UVM_INFO @ 1575425758 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 59271879128814519962542813567761247251715597415165721507924673744784153114393 228
UVM_INFO @ 92952933 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 69093905685380286419526300254430102725131760875399032661015534467298482593129 4580
UVM_INFO @ 1324169541 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 21835745443004027237079944081526988313174217812570225284885083535658035684658 2462
UVM_INFO @ 1339013171 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 17859677550657448700550768927355614935060738859895496362997311800497499603964 3308
UVM_INFO @ 715426491 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 5469701735612806722811103854954542016017377320833148313339626582660442946670 8530
UVM_INFO @ 1037714053 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 1509605681067930060734378532415940000592199819832076759212845237020469184260 18966
UVM_INFO @ 47190406585 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 7728116326335992599949771033916195387861889165497010376349984780380600015060 2858
UVM_INFO @ 2007049283 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 20182124578071567454215503274248505357315787435162673347337616089989936750416 1406
UVM_INFO @ 29603721154 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 80376534615830735222635622130097509468471835541451811080533984889317242825271 10414
UVM_INFO @ 617454687 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 59613602711750191488707914528610082368407947748527019053679491541432851261046 478
UVM_INFO @ 108045319 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 88624640114574730068047907173518064420387764766339936215101501313647804191754 174
UVM_INFO @ 731645611 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 68520319565105902483544037549161787480328114854660445626968828129610222080629 5777
UVM_INFO @ 1878618584 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 113742540882290260147928030903278028306407282439349169804349500901658763273656 5528
UVM_INFO @ 1716619976 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 75552553090504968724693375577500131158550091518967646002123810356256154148597 3212
UVM_INFO @ 29155180652 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 91847267153462699054063168658984754566115797994986222975520529969598650064379 1664
UVM_INFO @ 585861028 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 86780214349816008292236279530758972340732246664589226961220020395523798796650 5371
UVM_INFO @ 21189116183 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 96558476123592123033399804892521133534102548644532924085090972606881500430451 279
UVM_INFO @ 11299717514 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 5792066263880822161261099994663615014563134231771017643886256987623265085704 7937
UVM_INFO @ 8113022863 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 1501961705980565203270307014585417754191869124274517594993863401835914204515 7500
UVM_INFO @ 3134258607 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 16648338253328581413431239591237023710932951244647940824548255477171927883863 9504
UVM_INFO @ 30729816037 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 9758032127283724017252358062546905863232325758280556808811328934001340989268 254
UVM_INFO @ 279505156 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_scoreboard.sv:256) scoreboard [scoreboard] alert fatal_check_error has unexpected timeout error 25 test runs
otp_ctrl_check_fail 75372976351945951897119838043663312952209970031899976763739807064078297024074 3259
UVM_INFO @ 2629877387 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 84643454421350893201063062899533716705602122635090198626384404833557181378095 9017
UVM_INFO @ 846102264 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 85269454706698987201727403327321022155857443188882430525514161336583587500683 9843
UVM_INFO @ 1465442262 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 78624223081233254104257100981426560442663235021382881219947041189821356231658 740
UVM_INFO @ 222840753 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 7467343347619047599385752246203256188110290790176778495225412251787572599608 651
UVM_INFO @ 1118925847 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 1758506654819127475863485684783596194022686999072891541182064386392840768039 234
UVM_INFO @ 659964465 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 29957497718479054482792922495274962786400082734362453134810465586257203441798 363
UVM_INFO @ 101576153 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 68247562750859361917006404225990982874773147437985747530324651771569209569116 10834
UVM_INFO @ 795027094 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 29374590229649609351259598213140655266337721797305801322127758658731980962399 1045
UVM_INFO @ 1604318426 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 26127324101614001798048795267925693604845153682206463370465188217690493011220 6990
UVM_INFO @ 703629059 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 100307021739189087103226766237381853584719835285099393707703369656621908389806 1659
UVM_INFO @ 2232722244 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 11897719162251291616526839458605898091553908131912070003571705082358828440334 2647
UVM_INFO @ 2095971037 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 21050826620181343741745760029982318600169171049685798868831868065229770430467 163
UVM_INFO @ 118373947 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 98438193874220865458211054825626519982788452941316808334750096097152763513787 941
UVM_INFO @ 174610163 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 105312724976079872919828468869396925034456583378360740228389121864618751417204 13164
UVM_INFO @ 803766757 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 76553289757723165239548820464359933643826432128259458773616783481745713972487 8207
UVM_INFO @ 4957580140 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 76639722606076641873629959445635059556749399953596557532050395097682689066044 2760
UVM_INFO @ 770676464 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 111328658613872116927877505086210842321877041637965927372531633147295717145600 3498
UVM_INFO @ 1658427090 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 102453515187499624544283956348623898342875717265665063451976479457097975477818 2663
UVM_INFO @ 291674859 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 69351454841134336857100794905294935783697094581152197930857476025136009734004 1256
UVM_INFO @ 1950223723 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 53900188456369867704886679335422273616163373122752813651641417378007055690850 1346
UVM_INFO @ 179924996 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 7632272422688277169297700130488598014833790342526485895858917440607174188540 13792
UVM_INFO @ 509042120 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 57541704469357655408476803403149253587918513766904505617418757262418367218280 3120
UVM_INFO @ 1305058369 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 11964918407982929972085535373612500638092210221763793635419210280536523585198 3123
UVM_INFO @ 856596353 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 71181082473654047505237630473709751145661892736284661742155050440817780700909 3191
UVM_INFO @ 423448864 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1323) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_* 24 test runs
otp_ctrl_macro_errs 87380166396462847819107291613666877155805460337979979126156637933320105108880 636
UVM_INFO @ 114776288 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 83160203135140574704906543763405351468048504158867297310821891984260859831368 8319
UVM_INFO @ 23940125286 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 14076049633737483772707037024313289325874055092343748765676165122787868692282 2595
UVM_INFO @ 1456148243 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 51794021906589615126077716650095956949513616085904679949638239579301910145032 1968
UVM_INFO @ 850540963 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 23019412479992705369947891761464995831254078376628711881453970472612620067613 2712
UVM_INFO @ 986589904 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 68485823346115733046667103749799652746982298712271256197083788649934283072545 3179
UVM_INFO @ 1035888486 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 73521519409719493102543701613821224544811004755167439742171890573912414268102 232
UVM_INFO @ 67419452 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 91930781053717849612105567631717799109852892101508265536488802953458363748836 5314
UVM_INFO @ 534449596 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 46504821130072218481073123097031612228402847975035926077036141800062969565770 11670
UVM_INFO @ 25842060315 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 85668171365877451324401443731534344098254753499315632198764126315156894289116 6836
UVM_INFO @ 241789699 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 62345605841099042569269524668179881148334611712221796810087662971772120979110 6892
UVM_INFO @ 1036700573 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 36091812741529032397169599305000729202250104843721978881308863347472011914055 4471
UVM_INFO @ 697096817 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 99669847926154448072705509516691847040487971183314821472182813559352311644528 5440
UVM_INFO @ 7849701297 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 13627132590642604505442718129870731375596767635505780929587151033917723881971 5555
UVM_INFO @ 7531903598 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 101168907714492369437381177182648220394861298357070124716483484146051112614734 346
UVM_INFO @ 1759011661 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 77358259433048527354941722041259207772890452534879109055996645126407167401188 543
UVM_INFO @ 3073267805 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 99503878117490625612375856634883848873845345281330215452465709577326576609554 174
UVM_INFO @ 556027114 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 112782187111843989097680800109883000599989068575682322958864529727700909209245 268
UVM_INFO @ 606024717 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 13315025114746897893688000056403985169975709578274708866119073752998802072210 220
UVM_INFO @ 304342333 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 68104124583713930835729564524345961815222319859705183661060256778626920947602 11958
UVM_INFO @ 5989340507 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 50271340262599359270779399697876842994602224652929111270371154250299693331289 432
UVM_INFO @ 1128145990 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 12209118726858821412728618007006842366224257389829576794499343331309971917321 4935
UVM_INFO @ 3869365446 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 112533452080285153458378834785882504815555403847287327198503574910113983575960 17698
UVM_INFO @ 2342885904 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 80904918477348578473017080491756561551849496456566454563193805824550921944159 1286
UVM_INFO @ 191668794 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_scoreboard.sv:256) scoreboard [scoreboard] alert fatal_macro_error has unexpected timeout error 18 test runs
otp_ctrl_dai_errs 94761362022730743814907144834343410163481855909317713092905878353981967309831 6576
UVM_INFO @ 1961071559 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 78181751734921915950731992470112913327137261981901990492945737068644339217646 3510
UVM_INFO @ 221411409 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 85305861938811930492030171120955817240152112453699451753751193287796479093057 9894
UVM_INFO @ 10367499779 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 15818431252681278016473521788390971026619558254722892078731859376928842781383 982
UVM_INFO @ 1774986704 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 68759082250001096952875089079540241116717635864290431967046055566004318307358 1140
UVM_INFO @ 2582671789 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 48783055862949887681879338223089654077328064080695410958874886217455040002996 18324
UVM_INFO @ 2274684080 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 91013480167019567345013413777167722534447213396164821942357583354116290013820 3989
UVM_INFO @ 1210074329 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 77683331589804107573385599217192411857584543512714141393004471616493684032764 3191
UVM_INFO @ 639815211 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 64829253957012204576755039470020313108924483688818454136774897718853015817299 6744
UVM_INFO @ 760748980 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 99070206713208265499683216613494127226443114546050646951708921731057711470650 14981
UVM_INFO @ 17228084728 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 45155005518893245083105403777665339559057069480475255393703375462523936381433 11526
UVM_INFO @ 801574281 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 94224155514617070028131017008304333750593700001311759886601751499213008972072 1124
UVM_INFO @ 404570963 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 78761614834036657077394900687564120985372905836186115623619605790072762366884 1384
UVM_INFO @ 14671805397 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 89770200176894682997360588963568736147058067989880728852460186881793980274743 18415
UVM_INFO @ 859561222 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 80636636676666908798518198696319842790875483640413132494140845033727120114104 4259
UVM_INFO @ 3048272666 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 67003127404010674090324943210196313601733890945751747586277397349238555962963 12781
UVM_INFO @ 563321717 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 14090668047114320557729298572242699453321010975444580158351324293922267281800 6417
UVM_INFO @ 3351981030 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 57582478786000457927847041645827081811968935953184888379143897705654813831611 1498
UVM_INFO @ 902659301 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:674) [scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (* [*] vs * [*]) Interrupt_pin: OtpErr 16 test runs
otp_ctrl_stress_all 62510152486026786904174275749675038439103351270133677092136858722313035452644 10959
UVM_INFO @ 2239826502 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 29075440784008060059028999566380159207226065600483823019431010787552595702447 25641
UVM_INFO @ 3637829656 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 88243121312987205106859561283403481231781760635951078232056098256255034351841 6377
UVM_INFO @ 1945636060 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 24940488188403757302504751339286672071525933184217566633480043564693360980629 10915
UVM_INFO @ 2401646223 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 80104202093193852128808585788074138390310555129290000439655228532044589448401 19336
UVM_INFO @ 9212926923 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 8936138290798991951135285851891234400904054235509685613669118809074176080660 19675
UVM_INFO @ 1785344719 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 105891745227418996654152872434537856914136812199591859867393294061889838442868 3676
UVM_INFO @ 665598172 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 71882386462165442010835428920869630983826917791980426671597419582250246847413 25716
UVM_INFO @ 594096332 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 16624591996398111319706614581412191931837560306317415509519477319073057232385 5404
UVM_INFO @ 1094843828 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 13766990082562018997421900153354999093228140773688026134472719441093790961276 2542
UVM_INFO @ 519082018 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 53389154684221502652106754736091934528541989839963676367398221828285817468391 1861
UVM_INFO @ 363331415 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 9849278031596137740643439523757266575390527749900508389916576397361273456958 7667
UVM_INFO @ 871142958 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 14176928795169669387284019643348203850395963915139070978852507040007609305034 14735
UVM_INFO @ 909401045 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 109321416551108684562379975757885486394899343845535889146894862850546524315923 11489
UVM_INFO @ 716281268 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 44712697832128332666815182293261105666342255469340560831459123844246844653057 9525
UVM_INFO @ 809175406 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 25793654203637020418543314230186309967283764046332850922624388265269810789720 10519
UVM_INFO @ 386575801 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1375) [otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_check_error does not trigger! 16 test runs
otp_ctrl_init_fail 37842358826857786069165288476357669402667967006153312455840053474743546104087 1840
UVM_INFO @ 2528589747 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 55622670900708351169733813186402335846872630862041581804034035783588619694209 1804
UVM_INFO @ 2593131169 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 88778897697699725765900517474086204692930721753271371646603215692122232739566 1918
UVM_INFO @ 263175624 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 91114994797315063742077892508184860601173362594461444346634163281135409092994 866
UVM_INFO @ 350285188 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 115112687439328932003008351560556983820627793370313535968547408065433201096643 1590
UVM_INFO @ 616824065 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 77562067792602422124495519750216235363184771965208817398552393017292196482315 1384
UVM_INFO @ 283733566 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 70132472140232719155441915316789772404991658700872895531210450776327171021967 1412
UVM_INFO @ 668623918 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 63679713966531530735481695714329308310039367496921316841833865421833683229611 1278
UVM_INFO @ 243145516 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 56872009645326312207269263036522571589234738289457098533561374352538715085366 2578
UVM_INFO @ 1203024472 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 112082529371155512038275562652928494805839246087828939418436442914043618728258 1642
UVM_INFO @ 571022768 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 114709428992064243704516140404903788340716250447009389199615146940977372868594 1364
UVM_INFO @ 236159379 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 77089547885975618580504372992644892324887516119064610880672398374758019841546 1896
UVM_INFO @ 653873119 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 76989974146753260842568628244110736663603015859341523885381559953431997417148 1460
UVM_INFO @ 2558725835 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 92819429568270991187472952484031750172136548889527296310432420725847446611342 1250
UVM_INFO @ 1414239271 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 1882717829512007967903881390923089612171255438135768977451172358492570352822 1510
UVM_INFO @ 2102546844 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 68953398662508757479386774890583171739038831416973354967289849460627155591739 1638
UVM_INFO @ 2568065606 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:2202) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) d_data mismatch when d_error = * 12 test runs
otp_ctrl_stress_all_with_rand_reset 15512151279615721313890915320213544678662648422628146460401250072013903280464 97
UVM_INFO @ 499852172 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 49042510374545253216373258042084962949973413013570180655027632278388517814501 97
UVM_INFO @ 39108461 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 42974258952838856259699446024966434096433336223579737228273706119832195557731 97
UVM_INFO @ 43087708 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 68029717804285995182693060902809583437089506492596860648551575996287803487731 1781
UVM_INFO @ 92036111 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 91388482705682795135864542727648628701376609285800925276080439078587657153654 97
UVM_INFO @ 64221160 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 35900722670911439200973633978623337795367396983869248974394416129072220868697 1992
UVM_INFO @ 2752179120 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 80090806421334740155615254607831904596619202949573181885821065828845701674508 97
UVM_INFO @ 501425509 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 55692697674838373165772681033516673514026479107065563242691469749484798723257 97
UVM_INFO @ 501921375 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 12648554908185083099179718380816084107823998234033670891454080929992676661053 42123
UVM_INFO @ 21862875186 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 90366117086842619347210713296670152070139005173197382320093448866694726454971 97
UVM_INFO @ 33668222 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 113981544307232037421159791396642341247173784609005078128576550358479256582454 97
UVM_INFO @ 120028543 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 105112787396603406785795946114513621595230919563068985072979217899281494527890 34769
UVM_INFO @ 1668547096 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1375) [otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_macro_error does not trigger! 12 test runs
otp_ctrl_init_fail 72916528403450355006662230374212819490631491567829803663970293094241237496614 1744
UVM_INFO @ 1034789166 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 56542141744082290817970111159728340096684788942901430905319887044445057766335 1244
UVM_INFO @ 2324042272 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 53043406753341448696539355893050884055672683817541381712315927561934270489290 852
UVM_INFO @ 1435116148 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 48579446370900297814485950030284608302574463155906796405644781072623759407361 1040
UVM_INFO @ 476914156 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 18984744735083324814545178570545436427673443277966332498765117799641976160368 1396
UVM_INFO @ 2013207137 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 111716414861784390280398643929135980255542881997831984349263409683743053486648 1422
UVM_INFO @ 516384962 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 41532735734077592460108063881490421306966164053878513066258036891602165241458 1550
UVM_INFO @ 267979334 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 55911564040784488071099723366534529593388516935683431584547044013003973526317 1136
UVM_INFO @ 2177661121 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 6735235807563366816748511019164800950314601955624212779099182380635865354646 1456
UVM_INFO @ 215777270 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 41960105769439144547488791838677651169507469073887488647099861765470413228127 1168
UVM_INFO @ 1982956818 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 111025597174436365138678128832930484605229390731973900494837224343630469082285 1654
UVM_INFO @ 2100978168 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 107118223794989728856846298692166875825120668531243902562997307762029391170765 1194
UVM_INFO @ 1399294591 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_scoreboard.sv:786) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) d_data mismatch when d_error = * 6 test runs
otp_ctrl_stress_all_with_rand_reset 112475868698993894770538146834249708849660846055263528671740043603505207388095 7962
UVM_INFO @ 2519259671 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 104314091987210673674869964441670450295170916876971235761816124279146621302642 5756
UVM_INFO @ 2539796416 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 33153211745151792410005937160323693280620111778201360049706214156496332272835 3597
UVM_INFO @ 7632487980 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 95808891253291153937265334044346290646069377407220899195518873776407621454708 1579
UVM_INFO @ 82949231 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 17232647085005012913317383329052204770358626432907340240723986385248666038314 323
UVM_INFO @ 25162871913 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 53129482915334696525544685033670510520988095061255643611687718959659274123883 98
UVM_INFO @ 120280169 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_WARNING (uvm_reg_field.svh:1191) [RegModel] Trying to predict value of field 'err_code' while register 'otp_ctrl_core_reg_block.err_code_*' is being accessed 5 test runs
otp_ctrl_stress_all_with_rand_reset 78457004677182938254528615155261450180051527813741047757262296283546916710491 2973
UVM_INFO @ 628093787 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 628156289 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 628281293 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 628333378 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
otp_ctrl_stress_all_with_rand_reset 19875965470143796389112099297446535997764998251961091539640954663936623787082 4807
UVM_INFO @ 9875572260 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 9875851332 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 9876083892 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 9876107148 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
otp_ctrl_stress_all_with_rand_reset 4729564020495934282529888249737360179391682442875152147905887291892756273436 1157
UVM_INFO @ 460964023 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 461109479 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 461200389 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 461382209 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
otp_ctrl_stress_all_with_rand_reset 35158204450810365984367737590385881825799012964093988108703023593561329634096 14790
UVM_INFO @ 4854244809 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 4854387666 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 4854832110 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 4854895602 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
otp_ctrl_stress_all_with_rand_reset 57066281162422044216183642709194438553361983232505914403576864259520871527226 2459
UVM_INFO @ 974681988 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 974873481 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 975575622 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 975596899 ps: (otp_ctrl_scoreboard.sv:572) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr *ed* rdata* readout mismatch 3 test runs
otp_ctrl_low_freq_read 10370417232974772167112917312644968138724389666551676547570062692635876103980 95
UVM_INFO @ 69358184194 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 43677866776562669550055800577909575136945781737276334477689372029442430275899 96
UVM_INFO @ 63542574264 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 55963303160798470814157325577179888246396636745149145860400446825740002498734 96
UVM_INFO @ 26393181192 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1057) virtual_sequencer [otp_ctrl_common_vseq] Expected alert (fatal_prim_otp_alert) did not fire in * cycles. 3 test runs
otp_ctrl_tl_intg_err 102048101930897299356638995817676417398153602832329458692793892278233264067019 177
UVM_INFO @ 5773459108 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_tl_intg_err 4800276348565426730967684025720466386163112622696388589378952436806050685249 223
UVM_INFO @ 7623621584 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_tl_intg_err 39834077929907149464435571452209998278213110415387980593338854500535884818181 110
UVM_INFO @ 1102157813 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1375) [otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_check_error does not trigger! 3 test runs
otp_ctrl_background_chks 30113217540030813413330303239808995661638698026330891958100252528631919022765 6680
UVM_INFO @ 1684907856 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 114739802885533661874314494785183747901609876769433293554461727075640427351415 4708
UVM_INFO @ 1201762489 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 47846430660835235114553302771764878508748003799535697213207790334688649948143 9776
UVM_INFO @ 2083781973 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:961) [scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (* [*] vs * [*]) reg name: status, compare_mask * 3 test runs
otp_ctrl_parallel_lc_req 108374963348249840698746018177126520443197760800102904844961831059831804019018 9877
UVM_INFO @ 6815471403 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 719519038899834349304384873733733578277678120073596278945914130406426764795 12809
UVM_INFO @ 517046261 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 53904627009433117348680952864312989959864626963543927232092622994489943575970 3653
UVM_INFO @ 876638281 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1057) virtual_sequencer [otp_ctrl_common_vseq] Expected alert (fatal_bus_integ_error) did not fire in * cycles. 2 test runs
otp_ctrl_tl_intg_err 89125868698725721697680561646917947372064701056037391021640105881445966497188 145
UVM_INFO @ 1026532305 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_tl_intg_err 105860943121957155087883461672614365160396558392817223798078610485736974143456 181
UVM_INFO @ 5268197515 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1057) virtual_sequencer [otp_ctrl_common_vseq] Expected alert (fatal_check_error) did not fire in * cycles. 1 test run
otp_ctrl_sec_cm 32250406089817152498968957956882781149244943805519231793864646624364829726400 3370
UVM_INFO @ 14335829474 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '(cio_test_en_o == *)' 1 test run
otp_ctrl_stress_all_with_rand_reset 99739284012383374565402983250697603661212845595558932685141733855767927577071 1189
UVM_ERROR @ 21866180741 ps: (otp_ctrl_if.sv:391) [ASSERT FAILED] CioTestEnOWithDftOff_A
UVM_INFO @ 21866180741 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr ad* rdata* readout mismatch 1 test run
otp_ctrl_stress_all_with_rand_reset 42475085385958062469150130797358243349200150017845528827183603297200871724704 51805
UVM_INFO @ 10529762046 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:309) [scoreboard] Check failed exp_alert != OtpNoAlert (* [*] vs * [*]) 1 test run
otp_ctrl_stress_all_with_rand_reset 24692008517823163540083026981169908555987237118653264260673898022700750402118 3213
UVM_INFO @ 944692499 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr c* rdata* readout mismatch 1 test run
otp_ctrl_stress_all_with_rand_reset 48362556391072455848927538577094986223799817191103953147009644586094767125512 8953
UVM_INFO @ 8709159677 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1323) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.direct_access_regwen 1 test run
otp_ctrl_stress_all_with_rand_reset 52905775170263108769493009820945081693713047404405230395069657831924164173933 208
UVM_INFO @ 41879771 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:619) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout otp_ctrl_core_reg_block.status.check_pending (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=1) 1 test run
otp_ctrl_stress_all_with_rand_reset 22088777847717814729385850592800333217163041585090571933710298282059069742567 34756
UVM_INFO @ 10595402180 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---