Simulation Results: aes/gcm_unmasked

 
18/09/2026 15:01:41 DVSim: v1.49.0 sha: 3823b79 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 92.55 %
  • code
  • 94.06 %
  • assert
  • 97.95 %
  • func
  • 85.65 %
  • block
  • 94.58 %
  • line
  • 95.46 %
  • branch
  • 89.89 %
  • toggle
  • 97.99 %
  • FSM
  • 92.91 %
Validation stages
V1
100.00%
V2
94.04%
V2S
87.76%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 2.000s 69.720us 1 1 100.00
smoke 10 10 100.00
aes_smoke 3.000s 84.704us 10 10 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 2.000s 135.580us 1 1 100.00
csr_rw 5 5 100.00
aes_csr_rw 3.000s 57.498us 5 5 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 7.000s 458.842us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 2.000s 78.657us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
aes_csr_mem_rw_with_rand_reset 3.000s 112.413us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
aes_csr_rw 3.000s 57.498us 5 5 100.00
aes_csr_aliasing 2.000s 78.657us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 70 70 100.00
aes_smoke 3.000s 84.704us 10 10 100.00
aes_config_error 11.000s 907.596us 50 50 100.00
aes_stress 5.000s 150.344us 10 10 100.00
key_length 70 70 100.00
aes_smoke 3.000s 84.704us 10 10 100.00
aes_config_error 11.000s 907.596us 50 50 100.00
aes_stress 5.000s 150.344us 10 10 100.00
back2back 35 35 100.00
aes_stress 5.000s 150.344us 10 10 100.00
aes_b2b 13.000s 194.206us 25 25 100.00
backpressure 10 10 100.00
aes_stress 5.000s 150.344us 10 10 100.00
multi_message 88 95 92.63
aes_smoke 3.000s 84.704us 10 10 100.00
aes_config_error 11.000s 907.596us 50 50 100.00
aes_stress 5.000s 150.344us 10 10 100.00
aes_alert_reset 3601.000s 0.000us 18 25 72.00
failure_test 78 85 91.76
aes_man_cfg_err 4.000s 57.289us 10 10 100.00
aes_config_error 11.000s 907.596us 50 50 100.00
aes_alert_reset 3601.000s 0.000us 18 25 72.00
trigger_clear_test 10 10 100.00
aes_clear 5.000s 152.174us 10 10 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 6.000s 285.251us 1 1 100.00
reset_recovery 18 25 72.00
aes_alert_reset 3601.000s 0.000us 18 25 72.00
stress 10 10 100.00
aes_stress 5.000s 150.344us 10 10 100.00
sideload 20 20 100.00
aes_stress 5.000s 150.344us 10 10 100.00
aes_sideload 5.000s 111.171us 10 10 100.00
deinitialization 10 10 100.00
aes_deinit 4.000s 78.612us 10 10 100.00
stress_all 4 10 40.00
aes_stress_all 10801.000s 0.000us 4 10 40.00
alert_test 10 10 100.00
aes_alert_test 4.000s 66.692us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
aes_tl_errors 5.000s 438.520us 25 25 100.00
tl_d_illegal_access 25 25 100.00
aes_tl_errors 5.000s 438.520us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
aes_csr_hw_reset 2.000s 135.580us 1 1 100.00
aes_csr_rw 3.000s 57.498us 5 5 100.00
aes_csr_aliasing 2.000s 78.657us 1 1 100.00
aes_same_csr_outstanding 3.000s 111.300us 5 5 100.00
tl_d_partial_access 12 12 100.00
aes_csr_hw_reset 2.000s 135.580us 1 1 100.00
aes_csr_rw 3.000s 57.498us 5 5 100.00
aes_csr_aliasing 2.000s 78.657us 1 1 100.00
aes_same_csr_outstanding 3.000s 111.300us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 5 10 50.00
aes_reseed 4.000s 97.983us 5 10 50.00
fault_inject 564 660 85.45
aes_fi 3609.000s 0.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 256 300 85.33
aes_cipher_fi 61.000s 0.000us 308 350 88.00
shadow_reg_update_error 20 20 100.00
aes_shadow_reg_errors 3.000s 418.835us 20 20 100.00
shadow_reg_read_clear_staged_value 20 20 100.00
aes_shadow_reg_errors 3.000s 418.835us 20 20 100.00
shadow_reg_storage_error 20 20 100.00
aes_shadow_reg_errors 3.000s 418.835us 20 20 100.00
shadowed_reset_glitch 20 20 100.00
aes_shadow_reg_errors 3.000s 418.835us 20 20 100.00
shadow_reg_update_error_with_csr_rw 19 20 95.00
aes_shadow_reg_errors_with_csr_rw 6.000s 965.181us 19 20 95.00
tl_intg_err 30 30 100.00
aes_sec_cm 5.000s 547.762us 5 5 100.00
aes_tl_intg_err 5.000s 216.149us 25 25 100.00
sec_cm_bus_integrity 25 25 100.00
aes_tl_intg_err 5.000s 216.149us 25 25 100.00
sec_cm_lc_escalate_en_intersig_mubi 18 25 72.00
aes_alert_reset 3601.000s 0.000us 18 25 72.00
sec_cm_main_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 418.835us 20 20 100.00
sec_cm_gcm_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 418.835us 20 20 100.00
sec_cm_main_config_sparse 127 145 87.59
aes_smoke 3.000s 84.704us 10 10 100.00
aes_stress 5.000s 150.344us 10 10 100.00
aes_alert_reset 3601.000s 0.000us 18 25 72.00
aes_core_fi 283.000s 10008.690us 89 100 89.00
sec_cm_gcm_config_sparse 149 160 93.12
aes_config_error 11.000s 907.596us 50 50 100.00
aes_stress 5.000s 150.344us 10 10 100.00
aes_core_fi 283.000s 10008.690us 89 100 89.00
sec_cm_aux_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 418.835us 20 20 100.00
sec_cm_aux_config_regwen 20 20 100.00
aes_readability 3.000s 107.636us 10 10 100.00
aes_stress 5.000s 150.344us 10 10 100.00
sec_cm_key_sideload 20 20 100.00
aes_stress 5.000s 150.344us 10 10 100.00
aes_sideload 5.000s 111.171us 10 10 100.00
sec_cm_key_sw_unreadable 10 10 100.00
aes_readability 3.000s 107.636us 10 10 100.00
sec_cm_data_reg_sw_unreadable 10 10 100.00
aes_readability 3.000s 107.636us 10 10 100.00
sec_cm_key_sec_wipe 10 10 100.00
aes_readability 3.000s 107.636us 10 10 100.00
sec_cm_iv_config_sec_wipe 10 10 100.00
aes_readability 3.000s 107.636us 10 10 100.00
sec_cm_data_reg_sec_wipe 10 10 100.00
aes_readability 3.000s 107.636us 10 10 100.00
sec_cm_data_reg_key_sca 10 10 100.00
aes_stress 5.000s 150.344us 10 10 100.00
sec_cm_key_masking 10 10 100.00
aes_stress 5.000s 150.344us 10 10 100.00
sec_cm_main_fsm_sparse 0 10 0.00
aes_fi 3609.000s 0.000us 0 10 0.00
sec_cm_main_fsm_redun 589 685 85.99
aes_fi 3609.000s 0.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 256 300 85.33
aes_cipher_fi 61.000s 0.000us 308 350 88.00
aes_ctr_fi 7.000s 47.590us 25 25 100.00
sec_cm_cipher_fsm_sparse 0 10 0.00
aes_fi 3609.000s 0.000us 0 10 0.00
sec_cm_cipher_fsm_redun 564 660 85.45
aes_fi 3609.000s 0.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 256 300 85.33
aes_cipher_fi 61.000s 0.000us 308 350 88.00
sec_cm_cipher_ctr_redun 308 350 88.00
aes_cipher_fi 61.000s 0.000us 308 350 88.00
sec_cm_ctr_fsm_sparse 0 10 0.00
aes_fi 3609.000s 0.000us 0 10 0.00
sec_cm_ctr_fsm_redun 281 335 83.88
aes_fi 3609.000s 0.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 256 300 85.33
aes_ctr_fi 7.000s 47.590us 25 25 100.00
sec_cm_ghash_fsm_sparse 0 10 0.00
aes_fi 3609.000s 0.000us 0 10 0.00
sec_cm_ctrl_sparse 589 685 85.99
aes_fi 3609.000s 0.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 256 300 85.33
aes_cipher_fi 61.000s 0.000us 308 350 88.00
aes_ctr_fi 7.000s 47.590us 25 25 100.00
sec_cm_main_fsm_global_esc 18 25 72.00
aes_alert_reset 3601.000s 0.000us 18 25 72.00
sec_cm_main_fsm_local_esc 589 685 85.99
aes_fi 3609.000s 0.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 256 300 85.33
aes_cipher_fi 61.000s 0.000us 308 350 88.00
aes_ctr_fi 7.000s 47.590us 25 25 100.00
sec_cm_cipher_fsm_local_esc 589 685 85.99
aes_fi 3609.000s 0.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 256 300 85.33
aes_cipher_fi 61.000s 0.000us 308 350 88.00
aes_ctr_fi 7.000s 47.590us 25 25 100.00
sec_cm_ctr_fsm_local_esc 281 335 83.88
aes_fi 3609.000s 0.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 256 300 85.33
aes_ctr_fi 7.000s 47.590us 25 25 100.00
sec_cm_ghash_fsm_local_esc 0 10 0.00
aes_fi 3609.000s 0.000us 0 10 0.00
sec_cm_data_reg_local_esc 564 660 85.45
aes_fi 3609.000s 0.000us 0 10 0.00
aes_control_fi 61.000s 0.000us 256 300 85.33
aes_cipher_fi 61.000s 0.000us 308 350 88.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 10 0.00
aes_stress_all_with_rand_reset 48.000s 1745.843us 0 10 0.00

Error Messages

   Test seed line log context
Job timed out after * minutes 37 test runs
aes_alert_reset 49838491758412915116420631046614704761924350792038514909975355947110002251625 None
aes_control_fi 44219264145230731064059638889464524443335054381115772705120970650549545380204 None
aes_alert_reset 70928230956530228174420104337554707786895312772191530178000133983820936995281 None
aes_fi 7882996552337461520305802874712350750163116404136948441788403236448184049010 None
aes_stress_all 19389081388954396688380143007615581140085207855827760546469745958550307746441 None
aes_alert_reset 24312649514290023316440870293582865686261302592246017079638067447108734244239 None
aes_cipher_fi 3195900911607879946335089999556741291385635107466784211075067960213062306055 None
aes_control_fi 16819596370452091290447615660830195367570803668595028833000062629018293928955 None
aes_cipher_fi 54599702182756831836300905325454051202408780467998226944269189365620748507653 None
aes_control_fi 77612671149685002603731566488751274741898643760401322339326695202417623856051 None
aes_cipher_fi 72393129980071578243494168996332477471507004667488663232613181928358940005083 None
aes_cipher_fi 57422398336440973082515635013571881333887266428234524965986230817361977634643 None
aes_control_fi 46080858907367922445852783697554994649403111587988616337438085513632628660178 None
aes_control_fi 8807326703588988725817064574237242256725496295407470232118369325939841125663 None
aes_control_fi 49248795111359403263901704049336157295509235920376660489074842508689911866009 None
aes_cipher_fi 704291293154226450516732721396916740586721707751704044000056083053605186262 None
aes_control_fi 101002330579599053846326337910689312220922781276159256218862731315509795346767 None
aes_cipher_fi 103293777740811781721633843070136538319656457793042403879460359485837723890474 None
aes_cipher_fi 65434071871524125520662680777502177785371845393183730362910081708441433896034 None
aes_control_fi 76150994171087288879900274696944951116948703783252674213282403075124751902187 None
aes_control_fi 3344517556959018046066970749657060714067707456489284420478797513829068807341 None
aes_control_fi 49251508145474220290020687593547687016806660218768335863999899284824035145314 None
aes_control_fi 17890875187520339388714847126005789299658377650246225211683824604077420560081 None
aes_control_fi 70662007809238972867421517184681698067909396138951008795235599324455321791570 None
aes_control_fi 64050191831728137424583279851209522534366252817975325457685602079271741049716 None
aes_cipher_fi 59046019547526657886349905949165546418217540886557829749763560816311102128740 None
aes_cipher_fi 50076984261259933366815316084316932238772807116298557489977400212666988335990 None
aes_control_fi 89632803571523771449496771117500659765019283799832783361632973058269453014748 None
aes_control_fi 91503366173846885275413830792146107854259857095525697417695840731150605844648 None
aes_control_fi 68000588592216673841494634348694709865163940436558939256281070049033411071342 None
aes_cipher_fi 59667119842615734829188599122428344711543207699787290775943509076883803886539 None
aes_control_fi 65193436255675784649561587678292884634207417552246898811178623170985131077447 None
aes_control_fi 91018215340064999848055118528646369161627152964388679716663850507219673535496 None
aes_cipher_fi 11729370135165582967038109344491245892989910352633496129219739601139600630988 None
aes_cipher_fi 78785769708856893452746844622796124129563228148484443305113292746789517060279 None
aes_cipher_fi 64837202842705294825972657489717406328462028479491838979301808646687039885112 None
aes_cipher_fi 85174525715249160194825527239332224249831869213914096982165915951870461515999 None
UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred! 26 test runs
aes_control_fi 46607353050580806154101614824479294300323234131025630699735962576749279515339 153
UVM_INFO @ 10006177723 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 54107170815573831478866593492911524628913793813968774514470806121662307917967 156
UVM_INFO @ 10009855795 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 16705983251683364633792213402167373910305841285266644865238368952240013506754 152
UVM_INFO @ 10011356959 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 86161245093122773019499999741690766094739221348810616730971841074328424191112 148
UVM_INFO @ 10007406723 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 32292324693897338604776627529321157354236128954062447397498252086668944772073 152
UVM_INFO @ 10005386192 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 47879142277097842295010390718776917351820834204344499096625778615110467062835 155
UVM_INFO @ 10017053137 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 49799212445105940709526121131796535376882228192285658803883408372279244559236 153
UVM_INFO @ 10022012412 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 9791463932181006360410614321925869715098318685488977575635383050075802282117 158
UVM_INFO @ 10011774635 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 28867586526721441905866981679877010603461988117845332269382580738419627543659 155
UVM_INFO @ 10005688816 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 70552479915386239281357978773388574897944416339218227685301572279869969850046 142
UVM_INFO @ 10016208252 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 54587639041125437089557892289241159871151687892216822303007141504750785515680 150
UVM_INFO @ 10006382161 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 23942012864614092336103224285474008221958597316231343635333304902175916163429 142
UVM_INFO @ 10017301431 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 95453892582452009228220194483779587774576126655076245605664415905489934444191 152
UVM_INFO @ 10081273789 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 56582548706800145550451266371958184518337055959918821332925970904141603334805 144
UVM_INFO @ 10007646731 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 106438660440324759532574763781737825425294409293182075650901503910472328056588 153
UVM_INFO @ 10024428708 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 94683871441000865440440158625202544165378219906898385639094657195032523062868 152
UVM_INFO @ 10007584021 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 44789037530427706796499587046470334774788419336629714473936579042129957494998 151
UVM_INFO @ 10015114954 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 39219428654403727105306259100187718642750823592406040074771093361812773557893 150
UVM_INFO @ 10010977585 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 82436223392166205031600491922863136144143771073900551389714942788950916770314 141
UVM_INFO @ 10005754757 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 41627820909177446327579133709672738431817243376565823767425354320379572555692 145
UVM_INFO @ 10003433318 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 99704725522767790536158632181132691297396525916540100667595432541988194271433 155
UVM_INFO @ 10047822858 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 2348393226091914993977196763296421911894531526962641230521094476330251631022 156
UVM_INFO @ 10012884413 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 21478491369177850208980476887132752258379273277530209493820835028357153685205 150
UVM_INFO @ 10022986788 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 28102119245524999310221951037833514627464640432481913842985835859221992422445 149
UVM_INFO @ 10005051824 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 78720031241770286865025578927792568287944004946677056292390174649057220882060 142
UVM_INFO @ 10003983012 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 82577591543109659388772959272403330756513160219489300668654504262284776562018 148
UVM_INFO @ 10014596748 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred! 25 test runs
aes_cipher_fi 43009496466455833345897525068032578652247368965008317792220066418880442055987 153
UVM_INFO @ 10005430582 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 19639139968624737489626809584188862559358100228547500570113161871889283782553 153
UVM_INFO @ 10005086312 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 47043698518630251632995138521781813302172412258987700282379127970883736933987 157
UVM_INFO @ 10020031600 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 93985645541161645524790303848083131456585813470250572582307457774782500558570 148
UVM_INFO @ 10009764389 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 38225700069989309086592108550873080303524995789087251509138407745677896605175 155
UVM_INFO @ 10011289550 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 8034222176926356593954546614164024673840782929467378102501294192283242773085 148
UVM_INFO @ 10045767940 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 72170474587054975621529596477000545858849529002905511672088895003130289827877 154
UVM_INFO @ 10020106238 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 25680834498160817273508256931314741316415689452685747555109213496586747509581 152
UVM_INFO @ 10012065485 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 23949898802217674001807271850920731181655266208726750538498166441687413421980 147
UVM_INFO @ 10007583556 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 35366805690691393292397542747144441406680661463080924654579878188910880124921 151
UVM_INFO @ 10022801629 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 115469163041285126975174965882064693936442031336841724474482946845339993694648 149
UVM_INFO @ 10009615675 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 67927401168194398589086346353768340199322679727097428211462494771303786668784 146
UVM_INFO @ 10003366596 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 106766776189322593512546854177178960405274607097919067337941814814923022484193 154
UVM_INFO @ 10005265907 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 58313269710059626330157607962103761619924781446673550181569980138815583861853 141
UVM_INFO @ 10015134083 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 88984687668304569779490826158364774011190208717677482522656969420246006894972 150
UVM_INFO @ 10033667219 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 94594354970886471084889064375860795995036864546931069660010285345556696397231 155
UVM_INFO @ 10013839168 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 71194652999111731141523682636809933415141350836728026327677834813971562679903 146
UVM_INFO @ 10003295923 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 91470558854524824654981145007905255334936615352059608951277315652024592677924 141
UVM_INFO @ 10009106491 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 11803461164444758182966705103035794640729652912659316596310241408551073842728 151
UVM_INFO @ 10008306739 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 102125807745538799113934219375037173434067182847423980749534315727422865781282 146
UVM_INFO @ 10005979649 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 17117833692214158869946154237596797420578440845488636039600275824591926256964 147
UVM_INFO @ 10095017338 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 108010529427354096465727092865460617264797905713077508581909989732453649046411 141
UVM_INFO @ 10008543465 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 101498419217670187911881303645589315383999197778553891861647322613299523882929 147
UVM_INFO @ 10028179194 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 102272298032231034105915537333523717924269906646994287602936738789466338503430 146
UVM_INFO @ 10003196370 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 37322231822593165666684027612387476394150386236726489614866199902717217866739 149
UVM_INFO @ 10005814258 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'parent_sequence' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues 15 test runs
aes_reseed 110569238138871355328946887020621017881345490953419143575636108054154072592645 5811
UVM_INFO @ 48727910 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 27503067892285628698566267793400013999271346862048154129444045546457130658862 19436
UVM_INFO @ 985084037 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 44162184248568196950600233137083034875774666704036183885733238142528480644531 59464
UVM_INFO @ 346388036 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_reseed 107216989489519027329419205762436834974580469756133436726219758071039785690974 6137
UVM_INFO @ 97983299 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 109408772765424682825739714920353403832782951083905175509514649989701649491488 30058
UVM_INFO @ 147185422 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 78091168187469369597560822753243010450809811877924413764866168319829808026406 752
UVM_INFO @ 551480105 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 29372653103169124008596538864684824379451319183369338701997866913297990032780 46537
UVM_INFO @ 260138604 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_reseed 54763473151759116437906247422729840490054139507294302229983841436443908894647 6660
UVM_INFO @ 55095083 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 24973775314849185541778882377755011177262874798231781092835903259473907952687 1380
UVM_INFO @ 1745843027 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 101284465840894576635935176483883902681486212326599184510418515560055763495461 618
UVM_INFO @ 580203986 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 50812799142946244513450592072480783716022178243312787492197259756419842277603 269
UVM_INFO @ 860383018 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_reseed 56818690946007338560894600333220959844985636316664003064957408192893967442465 7707
UVM_INFO @ 133283935 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 18951217582072118493356400051081992569685784567462441006824478111618216875894 776
UVM_INFO @ 1247146303 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_reseed 72285227194065583031547318826936853339709957615300213894562316679187721536933 6602
UVM_INFO @ 82022235 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 36875193571093171334827709341063878031481168997203816278738319158770375938874 585
UVM_INFO @ 394364218 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_scoreboard.sv:923) scoreboard [scoreboard] 8 test runs
aes_fi 10734716714991580881143081302031193863887335086220762317657478405510525551384 6332
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 5
----| Seen: 2
----| Expected corrupted: 0
aes_fi 23033375947882825272706723469667965148502051106438962886971782325032577722007 4274
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 5
----| Seen: 3
----| Expected corrupted: 0
aes_fi 99110309280604319614252758602327126408123468627747929590571588217432221939509 4956
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 2
----| Expected corrupted: 0
aes_fi 44815822141815322656229178362923722362998377777428155964029131459511963149796 6810
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 5
----| Seen: 4
----| Expected corrupted: 0
aes_fi 25504765050019974744623314892801638548653724847255549120084321374174341015016 10480
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 4
----| Expected corrupted: 0
aes_fi 17494337357236588358879139646476524881591828795031945223261741947244611083874 6900
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 5
----| Expected corrupted: 0
aes_fi 81810298539168222791875972187665313309657359132046605266459319833854931651558 5902
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 1
----| Expected corrupted: 0
aes_stress_all 100054921978529559241176304568596660872923484581254157174621153310748900233965 34464
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 2
----| Seen: 1
----| Expected corrupted: 0
UVM_FATAL (aes_core_fi_vseq.sv:70) [aes_core_fi_vseq] wait timeout occurred! 6 test runs
aes_core_fi 7510162361759867667390591879836565588299352506478546504192391870806480981893 154
UVM_INFO @ 10014134900 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 76085505425156296382353004959633101935816987448253829929964906394222291607525 154
UVM_INFO @ 10003642283 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 54252755275252063548108849865507613998593087540210048149550266174463314261352 148
UVM_INFO @ 10003484865 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 95517467249176116534500810239886566581704614731681152426899964038226084896922 145
UVM_INFO @ 10007653517 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 10797374014418857659889843349475337897448572726506651471607415037645994574051 148
UVM_INFO @ 10008038338 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 57365299643980742276978822084289751755115293554580257318999371123518022218371 151
UVM_INFO @ 10003986694 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue 5 test runs
aes_fi 18604762157829530309936780241113706515568608777259357868634709113153862964887 1802234
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_fi 42045509331528111490691187726616079265657231947461321982245084147832228992478 6451184
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_alert_reset 22834661635764440184304063590775223367318477873900343564652783193388225146225 3225271
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_alert_reset 62779309519444331592229186282633703671201176179915276297979406471304924831732 1981122
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 73587206561925105274036688144935624482978203253925492171260406672316182198537 149
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1230) [aes_common_vseq] Check failed (vseq_done) 2 test runs
aes_stress_all_with_rand_reset 21841116667814545369196391017331952749356226023283430831894559462771632331825 1206
UVM_INFO @ 1606234546 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 62198556634310318379151502982773863512131822702313146961848424764652816372959 836
UVM_INFO @ 2011653713 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_core_fi_vseq.sv:93) [aes_core_fi_vseq] wait timeout occurred! 2 test runs
aes_core_fi 114937685130512860102563375277331001753780098048421118394123824740408215938383 150
UVM_INFO @ 10040719556 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 84191772975841249264895809164322756359065646605392806435246814896425266979855 145
UVM_INFO @ 10010173368 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xmsim: *E,MEMALC: Memory not allocated for actual argument 'input_msg', passed to DPI task/function 'c_dpi_aes_crypt_message' call at line '*' in file '/nightly/current_run/scratch/master/aes_gcm_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_aes_env_*/aes_scoreboard.sv' at time * PS + *. 1 test run
aes_alert_reset 91344188775469237077714440234390022410335869478121143119568767070122353877208 1424
xmsim: *E,MEMALC: Memory not allocated for actual argument 'input_msg', passed to DPI task/function 'c_dpi_aes_crypt_message' call at line '745' in file '/nightly/current_run/scratch/master/aes_gcm_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_aes_env_0.1/aes_scoreboard.sv' at time 112311704 PS + 10.
xmsim: *E,MEMALC: Memory not allocated for actual argument 'input_msg', passed to DPI task/function 'c_dpi_aes_crypt_message' call at line '745' in file '/nightly/current_run/scratch/master/aes_gcm_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_aes_env_0.1/aes_scoreboard.sv' at time 112311704 PS + 10.
ERROR: Decryption finalizing failed
xmsim: *E,MEMALC: Memory not allocated for actual argument 'predicted_msg', passed to DPI task/function 'c_dpi_aes_crypt_message' call at line '745' in file '/nightly/current_run/scratch/master/aes_gcm_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_aes_env_0.1/aes_scoreboard.sv' at time 112311704 PS + 10.
UVM_FATAL (aes_base_vseq.sv:87) [aes_reseed_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) 1 test run
aes_stress_all_with_rand_reset 12269025879684576538354917279287251172492673100980528914164858765077238626759 114
UVM_INFO @ 12857115 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:623) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=12) 1 test run
aes_core_fi 49354251589481304093442170549978882206512279893969227537703607469037233671152 146
UVM_INFO @ 10008690147 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_base_vseq.sv:334) virtual_sequencer [aes_stress_vseq] Expected GCM phase GCM_AAD, got GCM_TEXT 1 test run
aes_stress_all_with_rand_reset 75080983376670848535250785340368452527208849816728656483086203846975438439876 164
UVM_INFO @ 213834201 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1391) [aes_common_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_fault does not trigger! 1 test run
aes_shadow_reg_errors_with_csr_rw 84798602848870548076995175335900439315500599179055884704286507572766033384874 109
UVM_INFO @ 73269287 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_gcm_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_*/rtl/aes_core.sv,1113): Assertion AesModeValid has failed 1 test run
aes_alert_reset 83450674167487623675060783399030816544061278008823667838500630074562257954190 1721
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_gcm_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_control_fsm.sv,1180): (time 26402926 PS) Assertion tb.dut.u_aes_core.u_aes_control.gen_fsm[2].gen_fsm_n.u_aes_control_fsm_i.u_aes_control_fsm.AesModeValid has failed
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_gcm_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_control_fsm.sv,1180): (time 26402926 PS) Assertion tb.dut.u_aes_core.u_aes_control.gen_fsm[1].gen_fsm_p.u_aes_control_fsm_i.u_aes_control_fsm.AesModeValid has failed
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_gcm_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_control_fsm.sv,1180): (time 26402926 PS) Assertion tb.dut.u_aes_core.u_aes_control.gen_fsm[0].gen_fsm_p.u_aes_control_fsm_i.u_aes_control_fsm.AesModeValid has failed
UVM_ERROR @ 26402926 ps: (aes_core.sv:1113) [ASSERT FAILED] AesModeValid
UVM_FATAL (csr_utils_pkg.sv:623) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=9) 1 test run
aes_core_fi 65231147562017492206414381511717377795192537100618753852599946193536314873613 140
UVM_INFO @ 10032041176 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_base_vseq.sv:1176) virtual_sequencer [aes_core_fi_vseq] 1 test run
aes_core_fi 114447151636744921061725312356596777237917996995563618257510242721379762494603 135
Entering FSM
----|reading STATUS
---| Idle: 0
UVM_FATAL (csr_utils_pkg.sv:623) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3) 1 test run
aes_cipher_fi 111070447014677957310754322043937347722121200713164883995966517824950210651910 137
UVM_INFO @ 10006786475 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:623) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=8) 1 test run
aes_cipher_fi 78951892471710560351815026314878786114492302711717252303923884099909398698071 149
UVM_INFO @ 10056682011 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---