Simulation Results: gpio

 
18/09/2026 15:01:41 DVSim: v1.49.0 sha: 3823b79 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 96.10 %
  • code
  • 89.58 %
  • assert
  • 98.73 %
  • func
  • 100.00 %
  • line
  • 99.89 %
  • branch
  • 97.61 %
  • cond
  • 94.53 %
  • toggle
  • 80.88 %
  • FSM
  • 75.00 %
Validation stages
V1
100.00%
V2
94.27%
V2S
93.33%
V3
45.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 40 40 100.00
gpio_smoke 2.530s 1969.831us 10 10 100.00
gpio_smoke_no_pullup_pulldown 2.410s 112.673us 10 10 100.00
gpio_smoke_en_cdc_prim 2.190s 85.956us 10 10 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 2.350s 168.327us 10 10 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 1.180s 189.097us 1 1 100.00
csr_rw 5 5 100.00
gpio_csr_rw 1.150s 45.151us 5 5 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 4.790s 2321.311us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 1.180s 44.246us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
gpio_csr_mem_rw_with_rand_reset 1.340s 76.474us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
gpio_csr_rw 1.150s 45.151us 5 5 100.00
gpio_csr_aliasing 1.180s 44.246us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 20 20 100.00
gpio_random_dout_din 2.230s 166.115us 10 10 100.00
gpio_random_dout_din_no_pullup_pulldown 2.170s 71.434us 10 10 100.00
out_in_regs_read_write 10 10 100.00
gpio_dout_din_regs_random_rw 1.520s 33.696us 10 10 100.00
gpio_interrupt_programming 10 10 100.00
gpio_intr_rand_pgm 2.080s 97.853us 10 10 100.00
random_interrupt_trigger 10 10 100.00
gpio_rand_intr_trigger 5.130s 766.824us 10 10 100.00
interrupt_and_noise_filter 10 10 100.00
gpio_intr_with_filter_rand_intr_event 5.520s 330.914us 10 10 100.00
noise_filter_stress 10 10 100.00
gpio_filter_stress 35.520s 929.261us 10 10 100.00
regs_long_reads_and_writes 10 10 100.00
gpio_random_long_reg_writes_reg_reads 11.670s 8949.673us 10 10 100.00
full_random 10 10 100.00
gpio_full_random 1.650s 66.622us 10 10 100.00
stress_all 1 10 10.00
gpio_stress_all 96.870s 10942.666us 1 10 10.00
alert_test 10 10 100.00
gpio_alert_test 0.950s 14.752us 10 10 100.00
intr_test 10 10 100.00
gpio_intr_test 1.000s 70.753us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
gpio_tl_errors 4.050s 183.693us 25 25 100.00
tl_d_illegal_access 25 25 100.00
gpio_tl_errors 4.050s 183.693us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
gpio_csr_rw 1.150s 45.151us 5 5 100.00
gpio_same_csr_outstanding 1.790s 55.794us 5 5 100.00
gpio_csr_aliasing 1.180s 44.246us 1 1 100.00
gpio_csr_hw_reset 1.180s 189.097us 1 1 100.00
tl_d_partial_access 12 12 100.00
gpio_csr_rw 1.150s 45.151us 5 5 100.00
gpio_same_csr_outstanding 1.790s 55.794us 5 5 100.00
gpio_csr_aliasing 1.180s 44.246us 1 1 100.00
gpio_csr_hw_reset 1.180s 189.097us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 28 30 93.33
gpio_tl_intg_err 3.780s 774.526us 23 25 92.00
gpio_sec_cm 1.370s 425.296us 5 5 100.00
sec_cm_bus_integrity 23 25 92.00
gpio_tl_intg_err 3.780s 774.526us 23 25 92.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 9 10 90.00
gpio_rand_straps 0.950s 17.082us 9 10 90.00
stress_all_with_rand_reset 0 10 0.00
gpio_stress_all_with_rand_reset 19.400s 878.852us 0 10 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 50 50 100.00
gpio_inp_prd_cnt 0.970s 13.230us 50 50 100.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:243) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 10 test runs
gpio_stress_all 2227243496132212219970649769495409526089240049193990896639195437421435057688 1731
UVM_INFO @ 23910327331 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 57463063483212483102952227908431556420983266782022720528451849424013502308573 1163
UVM_INFO @ 1218947272 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 25913956817888508894330621686565341301396382089682073978254985233451004777916 851
UVM_INFO @ 10950128543 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 18336591500661094074060098538544660700444494918388888572928005149601083821422 268
UVM_INFO @ 1669489997 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 92528380303566749204588190341926359542900300893990591108168914720022876503350 674
UVM_INFO @ 3112426267 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 80367172418920652732671021389874961167571912082202855066487330103251466709852 84
UVM_INFO @ 628826682 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 36977691244121011978010760803442990962348834612963143778211957029210399292049 685
UVM_INFO @ 1755970601 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 65137201637492265799109676496340511299029465288717915294955461696525733592335 81
UVM_INFO @ 2299912 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 6596999822646850650561713710886552834673922512368165231262437592101530704315 319
UVM_INFO @ 1153010849 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 16530728714003658054082619357976764755671287238579621828460267386448443089995 1137
UVM_INFO @ 10942665808 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1230) [gpio_common_vseq] Check failed (vseq_done) 5 test runs
gpio_stress_all_with_rand_reset 14265636913227222806333296561049861428970758325834269190756658785134196841496 86
UVM_INFO @ 16815994 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 36181362768236868407303056282267985069414205848336445567209519635233716877961 277
UVM_INFO @ 2109001993 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 63552984418452933498914333872560789082727860747717503557482666423235554907487 86
UVM_INFO @ 64151677 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 50487995718360352212763707559742603991179890276602087089549394974601798497856 86
UVM_INFO @ 60385154 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 77953695886895103639350863320167280666645363120905646437710651184304420378586 86
UVM_INFO @ 10235300 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -* 5 test runs
gpio_stress_all_with_rand_reset 1336884988159044480189857167818831448291521283190067507898200212542715187135 278
UVM_INFO @ 878851915 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 86641612496304150258788701611955551330537891384007631397432665810787282195590 84
UVM_INFO @ 1246672 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 79974501198093256325552808222382530004848309804607168919438605299792186721488 84
UVM_INFO @ 7716815 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 69743919601764779017562860865069105689357801916543861248727076906676196391002 84
UVM_INFO @ 9127357 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 45326644833001161907751673549107825035635735326626323560926347476219718787708 164
UVM_INFO @ 574933849 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:461) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: gpio_reg_block.inp_prd_cnt_val_* reset value: * 1 test run
gpio_tl_intg_err 95297157821066092604061163425677902424811702482669046345722682396664775840604 144
UVM_INFO @ 23920142 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:461) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: gpio_reg_block.inp_prd_cnt_ctrl_*.enable reset value: * 1 test run
gpio_tl_intg_err 60726074714445409938190885293130252954267434322236703075421238569639371801699 177
UVM_INFO @ 444760044 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---