| V1 |
|
100.00% |
| V2 |
|
98.37% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| xbar_smoke | 20 | 20 | 100.00 | |||
| xbar_smoke | 19.780s | 1761.821us | 20 | 20 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| xbar_base_random_sequence | 20 | 20 | 100.00 | |||
| xbar_random | 217.130s | 42019.977us | 20 | 20 | 100.00 | |
| xbar_random_delay | 118 | 120 | 98.33 | |||
| xbar_smoke_zero_delays | 7.650s | 51.657us | 20 | 20 | 100.00 | |
| xbar_smoke_large_delays | 283.340s | 22447.164us | 20 | 20 | 100.00 | |
| xbar_smoke_slow_rsp | 367.260s | 39422.716us | 20 | 20 | 100.00 | |
| xbar_random_zero_delays | 87.150s | 408.807us | 20 | 20 | 100.00 | |
| xbar_random_large_delays | 1602.680s | 233051.117us | 19 | 20 | 95.00 | |
| xbar_random_slow_rsp | 1867.250s | 178994.932us | 19 | 20 | 95.00 | |
| xbar_unmapped_address | 40 | 40 | 100.00 | |||
| xbar_unmapped_addr | 149.330s | 15214.898us | 20 | 20 | 100.00 | |
| xbar_error_and_unmapped_addr | 90.080s | 7361.209us | 20 | 20 | 100.00 | |
| xbar_error_cases | 40 | 40 | 100.00 | |||
| xbar_error_random | 208.030s | 12060.161us | 20 | 20 | 100.00 | |
| xbar_error_and_unmapped_addr | 90.080s | 7361.209us | 20 | 20 | 100.00 | |
| xbar_all_access_same_device | 65 | 70 | 92.86 | |||
| xbar_access_same_device | 384.980s | 10377.347us | 20 | 20 | 100.00 | |
| xbar_access_same_device_slow_rsp | 2887.180s | 361399.750us | 45 | 50 | 90.00 | |
| xbar_all_hosts_use_same_source_id | 20 | 20 | 100.00 | |||
| xbar_same_source | 177.810s | 11238.818us | 20 | 20 | 100.00 | |
| xbar_stress_all | 70 | 70 | 100.00 | |||
| xbar_stress_all | 1779.990s | 39262.005us | 20 | 20 | 100.00 | |
| xbar_stress_all_with_error | 1107.260s | 43452.439us | 50 | 50 | 100.00 | |
| xbar_stress_with_reset | 70 | 70 | 100.00 | |||
| xbar_stress_all_with_rand_reset | 1329.020s | 13020.391us | 20 | 20 | 100.00 | |
| xbar_stress_all_with_reset_error | 1312.910s | 25437.300us | 50 | 50 | 100.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue | 7 test runs | |||
| xbar_random_slow_rsp | 69986167033534377906624321546096986977946312473541265443833816340604160250578 | 197 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_random_large_delays | 95790457955204634065531603412029917332962362566903082100960975859456286235603 | 167 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 101156164295821320830054828264077498932812615532876085345735272460872307208137 | 149 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 72970112139497538576367349315619370303440954555257444999816927574525047208184 | 122 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 7989171842175152032888737371611034502515648502903774946452464258340737192453 | 122 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 69027811743139147339706385596826511320981066097613428656667991813535514839742 | 152 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 49197133324873688915466487410917330823653953297829394485109500760465026604304 | 182 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|