Simulation Results: aes/masked

 
22/03/2026 00:11:46 DVSim: v1.16.0 sha: 2a81083 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 97.27 %
  • code
  • 98.12 %
  • assert
  • 98.57 %
  • func
  • 95.11 %
  • block
  • 98.23 %
  • line
  • 99.35 %
  • branch
  • 95.09 %
  • toggle
  • 98.05 %
  • FSM
  • 100.00 %
Validation stages
V1
100.00%
V2
100.00%
V2S
96.58%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 2.000s 0.000us 1 1 100.00
smoke 50 50 100.00
aes_smoke 12.000s 0.000us 50 50 100.00
csr_hw_reset 5 5 100.00
aes_csr_hw_reset 2.000s 0.000us 5 5 100.00
csr_rw 20 20 100.00
aes_csr_rw 3.000s 0.000us 20 20 100.00
csr_bit_bash 5 5 100.00
aes_csr_bit_bash 7.000s 0.000us 5 5 100.00
csr_aliasing 5 5 100.00
aes_csr_aliasing 3.000s 0.000us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
aes_csr_mem_rw_with_rand_reset 2.000s 0.000us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
aes_csr_rw 3.000s 0.000us 20 20 100.00
aes_csr_aliasing 3.000s 0.000us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 150 150 100.00
aes_smoke 12.000s 0.000us 50 50 100.00
aes_config_error 16.000s 0.000us 50 50 100.00
aes_stress 10.000s 0.000us 50 50 100.00
key_length 150 150 100.00
aes_smoke 12.000s 0.000us 50 50 100.00
aes_config_error 16.000s 0.000us 50 50 100.00
aes_stress 10.000s 0.000us 50 50 100.00
back2back 100 100 100.00
aes_stress 10.000s 0.000us 50 50 100.00
aes_b2b 44.000s 0.000us 50 50 100.00
backpressure 50 50 100.00
aes_stress 10.000s 0.000us 50 50 100.00
multi_message 200 200 100.00
aes_smoke 12.000s 0.000us 50 50 100.00
aes_config_error 16.000s 0.000us 50 50 100.00
aes_stress 10.000s 0.000us 50 50 100.00
aes_alert_reset 11.000s 0.000us 50 50 100.00
failure_test 150 150 100.00
aes_man_cfg_err 4.000s 0.000us 50 50 100.00
aes_config_error 16.000s 0.000us 50 50 100.00
aes_alert_reset 11.000s 0.000us 50 50 100.00
trigger_clear_test 50 50 100.00
aes_clear 24.000s 0.000us 50 50 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 10.000s 0.000us 1 1 100.00
nist_test_vectors_gcm 1 1 100.00
aes_nist_vectors_gcm 9.000s 0.000us 1 1 100.00
reset_recovery 50 50 100.00
aes_alert_reset 11.000s 0.000us 50 50 100.00
stress 50 50 100.00
aes_stress 10.000s 0.000us 50 50 100.00
sideload 100 100 100.00
aes_stress 10.000s 0.000us 50 50 100.00
aes_sideload 19.000s 0.000us 50 50 100.00
deinitialization 50 50 100.00
aes_deinit 10.000s 0.000us 50 50 100.00
stress_all 10 10 100.00
aes_stress_all 215.000s 0.000us 10 10 100.00
gcm_save_and_restore 100 100 100.00
aes_gcm_save_restore 16.000s 0.000us 100 100 100.00
alert_test 50 50 100.00
aes_alert_test 4.000s 0.000us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
aes_tl_errors 4.000s 0.000us 20 20 100.00
tl_d_illegal_access 20 20 100.00
aes_tl_errors 4.000s 0.000us 20 20 100.00
tl_d_outstanding_access 50 50 100.00
aes_csr_hw_reset 2.000s 0.000us 5 5 100.00
aes_csr_rw 3.000s 0.000us 20 20 100.00
aes_csr_aliasing 3.000s 0.000us 5 5 100.00
aes_same_csr_outstanding 8.000s 0.000us 20 20 100.00
tl_d_partial_access 50 50 100.00
aes_csr_hw_reset 2.000s 0.000us 5 5 100.00
aes_csr_rw 3.000s 0.000us 20 20 100.00
aes_csr_aliasing 3.000s 0.000us 5 5 100.00
aes_same_csr_outstanding 8.000s 0.000us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 50 50 100.00
aes_reseed 13.000s 0.000us 50 50 100.00
fault_inject 669 700 95.57
aes_fi 13.000s 0.000us 50 50 100.00
aes_control_fi 57.000s 0.000us 285 300 95.00
aes_cipher_fi 56.000s 0.000us 334 350 95.43
shadow_reg_update_error 20 20 100.00
aes_shadow_reg_errors 4.000s 0.000us 20 20 100.00
shadow_reg_read_clear_staged_value 20 20 100.00
aes_shadow_reg_errors 4.000s 0.000us 20 20 100.00
shadow_reg_storage_error 20 20 100.00
aes_shadow_reg_errors 4.000s 0.000us 20 20 100.00
shadowed_reset_glitch 20 20 100.00
aes_shadow_reg_errors 4.000s 0.000us 20 20 100.00
shadow_reg_update_error_with_csr_rw 20 20 100.00
aes_shadow_reg_errors_with_csr_rw 6.000s 0.000us 20 20 100.00
tl_intg_err 25 25 100.00
aes_tl_intg_err 4.000s 0.000us 20 20 100.00
aes_sec_cm 10.000s 0.000us 5 5 100.00
sec_cm_bus_integrity 20 20 100.00
aes_tl_intg_err 4.000s 0.000us 20 20 100.00
sec_cm_lc_escalate_en_intersig_mubi 50 50 100.00
aes_alert_reset 11.000s 0.000us 50 50 100.00
sec_cm_main_config_shadow 20 20 100.00
aes_shadow_reg_errors 4.000s 0.000us 20 20 100.00
sec_cm_gcm_config_shadow 20 20 100.00
aes_shadow_reg_errors 4.000s 0.000us 20 20 100.00
sec_cm_main_config_sparse 215 220 97.73
aes_smoke 12.000s 0.000us 50 50 100.00
aes_stress 10.000s 0.000us 50 50 100.00
aes_alert_reset 11.000s 0.000us 50 50 100.00
aes_core_fi 723.000s 0.000us 65 70 92.86
sec_cm_gcm_config_sparse 265 270 98.15
aes_gcm_save_restore 16.000s 0.000us 100 100 100.00
aes_config_error 16.000s 0.000us 50 50 100.00
aes_stress 10.000s 0.000us 50 50 100.00
aes_core_fi 723.000s 0.000us 65 70 92.86
sec_cm_aux_config_shadow 20 20 100.00
aes_shadow_reg_errors 4.000s 0.000us 20 20 100.00
sec_cm_aux_config_regwen 100 100 100.00
aes_readability 4.000s 0.000us 50 50 100.00
aes_stress 10.000s 0.000us 50 50 100.00
sec_cm_key_sideload 100 100 100.00
aes_stress 10.000s 0.000us 50 50 100.00
aes_sideload 19.000s 0.000us 50 50 100.00
sec_cm_key_sw_unreadable 50 50 100.00
aes_readability 4.000s 0.000us 50 50 100.00
sec_cm_data_reg_sw_unreadable 50 50 100.00
aes_readability 4.000s 0.000us 50 50 100.00
sec_cm_key_sec_wipe 50 50 100.00
aes_readability 4.000s 0.000us 50 50 100.00
sec_cm_iv_config_sec_wipe 50 50 100.00
aes_readability 4.000s 0.000us 50 50 100.00
sec_cm_data_reg_sec_wipe 50 50 100.00
aes_readability 4.000s 0.000us 50 50 100.00
sec_cm_data_reg_key_sca 50 50 100.00
aes_stress 10.000s 0.000us 50 50 100.00
sec_cm_key_masking 50 50 100.00
aes_stress 10.000s 0.000us 50 50 100.00
sec_cm_main_fsm_sparse 50 50 100.00
aes_fi 13.000s 0.000us 50 50 100.00
sec_cm_main_fsm_redun 719 750 95.87
aes_fi 13.000s 0.000us 50 50 100.00
aes_control_fi 57.000s 0.000us 285 300 95.00
aes_cipher_fi 56.000s 0.000us 334 350 95.43
aes_ctr_fi 5.000s 0.000us 50 50 100.00
sec_cm_cipher_fsm_sparse 50 50 100.00
aes_fi 13.000s 0.000us 50 50 100.00
sec_cm_cipher_fsm_redun 669 700 95.57
aes_fi 13.000s 0.000us 50 50 100.00
aes_control_fi 57.000s 0.000us 285 300 95.00
aes_cipher_fi 56.000s 0.000us 334 350 95.43
sec_cm_cipher_ctr_redun 334 350 95.43
aes_cipher_fi 56.000s 0.000us 334 350 95.43
sec_cm_ctr_fsm_sparse 50 50 100.00
aes_fi 13.000s 0.000us 50 50 100.00
sec_cm_ctr_fsm_redun 385 400 96.25
aes_fi 13.000s 0.000us 50 50 100.00
aes_control_fi 57.000s 0.000us 285 300 95.00
aes_ctr_fi 5.000s 0.000us 50 50 100.00
sec_cm_ghash_fsm_sparse 50 50 100.00
aes_fi 13.000s 0.000us 50 50 100.00
sec_cm_ctrl_sparse 719 750 95.87
aes_fi 13.000s 0.000us 50 50 100.00
aes_control_fi 57.000s 0.000us 285 300 95.00
aes_cipher_fi 56.000s 0.000us 334 350 95.43
aes_ctr_fi 5.000s 0.000us 50 50 100.00
sec_cm_main_fsm_global_esc 50 50 100.00
aes_alert_reset 11.000s 0.000us 50 50 100.00
sec_cm_main_fsm_local_esc 719 750 95.87
aes_fi 13.000s 0.000us 50 50 100.00
aes_control_fi 57.000s 0.000us 285 300 95.00
aes_cipher_fi 56.000s 0.000us 334 350 95.43
aes_ctr_fi 5.000s 0.000us 50 50 100.00
sec_cm_cipher_fsm_local_esc 719 750 95.87
aes_fi 13.000s 0.000us 50 50 100.00
aes_control_fi 57.000s 0.000us 285 300 95.00
aes_cipher_fi 56.000s 0.000us 334 350 95.43
aes_ctr_fi 5.000s 0.000us 50 50 100.00
sec_cm_ctr_fsm_local_esc 385 400 96.25
aes_fi 13.000s 0.000us 50 50 100.00
aes_control_fi 57.000s 0.000us 285 300 95.00
aes_ctr_fi 5.000s 0.000us 50 50 100.00
sec_cm_ghash_fsm_local_esc 140 140 100.00
aes_fi 13.000s 0.000us 50 50 100.00
aes_ghash_fi 7.000s 0.000us 90 90 100.00
sec_cm_data_reg_local_esc 669 700 95.57
aes_fi 13.000s 0.000us 50 50 100.00
aes_control_fi 57.000s 0.000us 285 300 95.00
aes_cipher_fi 56.000s 0.000us 334 350 95.43
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 10 0.00
aes_stress_all_with_rand_reset 66.000s 0.000us 0 10 0.00

Error Messages

   Test seed line log context
Job timed out after * minutes
aes_control_fi 738163862799348861593468979683918348168161682392172621089193815325157778684 None
Job timed out after 1 minutes
aes_control_fi 111188276188455587097817339191233163983958163741162995185868346105965333253663 None
Job timed out after 1 minutes
aes_control_fi 25599436754637852838168966181539298966956328556278743735782142907289848579234 None
Job timed out after 1 minutes
aes_control_fi 26801403888308025079694233530465105929871801478817625720469607490226849490698 None
Job timed out after 1 minutes
aes_control_fi 111216410597147825103402207897856694253673208399617310844654633225222163962365 None
Job timed out after 1 minutes
aes_control_fi 93925114102425415977614426949997137112021778684703478026515050921226682397229 None
Job timed out after 1 minutes
aes_control_fi 61120602712470848776733414857170454317941546564786511012893965425551354153539 None
Job timed out after 1 minutes
aes_control_fi 7112454842528065795242078447730238827479886975655349973381070093093855516249 None
Job timed out after 1 minutes
aes_cipher_fi 86241535929384068056539346822319968073684178244211269015448767053381050367006 None
Job timed out after 1 minutes
aes_cipher_fi 18826252641886243770796385583145409521750603856272031750318972567843574663500 None
Job timed out after 1 minutes
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
aes_stress_all_with_rand_reset 94890668863321833063768670020171778055093265212176600620113796327309732563281 362
UVM_ERROR @ 1641575132 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 1641575132 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 78651589651246767885685738133252044684259720963652103814925110777632394458988 1729
UVM_ERROR @ 2411133779 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 2411133779 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 107913817422277274352561364086665285674167171303001050914401906830376951802326 176
UVM_ERROR @ 25380665 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 25380665 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 104694541712929293406176219739681867833176607759251580134674871413704702938238 365
UVM_ERROR @ 639268774 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 639268774 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 60038996955599480318687060207919612234844012238264067619904848374679900140915 287
UVM_ERROR @ 535545133 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 535545133 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 77988388319221228405932711663712234805220551025330950152548500221873505126396 398
UVM_ERROR @ 246411994 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 246411994 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 74231001950053939936247558056931340420981628787119185524401303729683168715165 843
UVM_ERROR @ 886927420 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 886927420 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1237) [aes_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.
aes_stress_all_with_rand_reset 51708356966998901864539304575193577629934281874518454362473425011303744172583 567
UVM_ERROR @ 8342348947 ps: (cip_base_vseq.sv:1237) [uvm_test_top.env.virtual_sequencer.aes_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 8342348947 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 14065924618066287610027026497702427948788256361149051677096945387248747930370 675
UVM_ERROR @ 1877765587 ps: (cip_base_vseq.sv:1237) [uvm_test_top.env.virtual_sequencer.aes_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 1877765587 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_core_fi_vseq.sv:70) [aes_core_fi_vseq] wait timeout occurred!
aes_core_fi 49834773007939482334309906733872261755393969647715552577979345164965570146567 146
UVM_FATAL @ 10004883163 ps: (aes_core_fi_vseq.sv:70) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10004883163 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 11854033111647216179930314586795768614797469339925363892371326607707727186479 142
UVM_FATAL @ 10012286229 ps: (aes_core_fi_vseq.sv:70) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10012286229 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 71217836736133219269577427650644722476927374853394954424093010143716107307417 154
UVM_FATAL @ 10030677165 ps: (aes_core_fi_vseq.sv:70) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10030677165 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 56875083074196704873882259808262008849602874516770935124012049315796567373502 150
UVM_FATAL @ 10044971035 ps: (aes_core_fi_vseq.sv:70) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10044971035 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_base_vseq.sv:75) [aes_alert_reset_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed)
aes_stress_all_with_rand_reset 92817620510078770926205388275311341395610477352340495348817513261838093826054 866
UVM_FATAL @ 1607693272 ps: (aes_base_vseq.sv:75) [uvm_test_top.env.virtual_sequencer.aes_alert_reset_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 1607693272 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred!
aes_cipher_fi 93811050686885464518546946333625031318131750683625234176979959197035676085993 157
UVM_FATAL @ 10003998713 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10003998713 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 89191067978995345009371096080996737069333657376897667502866711350421868431293 149
UVM_FATAL @ 10022959527 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10022959527 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 79127296944095516460976333912781522588143362912490255010094207089057424891604 159
UVM_FATAL @ 10045438114 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10045438114 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 68346496840620837931445905866618846257948699536263620063592811529231747950532 140
UVM_FATAL @ 10008393819 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10008393819 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 104679513614483706794017395726795459803783149551093448572010791603588945414233 151
UVM_FATAL @ 10019863880 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10019863880 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 51714774467762092978415669885861628744217524550905405077225128132033426553817 154
UVM_FATAL @ 10021936334 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10021936334 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 64266140774900118590400387706807540380451658434601759606470158398223684325010 157
UVM_FATAL @ 10055903847 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10055903847 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 102302271339468636271159999210200030115273024270661229576111093295810209834994 150
UVM_FATAL @ 10009547289 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10009547289 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 29122158743311555384842583509007463448829598994843244604664650441491913592575 157
UVM_FATAL @ 10018108415 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10018108415 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 17887860545407165720634922219023189703830628414092232548285464672845735016766 147
UVM_FATAL @ 10018258972 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10018258972 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 108864883301265979066477377131011189755094311219614253339355482626298093357954 148
UVM_FATAL @ 10019015460 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10019015460 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 6300531854684169830782857284868082704060383251870935081639651630809276280864 161
UVM_FATAL @ 10008688987 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10008688987 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 55244791148985194122520702770547804140546975177806777273514368764915748057952 152
UVM_FATAL @ 10028938124 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10028938124 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred!
aes_control_fi 32154397758028450856835839814682622312746683028567224329203855684337083018735 142
UVM_FATAL @ 10015135918 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10015135918 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 87381606987327016599861097889866977504124968730548946035705217794147271524220 149
UVM_FATAL @ 10013474084 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10013474084 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 13462245825666469131258197687792577603388724282277078775829183949333798224543 149
UVM_FATAL @ 10015807413 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10015807413 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 21145405793151114777937766577165949921721752446299924737543017447217205763179 155
UVM_FATAL @ 10049717822 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10049717822 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 25008843459728690855343689498418461930466189292713251377835898999159422069925 146
UVM_FATAL @ 10010573459 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10010573459 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 40591194077843976812216745508941426527884226523624434100627831934354957217375 147
UVM_FATAL @ 10020748201 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10020748201 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 99895881417068577151334863727029846051452615982915692079710018698694275405036 150
UVM_FATAL @ 10010255406 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10010255406 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue
aes_core_fi 23146650482417717322644625635414259791680231099369182456044993647711038196419 155
UVM_FATAL @ 200000000000 ps: (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of 200000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_*/rtl/aes_core.sv,1142): Assertion AesSecCmDataRegLocalEscIv has failed (* cycles, starting * PS)
aes_cipher_fi 41609089226190229271572618282473381882487373280698711305516081219144654138641 146
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_core.sv,1142): (time 8916879 PS) Assertion tb.dut.u_aes_core.AesSecCmDataRegLocalEscIv has failed (2 cycles, starting 8906675 PS)
UVM_ERROR @ 8916879 ps: (aes_core.sv:1142) [ASSERT FAILED] AesSecCmDataRegLocalEscIv
UVM_INFO @ 8916879 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---