Simulation Results: gpio

 
29/03/2026 00:12:07 DVSim: v1.16.0 sha: 34fa6f9 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 98.37 %
  • code
  • 98.27 %
  • assert
  • 96.84 %
  • func
  • 100.00 %
  • line
  • 99.76 %
  • branch
  • 99.80 %
  • cond
  • 99.57 %
  • toggle
  • 93.94 %
Validation stages
V1
100.00%
V2
94.32%
V2S
100.00%
V3
42.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 200 200 100.00
gpio_smoke 1.730s 0.000us 50 50 100.00
gpio_smoke_no_pullup_pulldown 1.840s 0.000us 50 50 100.00
gpio_smoke_en_cdc_prim 1.390s 0.000us 50 50 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.460s 0.000us 50 50 100.00
csr_hw_reset 5 5 100.00
gpio_csr_hw_reset 0.940s 0.000us 5 5 100.00
csr_rw 20 20 100.00
gpio_csr_rw 0.900s 0.000us 20 20 100.00
csr_bit_bash 5 5 100.00
gpio_csr_bit_bash 2.480s 0.000us 5 5 100.00
csr_aliasing 5 5 100.00
gpio_csr_aliasing 0.790s 0.000us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
gpio_csr_mem_rw_with_rand_reset 1.520s 0.000us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
gpio_csr_rw 0.900s 0.000us 20 20 100.00
gpio_csr_aliasing 0.790s 0.000us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 100 100 100.00
gpio_random_dout_din 1.590s 0.000us 50 50 100.00
gpio_random_dout_din_no_pullup_pulldown 1.760s 0.000us 50 50 100.00
out_in_regs_read_write 50 50 100.00
gpio_dout_din_regs_random_rw 1.330s 0.000us 50 50 100.00
gpio_interrupt_programming 50 50 100.00
gpio_intr_rand_pgm 1.790s 0.000us 50 50 100.00
random_interrupt_trigger 50 50 100.00
gpio_rand_intr_trigger 4.020s 0.000us 50 50 100.00
interrupt_and_noise_filter 50 50 100.00
gpio_intr_with_filter_rand_intr_event 4.260s 0.000us 50 50 100.00
noise_filter_stress 50 50 100.00
gpio_filter_stress 26.750s 0.000us 50 50 100.00
regs_long_reads_and_writes 50 50 100.00
gpio_random_long_reg_writes_reg_reads 6.410s 0.000us 50 50 100.00
full_random 50 50 100.00
gpio_full_random 1.400s 0.000us 50 50 100.00
stress_all 8 50 16.00
gpio_stress_all 88.140s 0.000us 8 50 16.00
alert_test 50 50 100.00
gpio_alert_test 0.910s 0.000us 50 50 100.00
intr_test 50 50 100.00
gpio_intr_test 0.850s 0.000us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
gpio_tl_errors 2.390s 0.000us 20 20 100.00
tl_d_illegal_access 20 20 100.00
gpio_tl_errors 2.390s 0.000us 20 20 100.00
tl_d_outstanding_access 50 50 100.00
gpio_csr_rw 0.900s 0.000us 20 20 100.00
gpio_same_csr_outstanding 1.010s 0.000us 20 20 100.00
gpio_csr_aliasing 0.790s 0.000us 5 5 100.00
gpio_csr_hw_reset 0.940s 0.000us 5 5 100.00
tl_d_partial_access 50 50 100.00
gpio_csr_rw 0.900s 0.000us 20 20 100.00
gpio_same_csr_outstanding 1.010s 0.000us 20 20 100.00
gpio_csr_aliasing 0.790s 0.000us 5 5 100.00
gpio_csr_hw_reset 0.940s 0.000us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 25 25 100.00
gpio_sec_cm 1.360s 0.000us 5 5 100.00
gpio_tl_intg_err 1.680s 0.000us 20 20 100.00
sec_cm_bus_integrity 20 20 100.00
gpio_tl_intg_err 1.680s 0.000us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 42 50 84.00
gpio_rand_straps 0.920s 0.000us 42 50 84.00
stress_all_with_rand_reset 0 50 0.00
gpio_stress_all_with_rand_reset 21.950s 0.000us 0 50 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:216) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*])
gpio_stress_all 45371457036840775818376609244251071077871387931829822077428988567940468229425 1360
UVM_ERROR @ 4912609608 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3336006315 [0xc6d76aab] vs 4143718784 [0xf6fc2180])
UVM_INFO @ 4912609608 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 17820295905266772439393125089913775992935539194356748371372622104982662525184 1533
UVM_ERROR @ 75259854293 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3345263980 [0xc764ad6c] vs 2186486257 [0x825321f1])
UVM_INFO @ 75259854293 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 35302824680224745288383139135132686771109206584930873494028906003336659443323 1214
UVM_ERROR @ 2892946783 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1119845088 [0x42bf7ae0])
UVM_INFO @ 2892946783 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 48408369088709457687672026699651152504497800133030428389045371800599144257905 2015
UVM_ERROR @ 13206954903 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1980319574 [0x76094756] vs 1926283096 [0x72d0bf58])
UVM_INFO @ 13206954903 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 19283398776229512381407819988291345359522612880117030156137372440750798369073 1909
UVM_ERROR @ 2808716313 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3643074686 [0xd924e87e])
UVM_INFO @ 2808716313 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 45124000104946488280355921995466772770416548074827013196647300631600213954701 290
UVM_ERROR @ 7683114257 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3951380742 [0xeb854906] vs 370655191 [0x1617bfd7])
UVM_INFO @ 7683114257 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 86283503203514010347882046905540784237068068180295147161051021180641542467598 662
UVM_ERROR @ 2053387355 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3086900734 [0xb7fe5dfe] vs 632348303 [0x25b0de8f])
UVM_INFO @ 2053387355 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 53616345622377432526007348205682855659689388752874569283283995798850671738724 75
UVM_ERROR @ 7415082 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1627087829 [0x60fb63d5])
UVM_INFO @ 7415082 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 67967974619389779809049574447905159562995632262960554316994561393531162391625 898
UVM_ERROR @ 1750721696 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1503000473 [0x5995f799] vs 3006208077 [0xb32f184d])
UVM_INFO @ 1750721696 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 111712239143304525314707182035873585543805067711726949677640443014165110813641 206
UVM_ERROR @ 934477942 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (977542903 [0x3a441ef7] vs 1313981158 [0x4e51c2e6])
UVM_INFO @ 934477942 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 95160356593765984787293666144754804016950614153235757520262559804975851375945 75
UVM_ERROR @ 2206697 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 2193967764 [0x82c54a94])
UVM_INFO @ 2206697 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 62351650928892375986930635400903605300518535333906079505837243678199688395422 849
UVM_ERROR @ 2177960604 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1582037968 [0x5e4bfbd0])
UVM_INFO @ 2177960604 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 35711122094272900796385109020903512576155168485430067178236550029522752902504 75
UVM_ERROR @ 1209522 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1424100987 [0x54e20e7b])
UVM_INFO @ 1209522 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 89790958828210402199135260612752521498973094861114856199721253973099011521286 2047
UVM_ERROR @ 22560222652 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3706863732 [0xdcf24074])
UVM_INFO @ 22560222652 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 52945696540665190443027242834511869797205701093389618321479053551515572291847 594
UVM_ERROR @ 7054832849 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2462328763 [0x92c427bb] vs 2532373955 [0x96f0f5c3])
UVM_INFO @ 7054832849 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 84773872315980591156584164905012198170821890681390031403540332607852222183167 1268
UVM_ERROR @ 18906217159 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3348861974 [0xc79b9416])
UVM_INFO @ 18906217159 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 4964732341055040586411010877974205819133106069295184338860913155949492352085 265
UVM_ERROR @ 6590754732 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3249740564 [0xc1b31b14] vs 1604493424 [0x5fa2a070])
UVM_INFO @ 6590754732 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 109884018624209952755350188525647802449761917043012395999711113058559672628973 2490
UVM_ERROR @ 19695889802 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4083636234 [0xf367580a] vs 270988442 [0x1026f49a])
UVM_INFO @ 19695889802 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 72893708437738473855887814917102124462690960704842390383012548293170507877324 507
UVM_ERROR @ 1595410199 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3703235231 [0xdcbae29f])
UVM_INFO @ 1595410199 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 61123470711453837681889554948494774271595427079725675704687362617761655685627 472
UVM_ERROR @ 3395113499 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2581755302 [0x99e275a6])
UVM_INFO @ 3395113499 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 98730380125439173539838919245891901970698938951641178796667360267834516625093 1102
UVM_ERROR @ 1169206510 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1608774569 [0x5fe3f3a9] vs 2059610780 [0x7ac32a9c])
UVM_INFO @ 1169206510 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 23139380438039311295007674464560317658416114138347810730919185492841919029219 411
UVM_ERROR @ 14823962600 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 4062267471 [0xf221484f])
UVM_INFO @ 14823962600 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 80669758460399259297466558741529211169645839320846581137437378968330397914560 1271
UVM_ERROR @ 35453748198 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2696685003 [0xa0bc25cb])
UVM_INFO @ 35453748198 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 99913896683865635655813449480084732304420489956926299790675774312213184476172 1182
UVM_ERROR @ 974734693 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3373689956 [0xc9166c64])
UVM_INFO @ 974734693 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 91965486950327935215802396096979176099540758392854273131086847861401049654793 75
UVM_ERROR @ 2265147 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1748882085 [0x683dd2a5])
UVM_INFO @ 2265147 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 13252503659540438003694446132143396975008540862331850165872913235880490043065 903
UVM_ERROR @ 2932471669 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2247869557 [0x85fbc475] vs 1020585957 [0x3cd4e7e5])
UVM_INFO @ 2932471669 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 69612232061701370640594036489849988136380473696661647496172451608807489179831 77
UVM_ERROR @ 59437140 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 706821684 [0x2a213e34])
UVM_INFO @ 59437140 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 25054387963552758937045442266625122364353041456241195077735872583028760286607 822
UVM_ERROR @ 3843776949 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4268343769 [0xfe69c1d9])
UVM_INFO @ 3843776949 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 8030339499925432322492851371221008596899248674371212008770312699996362767573 366
UVM_ERROR @ 4839431528 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1509760385 [0x59fd1d81] vs 333548034 [0x13e18a02])
UVM_INFO @ 4839431528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 55710779366050758694806400188536858898838796099029253354004222936104125468122 83
UVM_ERROR @ 365889160 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 582145612 [0x22b2d64c])
UVM_INFO @ 365889160 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 79708867559286583472782590762777154156997404956931793071775145932423767829392 2034
UVM_ERROR @ 7304656930 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1043070490 [0x3e2bfe1a])
UVM_INFO @ 7304656930 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 35528581650792508261060642394078025458547516310088571609051567042912556428129 436
UVM_ERROR @ 3304226946 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 194824986 [0xb9ccb1a])
UVM_INFO @ 3304226946 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 94042246366963278166040541632898242017194287611003709520974361781986929576569 75
UVM_ERROR @ 1617141 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 568989839 [0x21ea188f])
UVM_INFO @ 1617141 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 21483910434199265181400738188188019369830252106965903157943211018213294949120 539
UVM_ERROR @ 7893912484 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (932384194 [0x37930dc2] vs 448056810 [0x1ab4cdea])
UVM_INFO @ 7893912484 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 7789191766159635462639149399339448562769831941172309814288955819695496613044 952
UVM_ERROR @ 3922515177 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3405777134 [0xcb0008ee])
UVM_INFO @ 3922515177 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 67013229397534616338985083895493342915140933134530288856197175539863465089747 1037
UVM_ERROR @ 10317526432 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3348460867 [0xc7957543] vs 2829024740 [0xa89f7de4])
UVM_INFO @ 10317526432 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 63925995310826421108243510177405937643053014412415761719639455546611736719442 342
UVM_ERROR @ 645913779 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (888771286 [0x34f992d6] vs 2105701780 [0x7d827594])
UVM_INFO @ 645913779 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 72599341844957255402780322432747080468539359525764318559528003283988315141546 1008
UVM_ERROR @ 2102738250 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3701888995 [0xdca657e3])
UVM_INFO @ 2102738250 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 72485561264459052470812215401036297400510052317679264905380608777025378737461 919
UVM_ERROR @ 1599938097 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3028142195 [0xb47dc873] vs 2627124734 [0x9c96bdfe])
UVM_INFO @ 1599938097 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 14775456587119478744218402453421501004435348783820388259379988260221158904741 75
UVM_ERROR @ 15796609 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 2285451116 [0x8839376c])
UVM_INFO @ 15796609 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 19224770488066083625026529288800541039667955886267145110853096830308775804957 441
UVM_ERROR @ 1861123616 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3242884214 [0xc14a7c76])
UVM_INFO @ 1861123616 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 59505227646471400460588584627825006772306508515392996119345517294428017552891 75
UVM_ERROR @ 5588958 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 283655377 [0x10e83cd1])
UVM_INFO @ 5588958 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 101077667337321572511733771298636342373366407466700262882368696890308533574738 612
UVM_ERROR @ 23457353200 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4131998789 [0xf6494c45] vs 749430702 [0x2cab67ae])
UVM_INFO @ 23457353200 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 107376577598293497036754707769184897693952866439090548316029362930167609253470 1069
UVM_ERROR @ 4650744352 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1715649421 [0x6642bb8d] vs 2838305612 [0xa92d1b4c])
UVM_INFO @ 4650744352 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 78127910104647924834014209763346988970579608625004696783683036104725566875200 75
UVM_ERROR @ 2350783 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3962454664 [0xec2e4288])
UVM_INFO @ 2350783 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 2353010754266462766156625604893158471371081025877518333834351831171391181977 348
UVM_ERROR @ 2320477260 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2647506060 [0x9dcdbc8c] vs 1363239929 [0x514163f9])
UVM_INFO @ 2320477260 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 95749913646975551436383872568616361316728627145054732882120622853805813479381 540
UVM_ERROR @ 7345347648 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1668208211 [0x636ed653] vs 2723979917 [0xa25ca28d])
UVM_INFO @ 7345347648 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 111079418315299628942539704320320289917574983578808182186622501005221503865029 345
UVM_ERROR @ 853787238 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 4109974244 [0xf4f93ae4])
UVM_INFO @ 853787238 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 79682063913286951361657786448781030660860922728500137204329266417583733452841 103
UVM_ERROR @ 1030854654 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1806802307 [0x6bb19d83])
UVM_INFO @ 1030854654 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 80983767282662494586186421751482598037912850448581882595561003951509972975856 221
UVM_ERROR @ 739646484 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3356003298 [0xc8088be2] vs 1252370596 [0x4aa5a8a4])
UVM_INFO @ 739646484 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1170) [gpio_common_vseq] Check failed (vseq_done)
gpio_stress_all_with_rand_reset 56468194106726901414968443216606488508353845123344632692508621996246178288507 80
UVM_FATAL @ 5452332 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 5452332 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 43558277590334242012481162105955766846072107055012946645722932971398297447234 86
UVM_FATAL @ 487989181 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 487989181 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 112440506756670569804131380881011400652559549250059593692055617698174361605627 80
UVM_FATAL @ 4505990 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 4505990 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 42797387282651196665450706631043795497443705624359119862773182040627368069094 80
UVM_FATAL @ 5636427 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 5636427 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 33874063566254264711867510574120649811935303516831633349558438357366978660837 82
UVM_FATAL @ 710924809 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 710924809 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 112869549456917518988043533619805431052979534866347144246320482049929818352114 80
UVM_FATAL @ 113139733 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 113139733 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 42515495563127004183780676625218262576078589145717873626653115457232660820659 83
UVM_FATAL @ 1963288 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 1963288 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 58030289443835111441076555090470514931037927979680196694338898490520609624217 338
UVM_FATAL @ 745213694 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 745213694 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 59083353681297844652001791360984870072765594700839601716259696459243590271426 81
UVM_FATAL @ 30111118 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 30111118 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 43859545887524648898970410137954590207130250167194648365742391021033143408910 80
UVM_FATAL @ 11190571 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 11190571 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 110999223815049787063436034917308245593714780766322440991953115625474957477907 202
UVM_FATAL @ 2384987682 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2384987682 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 98806176849060454235540825183189561046523356227037449465789411122953664494690 97
UVM_FATAL @ 152852666 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 152852666 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 22265236082947214129256989241289737338790850966523102620548843986196167086688 80
UVM_FATAL @ 42673329 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 42673329 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 22048449008614512667385537148981857863068148765066799454806289492184011654415 427
UVM_FATAL @ 3023322443 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 3023322443 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 13954952384556304034487515293656315429348244940117253662599657089006095958328 772
UVM_FATAL @ 954442164 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 954442164 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 62951216744550341798241547530351326990703917191327636759850125946882132408203 84
UVM_FATAL @ 30480791 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 30480791 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 57825407439035711525181330626811823114461282646641727879147188488454504816404 80
UVM_FATAL @ 55646473 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 55646473 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 112223078492077135968077163122590626110990594857421625466845723645749689986347 338
UVM_FATAL @ 2513123533 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2513123533 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 43112200832310858102242788235471742642763286778101756679117997348101503882731 80
UVM_FATAL @ 7380724 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 7380724 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 41012956450587244428603085526142941699383795674575255465524936935258960157571 80
UVM_FATAL @ 7699176 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 7699176 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 99587227942678783880449345564192616919246655510386239375212425562465872240076 80
UVM_FATAL @ 15318196 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 15318196 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 40351445341054768506012460118608858873678137909507107021067968385009828869513 80
UVM_FATAL @ 41023811 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 41023811 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 100505686693495522671745990977625464769923452721619207984848780645350026303155 80
UVM_FATAL @ 82764662 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 82764662 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 61471228055799767483455904112235785745322471489618003536856050086162336726718 155
UVM_FATAL @ 1137338689 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 1137338689 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 106457556157683349017240421631979213372323001184173552709129103785158741497896 80
UVM_FATAL @ 9314774 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 9314774 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 86810517332773070910112526208381240733856555563499753234868389102284407250039 270
UVM_FATAL @ 977132707 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 977132707 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 109784449394992472352826793286952836256864001486391478046619171446303051329389 80
UVM_FATAL @ 4932611 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 4932611 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 65799852978812739624190049475584485662686607472696261983245858250098554494403 80
UVM_FATAL @ 2768141 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2768141 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 4138541657341340568856906459996187942545971516474233615054487105808047143314 80
UVM_FATAL @ 21399810 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 21399810 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -*
gpio_stress_all_with_rand_reset 83541537352903513510323175905379656176109517569590926193009407335153484129134 430
UVM_FATAL @ 1158913358 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1158913358 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 16516396445289076945437056842891533045287422040387987286771511086779781657696 80
UVM_FATAL @ 32654208 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 32654208 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 8411528458633735264473037204053676945567932082009471577030757234317081302263 78
UVM_FATAL @ 1520879 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1520879 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 26457212236732489482719877021203032434008388080009019542557919327631855094851 221
UVM_FATAL @ 699521735 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 699521735 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 45974563545736027172925201370602316068247921143999553481171747177160824176047 78
UVM_FATAL @ 62021133 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 62021133 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 41144938582468672795445108000641598141988586616959377331354743811247996408301 78
UVM_FATAL @ 1278566 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1278566 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 26397973174192751705224180017501950221432189937267306803006714351154452796764 85
UVM_FATAL @ 3527249592 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 3527249592 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 91961706780527718295116423759196693036905628494081643533005098555616473777744 78
UVM_FATAL @ 70738571 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 70738571 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 21718852490255686008990750997637598758679055982528748825091937989160398743064 219
UVM_FATAL @ 76020218 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 76020218 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 94245431855225411064253711621443530920272986034027561010506474185842635723877 78
UVM_FATAL @ 5695318 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 5695318 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 83394643319768940522858847056522299034338741164467369750864452193206479544909 78
UVM_FATAL @ 160286902 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 160286902 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 43269504323573667443847978924473700330398305313687591265726356217540737477848 79
UVM_FATAL @ 148384637 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 148384637 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 17805184209946588502946849353379043058944143816584488661859960081089285465294 79
UVM_FATAL @ 1434582438 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1434582438 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 107511302404165605919717350275647667141200845550204454018267163565724318108734 81
UVM_FATAL @ 187084068 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 187084068 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 49116037290426252720020921525385677621196193463194750601507594016274412666766 79
UVM_FATAL @ 455936901 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 455936901 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 96822662034215629138909471777340333447958265519728804826685647615771634876170 78
UVM_FATAL @ 5046923 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 5046923 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 26510160476576328562581984020556119045431464546006568050719956472859313857918 78
UVM_FATAL @ 2254497 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 2254497 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 27954363350116413523103752265207201379186753489439277132066731171854109242719 78
UVM_FATAL @ 1127113 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1127113 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 98344045297779886727910955462725639901477105395340167463124460889296859167364 78
UVM_FATAL @ 2518105 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 2518105 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 102653292328449235250690655678981481758319461216382030324654650176180694441810 160
UVM_FATAL @ 2940175540 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 2940175540 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 7987894352444436439491754531982389821173051202471087859931150640933894181602 78
UVM_FATAL @ 162399763 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 162399763 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---