| V1 |
|
100.00% |
| V2 |
|
99.71% |
| V2S |
|
95.37% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| wake_up | 1 | 1 | 100.00 | |||
| aes_wake_up | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| smoke | 50 | 50 | 100.00 | |||
| aes_smoke | 8.000s | 0.000us | 50 | 50 | 100.00 | |
| csr_hw_reset | 5 | 5 | 100.00 | |||
| aes_csr_hw_reset | 2.000s | 0.000us | 5 | 5 | 100.00 | |
| csr_rw | 20 | 20 | 100.00 | |||
| aes_csr_rw | 2.000s | 0.000us | 20 | 20 | 100.00 | |
| csr_bit_bash | 5 | 5 | 100.00 | |||
| aes_csr_bit_bash | 5.000s | 0.000us | 5 | 5 | 100.00 | |
| csr_aliasing | 5 | 5 | 100.00 | |||
| aes_csr_aliasing | 3.000s | 0.000us | 5 | 5 | 100.00 | |
| csr_mem_rw_with_rand_reset | 20 | 20 | 100.00 | |||
| aes_csr_mem_rw_with_rand_reset | 2.000s | 0.000us | 20 | 20 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 25 | 25 | 100.00 | |||
| aes_csr_rw | 2.000s | 0.000us | 20 | 20 | 100.00 | |
| aes_csr_aliasing | 3.000s | 0.000us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| algorithm | 150 | 150 | 100.00 | |||
| aes_smoke | 8.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_config_error | 58.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_stress | 98.000s | 0.000us | 50 | 50 | 100.00 | |
| key_length | 150 | 150 | 100.00 | |||
| aes_smoke | 8.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_config_error | 58.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_stress | 98.000s | 0.000us | 50 | 50 | 100.00 | |
| back2back | 100 | 100 | 100.00 | |||
| aes_stress | 98.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_b2b | 35.000s | 0.000us | 50 | 50 | 100.00 | |
| backpressure | 50 | 50 | 100.00 | |||
| aes_stress | 98.000s | 0.000us | 50 | 50 | 100.00 | |
| multi_message | 199 | 200 | 99.50 | |||
| aes_smoke | 8.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_config_error | 58.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_stress | 98.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_alert_reset | 67.000s | 0.000us | 49 | 50 | 98.00 | |
| failure_test | 148 | 150 | 98.67 | |||
| aes_man_cfg_err | 3.000s | 0.000us | 49 | 50 | 98.00 | |
| aes_config_error | 58.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_alert_reset | 67.000s | 0.000us | 49 | 50 | 98.00 | |
| trigger_clear_test | 50 | 50 | 100.00 | |||
| aes_clear | 16.000s | 0.000us | 50 | 50 | 100.00 | |
| nist_test_vectors | 1 | 1 | 100.00 | |||
| aes_nist_vectors | 21.000s | 0.000us | 1 | 1 | 100.00 | |
| nist_test_vectors_gcm | 1 | 1 | 100.00 | |||
| aes_nist_vectors_gcm | 9.000s | 0.000us | 1 | 1 | 100.00 | |
| reset_recovery | 49 | 50 | 98.00 | |||
| aes_alert_reset | 67.000s | 0.000us | 49 | 50 | 98.00 | |
| stress | 50 | 50 | 100.00 | |||
| aes_stress | 98.000s | 0.000us | 50 | 50 | 100.00 | |
| sideload | 100 | 100 | 100.00 | |||
| aes_stress | 98.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_sideload | 18.000s | 0.000us | 50 | 50 | 100.00 | |
| deinitialization | 50 | 50 | 100.00 | |||
| aes_deinit | 24.000s | 0.000us | 50 | 50 | 100.00 | |
| stress_all | 10 | 10 | 100.00 | |||
| aes_stress_all | 305.000s | 0.000us | 10 | 10 | 100.00 | |
| gcm_save_and_restore | 100 | 100 | 100.00 | |||
| aes_gcm_save_restore | 16.000s | 0.000us | 100 | 100 | 100.00 | |
| alert_test | 50 | 50 | 100.00 | |||
| aes_alert_test | 4.000s | 0.000us | 50 | 50 | 100.00 | |
| tl_d_oob_addr_access | 20 | 20 | 100.00 | |||
| aes_tl_errors | 3.000s | 0.000us | 20 | 20 | 100.00 | |
| tl_d_illegal_access | 20 | 20 | 100.00 | |||
| aes_tl_errors | 3.000s | 0.000us | 20 | 20 | 100.00 | |
| tl_d_outstanding_access | 50 | 50 | 100.00 | |||
| aes_csr_hw_reset | 2.000s | 0.000us | 5 | 5 | 100.00 | |
| aes_csr_rw | 2.000s | 0.000us | 20 | 20 | 100.00 | |
| aes_csr_aliasing | 3.000s | 0.000us | 5 | 5 | 100.00 | |
| aes_same_csr_outstanding | 3.000s | 0.000us | 20 | 20 | 100.00 | |
| tl_d_partial_access | 50 | 50 | 100.00 | |||
| aes_csr_hw_reset | 2.000s | 0.000us | 5 | 5 | 100.00 | |
| aes_csr_rw | 2.000s | 0.000us | 20 | 20 | 100.00 | |
| aes_csr_aliasing | 3.000s | 0.000us | 5 | 5 | 100.00 | |
| aes_same_csr_outstanding | 3.000s | 0.000us | 20 | 20 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| reseeding | 50 | 50 | 100.00 | |||
| aes_reseed | 21.000s | 0.000us | 50 | 50 | 100.00 | |
| fault_inject | 658 | 700 | 94.00 | |||
| aes_fi | 1899.000s | 0.000us | 49 | 50 | 98.00 | |
| aes_control_fi | 58.000s | 0.000us | 279 | 300 | 93.00 | |
| aes_cipher_fi | 39.000s | 0.000us | 330 | 350 | 94.29 | |
| shadow_reg_update_error | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 0.000us | 20 | 20 | 100.00 | |
| shadow_reg_read_clear_staged_value | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 0.000us | 20 | 20 | 100.00 | |
| shadow_reg_storage_error | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 0.000us | 20 | 20 | 100.00 | |
| shadowed_reset_glitch | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 0.000us | 20 | 20 | 100.00 | |
| shadow_reg_update_error_with_csr_rw | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors_with_csr_rw | 4.000s | 0.000us | 20 | 20 | 100.00 | |
| tl_intg_err | 25 | 25 | 100.00 | |||
| aes_tl_intg_err | 3.000s | 0.000us | 20 | 20 | 100.00 | |
| aes_sec_cm | 12.000s | 0.000us | 5 | 5 | 100.00 | |
| sec_cm_bus_integrity | 20 | 20 | 100.00 | |||
| aes_tl_intg_err | 3.000s | 0.000us | 20 | 20 | 100.00 | |
| sec_cm_lc_escalate_en_intersig_mubi | 49 | 50 | 98.00 | |||
| aes_alert_reset | 67.000s | 0.000us | 49 | 50 | 98.00 | |
| sec_cm_main_config_shadow | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 0.000us | 20 | 20 | 100.00 | |
| sec_cm_gcm_config_shadow | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 0.000us | 20 | 20 | 100.00 | |
| sec_cm_main_config_sparse | 217 | 220 | 98.64 | |||
| aes_smoke | 8.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_stress | 98.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_alert_reset | 67.000s | 0.000us | 49 | 50 | 98.00 | |
| aes_core_fi | 72.000s | 0.000us | 68 | 70 | 97.14 | |
| sec_cm_gcm_config_sparse | 268 | 270 | 99.26 | |||
| aes_gcm_save_restore | 16.000s | 0.000us | 100 | 100 | 100.00 | |
| aes_config_error | 58.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_stress | 98.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_core_fi | 72.000s | 0.000us | 68 | 70 | 97.14 | |
| sec_cm_aux_config_shadow | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 0.000us | 20 | 20 | 100.00 | |
| sec_cm_aux_config_regwen | 100 | 100 | 100.00 | |||
| aes_readability | 5.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_stress | 98.000s | 0.000us | 50 | 50 | 100.00 | |
| sec_cm_key_sideload | 100 | 100 | 100.00 | |||
| aes_stress | 98.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_sideload | 18.000s | 0.000us | 50 | 50 | 100.00 | |
| sec_cm_key_sw_unreadable | 50 | 50 | 100.00 | |||
| aes_readability | 5.000s | 0.000us | 50 | 50 | 100.00 | |
| sec_cm_data_reg_sw_unreadable | 50 | 50 | 100.00 | |||
| aes_readability | 5.000s | 0.000us | 50 | 50 | 100.00 | |
| sec_cm_key_sec_wipe | 50 | 50 | 100.00 | |||
| aes_readability | 5.000s | 0.000us | 50 | 50 | 100.00 | |
| sec_cm_iv_config_sec_wipe | 50 | 50 | 100.00 | |||
| aes_readability | 5.000s | 0.000us | 50 | 50 | 100.00 | |
| sec_cm_data_reg_sec_wipe | 50 | 50 | 100.00 | |||
| aes_readability | 5.000s | 0.000us | 50 | 50 | 100.00 | |
| sec_cm_data_reg_key_sca | 50 | 50 | 100.00 | |||
| aes_stress | 98.000s | 0.000us | 50 | 50 | 100.00 | |
| sec_cm_key_masking | 50 | 50 | 100.00 | |||
| aes_stress | 98.000s | 0.000us | 50 | 50 | 100.00 | |
| sec_cm_main_fsm_sparse | 49 | 50 | 98.00 | |||
| aes_fi | 1899.000s | 0.000us | 49 | 50 | 98.00 | |
| sec_cm_main_fsm_redun | 708 | 750 | 94.40 | |||
| aes_fi | 1899.000s | 0.000us | 49 | 50 | 98.00 | |
| aes_control_fi | 58.000s | 0.000us | 279 | 300 | 93.00 | |
| aes_cipher_fi | 39.000s | 0.000us | 330 | 350 | 94.29 | |
| aes_ctr_fi | 4.000s | 0.000us | 50 | 50 | 100.00 | |
| sec_cm_cipher_fsm_sparse | 49 | 50 | 98.00 | |||
| aes_fi | 1899.000s | 0.000us | 49 | 50 | 98.00 | |
| sec_cm_cipher_fsm_redun | 658 | 700 | 94.00 | |||
| aes_fi | 1899.000s | 0.000us | 49 | 50 | 98.00 | |
| aes_control_fi | 58.000s | 0.000us | 279 | 300 | 93.00 | |
| aes_cipher_fi | 39.000s | 0.000us | 330 | 350 | 94.29 | |
| sec_cm_cipher_ctr_redun | 330 | 350 | 94.29 | |||
| aes_cipher_fi | 39.000s | 0.000us | 330 | 350 | 94.29 | |
| sec_cm_ctr_fsm_sparse | 49 | 50 | 98.00 | |||
| aes_fi | 1899.000s | 0.000us | 49 | 50 | 98.00 | |
| sec_cm_ctr_fsm_redun | 378 | 400 | 94.50 | |||
| aes_fi | 1899.000s | 0.000us | 49 | 50 | 98.00 | |
| aes_control_fi | 58.000s | 0.000us | 279 | 300 | 93.00 | |
| aes_ctr_fi | 4.000s | 0.000us | 50 | 50 | 100.00 | |
| sec_cm_ghash_fsm_sparse | 49 | 50 | 98.00 | |||
| aes_fi | 1899.000s | 0.000us | 49 | 50 | 98.00 | |
| sec_cm_ctrl_sparse | 708 | 750 | 94.40 | |||
| aes_fi | 1899.000s | 0.000us | 49 | 50 | 98.00 | |
| aes_control_fi | 58.000s | 0.000us | 279 | 300 | 93.00 | |
| aes_cipher_fi | 39.000s | 0.000us | 330 | 350 | 94.29 | |
| aes_ctr_fi | 4.000s | 0.000us | 50 | 50 | 100.00 | |
| sec_cm_main_fsm_global_esc | 49 | 50 | 98.00 | |||
| aes_alert_reset | 67.000s | 0.000us | 49 | 50 | 98.00 | |
| sec_cm_main_fsm_local_esc | 708 | 750 | 94.40 | |||
| aes_fi | 1899.000s | 0.000us | 49 | 50 | 98.00 | |
| aes_control_fi | 58.000s | 0.000us | 279 | 300 | 93.00 | |
| aes_cipher_fi | 39.000s | 0.000us | 330 | 350 | 94.29 | |
| aes_ctr_fi | 4.000s | 0.000us | 50 | 50 | 100.00 | |
| sec_cm_cipher_fsm_local_esc | 708 | 750 | 94.40 | |||
| aes_fi | 1899.000s | 0.000us | 49 | 50 | 98.00 | |
| aes_control_fi | 58.000s | 0.000us | 279 | 300 | 93.00 | |
| aes_cipher_fi | 39.000s | 0.000us | 330 | 350 | 94.29 | |
| aes_ctr_fi | 4.000s | 0.000us | 50 | 50 | 100.00 | |
| sec_cm_ctr_fsm_local_esc | 378 | 400 | 94.50 | |||
| aes_fi | 1899.000s | 0.000us | 49 | 50 | 98.00 | |
| aes_control_fi | 58.000s | 0.000us | 279 | 300 | 93.00 | |
| aes_ctr_fi | 4.000s | 0.000us | 50 | 50 | 100.00 | |
| sec_cm_ghash_fsm_local_esc | 139 | 140 | 99.29 | |||
| aes_fi | 1899.000s | 0.000us | 49 | 50 | 98.00 | |
| aes_ghash_fi | 10.000s | 0.000us | 90 | 90 | 100.00 | |
| sec_cm_data_reg_local_esc | 658 | 700 | 94.00 | |||
| aes_fi | 1899.000s | 0.000us | 49 | 50 | 98.00 | |
| aes_control_fi | 58.000s | 0.000us | 279 | 300 | 93.00 | |
| aes_cipher_fi | 39.000s | 0.000us | 330 | 350 | 94.29 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 0 | 10 | 0.00 | |||
| aes_stress_all_with_rand_reset | 47.000s | 0.000us | 0 | 10 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_FATAL (aes_manual_config_err_vseq.sv:71) virtual_sequencer [aes_manual_config_err_vseq] WAS ABLE TO TRIGGER OPERATION WITH ILLEGAL MODE | ||||
| aes_man_cfg_err | 38420457038464463219493419420093277090759814097719802933191418941890140370598 | 138 |
UVM_FATAL @ 14399273 ps: (aes_manual_config_err_vseq.sv:71) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.aes_manual_config_err_vseq] WAS ABLE TO TRIGGER OPERATION WITH ILLEGAL MODE
UVM_INFO @ 14399273 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| Job timed out after * minutes | ||||
| aes_control_fi | 67151679712264509839371606365683754497415568719955079244970038962656994111634 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 67611196011549290642486480949540554112192998652579539751926233082730239815461 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 108960891388033358732461700716652519176564956993840692838041239381143622842735 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 89305418344227352990991260382873878015067702577297040944048787652358320240958 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 81242349594982768214903860420677516911950871495155458583772932193989732523992 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 87742866351750610940605975888826510484602631230838080433541054999006011378953 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 18126675087351876049364636769431957850603427966885801186308455807347646128167 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 31753679499180487746152600124619746209085261736914586854076686254089538939011 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 46952179166740706824859963378905736497213651083601073848241259691937913782033 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 69165993132729092104024927383429090638209642201978325697763210387788178586799 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 7892962338823106291053236855885387222424803519521226336376975763808002103669 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 29741015169721987535756355716927218025353995913078263479607416287039219772085 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 66464562449684942352740703570643790626433929113640226797575949601436913819911 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 41662317883390709010877441211268349542266928553586386852722107682835854203238 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 10608148476080604026232873137907683919944308425172775700507873449603690734964 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 51571634658915532364421193422037088040650495374256432305232262328658666058911 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 99757774560680607525868875317835752632328257997568706390552473009352826876295 | None |
Job timed out after 1 minutes
|
|
| UVM_FATAL (aes_core_fi_vseq.sv:70) [aes_core_fi_vseq] wait timeout occurred! | ||||
| aes_core_fi | 3338646734955413770437339572329896070319226415461744410818781062366386392289 | 154 |
UVM_FATAL @ 10035537205 ps: (aes_core_fi_vseq.sv:70) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10035537205 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 14979787731605189147893736908741054571468525381374589372414285582976718955203 | 145 |
UVM_FATAL @ 10014220773 ps: (aes_core_fi_vseq.sv:70) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10014220773 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues | ||||
| aes_stress_all_with_rand_reset | 89965528642706785336695186941057629764897778132547020734117157263870472249235 | 518 |
UVM_ERROR @ 858417578 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 858417578 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 29836811242562717089431056036887257910831983717212231398009889838650081411326 | 1432 |
UVM_ERROR @ 5994950481 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 5994950481 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 56898952526153274434939662245719266628655073122373014748207306111504640882238 | 821 |
UVM_ERROR @ 2824438394 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 2824438394 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 114094125347483456560454565335158955157850898971226451307208663230217685972851 | 749 |
UVM_ERROR @ 2947436493 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 2947436493 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 94956176514781069516639335113929868757881975436213799143511379829652427103282 | 836 |
UVM_ERROR @ 1931020546 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 1931020546 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_*/rtl/aes_core.sv,1112): Assertion AesModeValid has failed | ||||
| aes_alert_reset | 106218744314780856673351401167207733051842265682835529369493717068213914599095 | 620 |
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_core.sv,1112): (time 3177834 PS) Assertion tb.dut.u_aes_core.AesModeValid has failed
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_control_fsm.sv,1180): (time 3177834 PS) Assertion tb.dut.u_aes_core.u_aes_control.gen_fsm[2].gen_fsm_n.u_aes_control_fsm_i.u_aes_control_fsm.AesModeValid has failed
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_control_fsm.sv,1180): (time 3177834 PS) Assertion tb.dut.u_aes_core.u_aes_control.gen_fsm[1].gen_fsm_p.u_aes_control_fsm_i.u_aes_control_fsm.AesModeValid has failed
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_control_fsm.sv,1180): (time 3177834 PS) Assertion tb.dut.u_aes_core.u_aes_control.gen_fsm[0].gen_fsm_p.u_aes_control_fsm_i.u_aes_control_fsm.AesModeValid has failed
UVM_ERROR @ 3177834 ps: (aes_core.sv:1112) [ASSERT FAILED] AesModeValid
|
|
| UVM_FATAL (aes_base_vseq.sv:306) virtual_sequencer [aes_alert_reset_vseq] Expected GCM phase GCM_AAD, got GCM_TEXT | ||||
| aes_stress_all_with_rand_reset | 55229250967218798456679960195209886270711858530847053064519050574413865335507 | 1258 |
UVM_FATAL @ 899579058 ps: (aes_base_vseq.sv:306) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.aes_alert_reset_vseq] Expected GCM phase GCM_AAD, got GCM_TEXT
UVM_INFO @ 899579058 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 63790200860141503412354015295585942516033171748796621011927995326526104129158 | 317 |
UVM_FATAL @ 1709827765 ps: (aes_base_vseq.sv:306) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.aes_alert_reset_vseq] Expected GCM phase GCM_AAD, got GCM_TEXT
UVM_INFO @ 1709827765 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (cip_base_vseq.sv:1237) [aes_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. | ||||
| aes_stress_all_with_rand_reset | 3587168746555376417690179298604642608548517578937502169455678897839131924455 | 176 |
UVM_ERROR @ 232353091 ps: (cip_base_vseq.sv:1237) [uvm_test_top.env.virtual_sequencer.aes_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 232353091 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 105020081169347344916714379340278012775255782119645506171267400078796605814468 | 110 |
UVM_ERROR @ 112599150 ps: (cip_base_vseq.sv:1237) [uvm_test_top.env.virtual_sequencer.aes_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 112599150 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_base_vseq.sv:306) virtual_sequencer [aes_alert_reset_vseq] Expected GCM phase GCM_TEXT, got GCM_TAG | ||||
| aes_stress_all_with_rand_reset | 102622241750258803217551953492103024141199907044082080361433784571383288254668 | 621 |
UVM_FATAL @ 674305380 ps: (aes_base_vseq.sv:306) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.aes_alert_reset_vseq] Expected GCM phase GCM_TEXT, got GCM_TAG
UVM_INFO @ 674305380 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred! | ||||
| aes_cipher_fi | 71407266764134452867429738229968052487475659315549819997467070023432865662373 | 157 |
UVM_FATAL @ 10024805452 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10024805452 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 104131065487719403763516474639796169007092039542864141146057868254538514481118 | 142 |
UVM_FATAL @ 10014915451 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10014915451 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 108715792777365925597221375271462434040298408651040550607023597242269583655322 | 144 |
UVM_FATAL @ 10105837512 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10105837512 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 72137080391561094291635916593705043848553766143986787380743362712293881372264 | 152 |
UVM_FATAL @ 10032371587 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10032371587 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 96100833689516372298660604581252968858597635624823851136512473107302924343835 | 147 |
UVM_FATAL @ 10049125573 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10049125573 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 54253747119500546905675542103830848827740110571995825557331706524365175957620 | 158 |
UVM_FATAL @ 10012337072 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10012337072 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 30527356125574918630606068256525576563624729061341297877527628428967642877689 | 147 |
UVM_FATAL @ 10009312475 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10009312475 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 114243726517109733199223528113328895575467772148303637730189171633251612064370 | 154 |
UVM_FATAL @ 10011460445 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10011460445 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 4495715939907122528061178679130832822995385777289131745714724099080758305649 | 153 |
UVM_FATAL @ 10008202922 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10008202922 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 73844063165442153760949345721591353623590494841015191243948414089610863581693 | 146 |
UVM_FATAL @ 10063094533 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10063094533 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 9502509651661797317132075672416455137321706726351361921551017546261757728929 | 148 |
UVM_FATAL @ 10007563447 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10007563447 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 18759387154672378404059524677355497813950597503839631034476068049248587155193 | 144 |
UVM_FATAL @ 10030015202 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10030015202 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 56249693264019252152609647491791812118955948366424364033475034823567929936216 | 153 |
UVM_FATAL @ 10112967440 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10112967440 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 71347383006991590037781360223324018947411940055425250929301223478196377206903 | 149 |
UVM_FATAL @ 10007159238 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10007159238 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 84339114060402729400370458377301452095275644107569487144509195772667768512880 | 139 |
UVM_FATAL @ 10015798915 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10015798915 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 59514304189145360875534542987958216606365633854551683207555310156716986908813 | 154 |
UVM_FATAL @ 10027784994 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10027784994 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue | ||||
| aes_fi | 3039968714875159846501027865880229955637669547901216031373535002742761339008 | 13708385 |
UVM_FATAL @ 200000000000 ps: (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of 200000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred! | ||||
| aes_control_fi | 101350087220018981560285365699884431562544762867450262068590501986968596445240 | 154 |
UVM_FATAL @ 10006984153 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10006984153 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 30257253323168687254410931773324794854342647418116502346335294634277569715519 | 140 |
UVM_FATAL @ 10007860446 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10007860446 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 38528594384074803830366654866500031065603478909938179906479489400001920748521 | 150 |
UVM_FATAL @ 10028821610 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10028821610 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 73145987715172052605853360539478312039773392501707605655202293903166305915680 | 146 |
UVM_FATAL @ 10008633485 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10008633485 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 69306141064816884752711955167756748711786445912880492275763975106451745897988 | 144 |
UVM_FATAL @ 10006065013 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10006065013 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 68083222911162164058540725283253186135726688399432632494283766235192439825256 | 149 |
UVM_FATAL @ 10084240572 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10084240572 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 96512790296496972509194688671432591011244511040251235602892493663753984985893 | 155 |
UVM_FATAL @ 10040909177 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10040909177 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=2) | ||||
| aes_cipher_fi | 113987747342271660359703037138441107400735553499785863223010129275178802543022 | 137 |
UVM_FATAL @ 10030929734 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=0x97931884, Comparison=CompareOpEq, exp_data=0x1, call_count=2)
UVM_INFO @ 10030929734 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|