| V1 |
|
100.00% |
| V2 |
|
99.79% |
| V2S |
|
93.85% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| wake_up | 1 | 1 | 100.00 | |||
| aes_wake_up | 38.000s | 0.000us | 1 | 1 | 100.00 | |
| smoke | 50 | 50 | 100.00 | |||
| aes_smoke | 38.000s | 0.000us | 50 | 50 | 100.00 | |
| csr_hw_reset | 5 | 5 | 100.00 | |||
| aes_csr_hw_reset | 2.000s | 0.000us | 5 | 5 | 100.00 | |
| csr_rw | 20 | 20 | 100.00 | |||
| aes_csr_rw | 2.000s | 0.000us | 20 | 20 | 100.00 | |
| csr_bit_bash | 5 | 5 | 100.00 | |||
| aes_csr_bit_bash | 7.000s | 0.000us | 5 | 5 | 100.00 | |
| csr_aliasing | 5 | 5 | 100.00 | |||
| aes_csr_aliasing | 3.000s | 0.000us | 5 | 5 | 100.00 | |
| csr_mem_rw_with_rand_reset | 20 | 20 | 100.00 | |||
| aes_csr_mem_rw_with_rand_reset | 2.000s | 0.000us | 20 | 20 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 25 | 25 | 100.00 | |||
| aes_csr_rw | 2.000s | 0.000us | 20 | 20 | 100.00 | |
| aes_csr_aliasing | 3.000s | 0.000us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| algorithm | 150 | 150 | 100.00 | |||
| aes_smoke | 38.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_config_error | 39.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_stress | 38.000s | 0.000us | 50 | 50 | 100.00 | |
| key_length | 150 | 150 | 100.00 | |||
| aes_smoke | 38.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_config_error | 39.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_stress | 38.000s | 0.000us | 50 | 50 | 100.00 | |
| back2back | 100 | 100 | 100.00 | |||
| aes_stress | 38.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_b2b | 40.000s | 0.000us | 50 | 50 | 100.00 | |
| backpressure | 50 | 50 | 100.00 | |||
| aes_stress | 38.000s | 0.000us | 50 | 50 | 100.00 | |
| multi_message | 200 | 200 | 100.00 | |||
| aes_smoke | 38.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_config_error | 39.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_stress | 38.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_alert_reset | 39.000s | 0.000us | 50 | 50 | 100.00 | |
| failure_test | 149 | 150 | 99.33 | |||
| aes_man_cfg_err | 38.000s | 0.000us | 49 | 50 | 98.00 | |
| aes_config_error | 39.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_alert_reset | 39.000s | 0.000us | 50 | 50 | 100.00 | |
| trigger_clear_test | 50 | 50 | 100.00 | |||
| aes_clear | 38.000s | 0.000us | 50 | 50 | 100.00 | |
| nist_test_vectors | 1 | 1 | 100.00 | |||
| aes_nist_vectors | 39.000s | 0.000us | 1 | 1 | 100.00 | |
| nist_test_vectors_gcm | 1 | 1 | 100.00 | |||
| aes_nist_vectors_gcm | 39.000s | 0.000us | 1 | 1 | 100.00 | |
| reset_recovery | 50 | 50 | 100.00 | |||
| aes_alert_reset | 39.000s | 0.000us | 50 | 50 | 100.00 | |
| stress | 50 | 50 | 100.00 | |||
| aes_stress | 38.000s | 0.000us | 50 | 50 | 100.00 | |
| sideload | 100 | 100 | 100.00 | |||
| aes_stress | 38.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_sideload | 38.000s | 0.000us | 50 | 50 | 100.00 | |
| deinitialization | 49 | 50 | 98.00 | |||
| aes_deinit | 1627.000s | 0.000us | 49 | 50 | 98.00 | |
| stress_all | 9 | 10 | 90.00 | |||
| aes_stress_all | 58.000s | 0.000us | 9 | 10 | 90.00 | |
| gcm_save_and_restore | 100 | 100 | 100.00 | |||
| aes_gcm_save_restore | 38.000s | 0.000us | 100 | 100 | 100.00 | |
| alert_test | 50 | 50 | 100.00 | |||
| aes_alert_test | 37.000s | 0.000us | 50 | 50 | 100.00 | |
| tl_d_oob_addr_access | 20 | 20 | 100.00 | |||
| aes_tl_errors | 3.000s | 0.000us | 20 | 20 | 100.00 | |
| tl_d_illegal_access | 20 | 20 | 100.00 | |||
| aes_tl_errors | 3.000s | 0.000us | 20 | 20 | 100.00 | |
| tl_d_outstanding_access | 50 | 50 | 100.00 | |||
| aes_csr_hw_reset | 2.000s | 0.000us | 5 | 5 | 100.00 | |
| aes_csr_rw | 2.000s | 0.000us | 20 | 20 | 100.00 | |
| aes_csr_aliasing | 3.000s | 0.000us | 5 | 5 | 100.00 | |
| aes_same_csr_outstanding | 3.000s | 0.000us | 20 | 20 | 100.00 | |
| tl_d_partial_access | 50 | 50 | 100.00 | |||
| aes_csr_hw_reset | 2.000s | 0.000us | 5 | 5 | 100.00 | |
| aes_csr_rw | 2.000s | 0.000us | 20 | 20 | 100.00 | |
| aes_csr_aliasing | 3.000s | 0.000us | 5 | 5 | 100.00 | |
| aes_same_csr_outstanding | 3.000s | 0.000us | 20 | 20 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| reseeding | 50 | 50 | 100.00 | |||
| aes_reseed | 38.000s | 0.000us | 50 | 50 | 100.00 | |
| fault_inject | 646 | 700 | 92.29 | |||
| aes_fi | 38.000s | 0.000us | 47 | 50 | 94.00 | |
| aes_control_fi | 59.000s | 0.000us | 277 | 300 | 92.33 | |
| aes_cipher_fi | 43.000s | 0.000us | 322 | 350 | 92.00 | |
| shadow_reg_update_error | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 0.000us | 20 | 20 | 100.00 | |
| shadow_reg_read_clear_staged_value | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 0.000us | 20 | 20 | 100.00 | |
| shadow_reg_storage_error | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 0.000us | 20 | 20 | 100.00 | |
| shadowed_reset_glitch | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 0.000us | 20 | 20 | 100.00 | |
| shadow_reg_update_error_with_csr_rw | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors_with_csr_rw | 4.000s | 0.000us | 20 | 20 | 100.00 | |
| tl_intg_err | 25 | 25 | 100.00 | |||
| aes_sec_cm | 42.000s | 0.000us | 5 | 5 | 100.00 | |
| aes_tl_intg_err | 3.000s | 0.000us | 20 | 20 | 100.00 | |
| sec_cm_bus_integrity | 20 | 20 | 100.00 | |||
| aes_tl_intg_err | 3.000s | 0.000us | 20 | 20 | 100.00 | |
| sec_cm_lc_escalate_en_intersig_mubi | 50 | 50 | 100.00 | |||
| aes_alert_reset | 39.000s | 0.000us | 50 | 50 | 100.00 | |
| sec_cm_main_config_shadow | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 0.000us | 20 | 20 | 100.00 | |
| sec_cm_gcm_config_shadow | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 0.000us | 20 | 20 | 100.00 | |
| sec_cm_main_config_sparse | 214 | 220 | 97.27 | |||
| aes_smoke | 38.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_stress | 38.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_alert_reset | 39.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_core_fi | 129.000s | 0.000us | 64 | 70 | 91.43 | |
| sec_cm_gcm_config_sparse | 264 | 270 | 97.78 | |||
| aes_gcm_save_restore | 38.000s | 0.000us | 100 | 100 | 100.00 | |
| aes_config_error | 39.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_stress | 38.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_core_fi | 129.000s | 0.000us | 64 | 70 | 91.43 | |
| sec_cm_aux_config_shadow | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 0.000us | 20 | 20 | 100.00 | |
| sec_cm_aux_config_regwen | 100 | 100 | 100.00 | |||
| aes_readability | 38.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_stress | 38.000s | 0.000us | 50 | 50 | 100.00 | |
| sec_cm_key_sideload | 100 | 100 | 100.00 | |||
| aes_stress | 38.000s | 0.000us | 50 | 50 | 100.00 | |
| aes_sideload | 38.000s | 0.000us | 50 | 50 | 100.00 | |
| sec_cm_key_sw_unreadable | 50 | 50 | 100.00 | |||
| aes_readability | 38.000s | 0.000us | 50 | 50 | 100.00 | |
| sec_cm_data_reg_sw_unreadable | 50 | 50 | 100.00 | |||
| aes_readability | 38.000s | 0.000us | 50 | 50 | 100.00 | |
| sec_cm_key_sec_wipe | 50 | 50 | 100.00 | |||
| aes_readability | 38.000s | 0.000us | 50 | 50 | 100.00 | |
| sec_cm_iv_config_sec_wipe | 50 | 50 | 100.00 | |||
| aes_readability | 38.000s | 0.000us | 50 | 50 | 100.00 | |
| sec_cm_data_reg_sec_wipe | 50 | 50 | 100.00 | |||
| aes_readability | 38.000s | 0.000us | 50 | 50 | 100.00 | |
| sec_cm_data_reg_key_sca | 50 | 50 | 100.00 | |||
| aes_stress | 38.000s | 0.000us | 50 | 50 | 100.00 | |
| sec_cm_key_masking | 50 | 50 | 100.00 | |||
| aes_stress | 38.000s | 0.000us | 50 | 50 | 100.00 | |
| sec_cm_main_fsm_sparse | 47 | 50 | 94.00 | |||
| aes_fi | 38.000s | 0.000us | 47 | 50 | 94.00 | |
| sec_cm_main_fsm_redun | 695 | 750 | 92.67 | |||
| aes_fi | 38.000s | 0.000us | 47 | 50 | 94.00 | |
| aes_control_fi | 59.000s | 0.000us | 277 | 300 | 92.33 | |
| aes_cipher_fi | 43.000s | 0.000us | 322 | 350 | 92.00 | |
| aes_ctr_fi | 38.000s | 0.000us | 49 | 50 | 98.00 | |
| sec_cm_cipher_fsm_sparse | 47 | 50 | 94.00 | |||
| aes_fi | 38.000s | 0.000us | 47 | 50 | 94.00 | |
| sec_cm_cipher_fsm_redun | 646 | 700 | 92.29 | |||
| aes_fi | 38.000s | 0.000us | 47 | 50 | 94.00 | |
| aes_control_fi | 59.000s | 0.000us | 277 | 300 | 92.33 | |
| aes_cipher_fi | 43.000s | 0.000us | 322 | 350 | 92.00 | |
| sec_cm_cipher_ctr_redun | 322 | 350 | 92.00 | |||
| aes_cipher_fi | 43.000s | 0.000us | 322 | 350 | 92.00 | |
| sec_cm_ctr_fsm_sparse | 47 | 50 | 94.00 | |||
| aes_fi | 38.000s | 0.000us | 47 | 50 | 94.00 | |
| sec_cm_ctr_fsm_redun | 373 | 400 | 93.25 | |||
| aes_fi | 38.000s | 0.000us | 47 | 50 | 94.00 | |
| aes_control_fi | 59.000s | 0.000us | 277 | 300 | 92.33 | |
| aes_ctr_fi | 38.000s | 0.000us | 49 | 50 | 98.00 | |
| sec_cm_ghash_fsm_sparse | 47 | 50 | 94.00 | |||
| aes_fi | 38.000s | 0.000us | 47 | 50 | 94.00 | |
| sec_cm_ctrl_sparse | 695 | 750 | 92.67 | |||
| aes_fi | 38.000s | 0.000us | 47 | 50 | 94.00 | |
| aes_control_fi | 59.000s | 0.000us | 277 | 300 | 92.33 | |
| aes_cipher_fi | 43.000s | 0.000us | 322 | 350 | 92.00 | |
| aes_ctr_fi | 38.000s | 0.000us | 49 | 50 | 98.00 | |
| sec_cm_main_fsm_global_esc | 50 | 50 | 100.00 | |||
| aes_alert_reset | 39.000s | 0.000us | 50 | 50 | 100.00 | |
| sec_cm_main_fsm_local_esc | 695 | 750 | 92.67 | |||
| aes_fi | 38.000s | 0.000us | 47 | 50 | 94.00 | |
| aes_control_fi | 59.000s | 0.000us | 277 | 300 | 92.33 | |
| aes_cipher_fi | 43.000s | 0.000us | 322 | 350 | 92.00 | |
| aes_ctr_fi | 38.000s | 0.000us | 49 | 50 | 98.00 | |
| sec_cm_cipher_fsm_local_esc | 695 | 750 | 92.67 | |||
| aes_fi | 38.000s | 0.000us | 47 | 50 | 94.00 | |
| aes_control_fi | 59.000s | 0.000us | 277 | 300 | 92.33 | |
| aes_cipher_fi | 43.000s | 0.000us | 322 | 350 | 92.00 | |
| aes_ctr_fi | 38.000s | 0.000us | 49 | 50 | 98.00 | |
| sec_cm_ctr_fsm_local_esc | 373 | 400 | 93.25 | |||
| aes_fi | 38.000s | 0.000us | 47 | 50 | 94.00 | |
| aes_control_fi | 59.000s | 0.000us | 277 | 300 | 92.33 | |
| aes_ctr_fi | 38.000s | 0.000us | 49 | 50 | 98.00 | |
| sec_cm_ghash_fsm_local_esc | 137 | 140 | 97.86 | |||
| aes_fi | 38.000s | 0.000us | 47 | 50 | 94.00 | |
| aes_ghash_fi | 37.000s | 0.000us | 90 | 90 | 100.00 | |
| sec_cm_data_reg_local_esc | 646 | 700 | 92.29 | |||
| aes_fi | 38.000s | 0.000us | 47 | 50 | 94.00 | |
| aes_control_fi | 59.000s | 0.000us | 277 | 300 | 92.33 | |
| aes_cipher_fi | 43.000s | 0.000us | 322 | 350 | 92.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 0 | 10 | 0.00 | |||
| aes_stress_all_with_rand_reset | 49.000s | 0.000us | 0 | 10 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_FATAL (aes_base_vseq.sv:75) [aes_stress_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) | ||||
| aes_stress_all_with_rand_reset | 66426563730403391623154614093867334622690403433036833485039218150328181839403 | 177 |
UVM_FATAL @ 27293755 ps: (aes_base_vseq.sv:75) [uvm_test_top.env.virtual_sequencer.aes_stress_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 27293755 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 14292996190144791700487927000778174075860051862575478288974038908182174014424 | 215 |
UVM_FATAL @ 844368408 ps: (aes_base_vseq.sv:75) [uvm_test_top.env.virtual_sequencer.aes_stress_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 844368408 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues | ||||
| aes_stress_all_with_rand_reset | 64502019850708006040795466759066959284560255777855265797320517624841447447263 | 1033 |
UVM_ERROR @ 329242357 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 329242357 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 24441896888854592158375237471859588565319035989828409655782509903788157417959 | 189 |
UVM_ERROR @ 12819555 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 12819555 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 36739731056572574461386666618590572442277874147720730661087950679228042451445 | 1778 |
UVM_ERROR @ 877961140 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 877961140 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 47690962563252587093710371460970870946239832544190034825799887808478183205314 | 771 |
UVM_ERROR @ 385933547 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 385933547 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 61497870839614078924899846223647748298265987126564652716533558473500557813871 | 414 |
UVM_ERROR @ 369627298 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 369627298 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_core_fi_vseq.sv:70) [aes_core_fi_vseq] wait timeout occurred! | ||||
| aes_core_fi | 18217086782074954808905291489450485579674541549041830202727433722206954082615 | 146 |
UVM_FATAL @ 10020813077 ps: (aes_core_fi_vseq.sv:70) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10020813077 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 74045765091001786771240123133842128165393354543018802887038784083831385672617 | 152 |
UVM_FATAL @ 10054920467 ps: (aes_core_fi_vseq.sv:70) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10054920467 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 22906683937199294245952363644957230210232654435865898526935939986606644487524 | 151 |
UVM_FATAL @ 10007165766 ps: (aes_core_fi_vseq.sv:70) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10007165766 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 51660765243082034432858673150364697472332937350934958423431946324266570780741 | 143 |
UVM_FATAL @ 10007794057 ps: (aes_core_fi_vseq.sv:70) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10007794057 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue | ||||
| aes_deinit | 68522295814453595379405600779067559225425931570028211060795253923161092867275 | 161 |
UVM_FATAL @ 200000000000 ps: (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of 200000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 68832430762931781256724825228214408286281110949514976108535830444002471671821 | 143 |
UVM_FATAL @ 200000000000 ps: (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of 200000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred! | ||||
| aes_cipher_fi | 53965029313450761527237068126571623911073279440454151133994911020398846738342 | 148 |
UVM_FATAL @ 10006598497 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10006598497 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 105744203307084364908731695128628146468820881714653764020044093282397275710180 | 153 |
UVM_FATAL @ 10009831111 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10009831111 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 111132102713115006461878526253434543551638357598913452966938069423175199019667 | 142 |
UVM_FATAL @ 10004010374 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10004010374 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 4597792127523038676558769730350474676085865642708275418505530044294174651462 | 151 |
UVM_FATAL @ 10005818051 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10005818051 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 93875425695395498792665326827891587402492457131354548984490354034109297449232 | 153 |
UVM_FATAL @ 10019317467 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10019317467 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 55076927807137403272141565726113949575289869206009022044710555154891106119285 | 151 |
UVM_FATAL @ 10009844821 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10009844821 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 95358761213196405447640550357176662268058258053999957555015080233966837195845 | 153 |
UVM_FATAL @ 10010793641 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10010793641 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 38203631509236193514068248750757771298436220328214992114744499766172782545432 | 143 |
UVM_FATAL @ 10019578283 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10019578283 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 3826939352720791259802639578306278051021105086106379203936087650659141969930 | 144 |
UVM_FATAL @ 10009510949 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10009510949 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 85923725100526403880262681556575509391888138937015846897215091398063321929931 | 145 |
UVM_FATAL @ 10005946936 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10005946936 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 80048333547472294339945814205602688276778357321134617590881237797859349764200 | 156 |
UVM_FATAL @ 10054497749 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10054497749 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| Job timed out after * minutes | ||||
| aes_cipher_fi | 52195359296221817259992402659900584947364461357494182441070358253245880521487 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 62260343216194311472458908128206906841708669998052361225971559509882956320046 | None |
Job timed out after 1 minutes
|
|
| aes_ctr_fi | 56753184114675522691904337398269112701139150931971194478144101852100152231129 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 18461950599786135188248547074864696539850942623997132551429624311914996181068 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 69227159297638148416823629448764499602245751542042742562938695729195156609485 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 53041573323845498542138104839706873769725102291154848433295175436350039749596 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 66070821950616600183472816556556357700147911273431508320551895918933710097663 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 113327230749663277502078318031408956096789366447017457741160937317418136398311 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 101188007664186253316107616393819622480188942007393583860846322386168759195884 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 82044349901761877155396274235193633882532493451803284921957139680649619189608 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 56359033798201942405466629616348407884731496774346339349241497303072280287857 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 71632752468913097322951809932688267472134738586101634840425555508216004263552 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 49648325657781112736216542620044656091332998530128209321313705115981047024904 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 101789047417930922693369155076285341964584233111233782126539852150722941696467 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 73489632123641209671749744105166879226143203878794659788472551387906067397812 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 97556480164577618920411237907940021459615362012119306754988508199354434748171 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 96162495501589725691532204191660625914594957110843994841767896778786459783207 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 52687052958969433313952385742238309577118376689829019515980494416511180140891 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 82226327263315416440208862739207079697165786798778560565145526146450148688470 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 32298909615006165144479428994608344590339668932922380787580535507394643678667 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 68765655805529577776865703542995574015774397999364781647550982979701660847177 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 57649457585091469942254988275053274990463862214308848653297667614285045578157 | None |
Job timed out after 1 minutes
|
|
| aes_control_fi | 39633680312012819443421339083207113751537567611158947367975199284346028868382 | None |
Job timed out after 1 minutes
|
|
| aes_cipher_fi | 11859873009154211633696802808399099438573897856756294744261728145429245173613 | None |
Job timed out after 1 minutes
|
|
| UVM_FATAL (aes_base_vseq.sv:75) [aes_alert_reset_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) | ||||
| aes_stress_all_with_rand_reset | 41688119440494395849777201735712628230618597952271766901411108065980640701833 | 148 |
UVM_FATAL @ 7111481 ps: (aes_base_vseq.sv:75) [uvm_test_top.env.virtual_sequencer.aes_alert_reset_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 7111481 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 68701088766667000663319135686642877207923755350954046174222654592374103417886 | 238 |
UVM_FATAL @ 77842203 ps: (aes_base_vseq.sv:75) [uvm_test_top.env.virtual_sequencer.aes_alert_reset_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 77842203 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 40979397304661322218465051205686144247255388187127030783921258006313114575987 | 632 |
UVM_FATAL @ 192698847 ps: (aes_base_vseq.sv:75) [uvm_test_top.env.virtual_sequencer.aes_alert_reset_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 192698847 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_scoreboard.sv:775) scoreboard [scoreboard] # * | ||||
| aes_stress_all | 23762509536848751002672845054329362791666109674595037524191245049320164610852 | 31004 |
UVM_FATAL @ 1764412258 ps: (aes_scoreboard.sv:775) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] # 0
TEST FAILED MESSAGES DID NOT MATCH
0 d1 6e 00 0
1 00 1a 00 0
|
|
| aes_fi | 19485796175948986149531404698433934812585336370504903551080253678942879182167 | 6349 |
UVM_FATAL @ 77319019 ps: (aes_scoreboard.sv:775) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] # 1
TEST FAILED MESSAGES DID NOT MATCH
0 6e 25 00 0
1 00 b5 00 0
|
|
| UVM_FATAL (aes_manual_config_err_vseq.sv:71) virtual_sequencer [aes_manual_config_err_vseq] WAS ABLE TO TRIGGER OPERATION WITH ILLEGAL MODE | ||||
| aes_man_cfg_err | 95517343696340855699584714317936464272981491440961197324685269593637438704160 | 139 |
UVM_FATAL @ 5976144 ps: (aes_manual_config_err_vseq.sv:71) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.aes_manual_config_err_vseq] WAS ABLE TO TRIGGER OPERATION WITH ILLEGAL MODE
UVM_INFO @ 5976144 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_*/rtl/aes_core.sv,1136): Assertion AesSecCmDataRegLocalEscDataOut has failed (* cycles, starting * PS) | ||||
| aes_fi | 99870693031178203582043781330542158348528799828974772008497339741259549583216 | 586 |
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_core.sv,1136): (time 6358301 PS) Assertion tb.dut.u_aes_core.AesSecCmDataRegLocalEscDataOut has failed (2 cycles, starting 6341060 PS)
($past(iv_q) != $past(state_done_transposed, 2) ^ $past(data_in_prev_q, 2)))
|
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_core.sv,1142): (time 6358301 PS) Assertion tb.dut.u_aes_core.AesSecCmDataRegLocalEscIv has failed (2 cycles, starting 6341060 PS)
UVM_ERROR @ 6358301 ps: (aes_core.sv:1136) [ASSERT FAILED] AesSecCmDataRegLocalEscDataOut
|
|
| aes_fi | 84169617322147008196175629562294423379984304343413193382529102909234770859626 | 344 |
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_core.sv,1136): (time 9322359 PS) Assertion tb.dut.u_aes_core.AesSecCmDataRegLocalEscDataOut has failed (2 cycles, starting 9302359 PS)
($past(iv_q) != $past(state_done_transposed, 2) ^ $past(data_in_prev_q, 2)))
|
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_core.sv,1142): (time 9322359 PS) Assertion tb.dut.u_aes_core.AesSecCmDataRegLocalEscIv has failed (2 cycles, starting 9302359 PS)
UVM_ERROR @ 9322359 ps: (aes_core.sv:1136) [ASSERT FAILED] AesSecCmDataRegLocalEscDataOut
|
|
| UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=8) | ||||
| aes_core_fi | 37326292651551183377887791776069911991987972494063768257001640379046933741251 | 143 |
UVM_FATAL @ 10023578891 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=0x80715b84, Comparison=CompareOpEq, exp_data=0x0, call_count=8)
UVM_INFO @ 10023578891 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred! | ||||
| aes_control_fi | 97694088930395058667779458907278058760364497382745623387804264433901530860859 | 141 |
UVM_FATAL @ 10027267725 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10027267725 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 62516664533177038964773575578985276170643982273665240033925279007158299014012 | 143 |
UVM_FATAL @ 10021878427 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10021878427 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 34987246482878895256532031291791723419100196855833717102234104550496761229250 | 153 |
UVM_FATAL @ 10014035060 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10014035060 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 93114352614108862302489140804085289804099840949519138842273092770581776829160 | 145 |
UVM_FATAL @ 10022147764 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10022147764 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 59933696145284278858029105280977405407919209041783425761531169549538325328323 | 149 |
UVM_FATAL @ 10010999858 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10010999858 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 106464815173956656251636974773143039980847562752527892625024347946544333846801 | 149 |
UVM_FATAL @ 10039202835 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10039202835 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 98528898116813772107101491444643079430335173580679221956458028123544705981327 | 148 |
UVM_FATAL @ 10016255784 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10016255784 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 27372329009230308280612713751193441116606564978962304395577661636013388554501 | 159 |
UVM_FATAL @ 10039785250 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10039785250 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 59185312816142871703732769730414910679395131245549136110719149502582053240695 | 150 |
UVM_FATAL @ 10011219568 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10011219568 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 104225934630957580997897094683714096460429752627626238237172852540635312339419 | 152 |
UVM_FATAL @ 10001980052 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10001980052 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 109984160006357600938637422931221698856756951113115254159395519829619308428659 | 154 |
UVM_FATAL @ 10025240739 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10025240739 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 106910628719257840753833447019991515682369221841746753544043536205707617003895 | 152 |
UVM_FATAL @ 10010793296 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10010793296 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 45850960226842145964720838252070498329976102012233606834225051945674230993331 | 151 |
UVM_FATAL @ 10002943516 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10002943516 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=11) | ||||
| aes_core_fi | 109707719384125857536399021864704256555681513518578450513270572797250761526216 | 153 |
UVM_FATAL @ 10022642755 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=0x953d2b84, Comparison=CompareOpEq, exp_data=0x0, call_count=11)
UVM_INFO @ 10022642755 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=5) | ||||
| aes_cipher_fi | 21196536202223863470684544245677512826026931090298115120588560262742275785105 | 146 |
UVM_FATAL @ 10045866562 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=0x500b1384, Comparison=CompareOpEq, exp_data=0x1, call_count=5)
UVM_INFO @ 10045866562 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=6) | ||||
| aes_cipher_fi | 85875219026065650986849975188594486329227896759720972980925207684224874584821 | 145 |
UVM_FATAL @ 10034594987 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=0x5def1784, Comparison=CompareOpEq, exp_data=0x1, call_count=6)
UVM_INFO @ 10034594987 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3) | ||||
| aes_cipher_fi | 32585829119885054295308114673084343799166291600083390217776813862148450139319 | 137 |
UVM_FATAL @ 10005774075 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=0x23be8784, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
UVM_INFO @ 10005774075 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|