Simulation Results: gpio

 
05/04/2026 00:07:51 DVSim: v1.16.0 sha: 5ec693e json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 98.37 %
  • code
  • 98.27 %
  • assert
  • 96.84 %
  • func
  • 100.00 %
  • line
  • 99.76 %
  • branch
  • 99.80 %
  • cond
  • 99.57 %
  • toggle
  • 93.94 %
Validation stages
V1
100.00%
V2
93.92%
V2S
100.00%
V3
43.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 200 200 100.00
gpio_smoke 1.380s 0.000us 50 50 100.00
gpio_smoke_no_pullup_pulldown 1.390s 0.000us 50 50 100.00
gpio_smoke_en_cdc_prim 1.200s 0.000us 50 50 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.280s 0.000us 50 50 100.00
csr_hw_reset 5 5 100.00
gpio_csr_hw_reset 0.650s 0.000us 5 5 100.00
csr_rw 20 20 100.00
gpio_csr_rw 0.690s 0.000us 20 20 100.00
csr_bit_bash 5 5 100.00
gpio_csr_bit_bash 2.400s 0.000us 5 5 100.00
csr_aliasing 5 5 100.00
gpio_csr_aliasing 0.750s 0.000us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
gpio_csr_mem_rw_with_rand_reset 1.280s 0.000us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
gpio_csr_rw 0.690s 0.000us 20 20 100.00
gpio_csr_aliasing 0.750s 0.000us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 100 100 100.00
gpio_random_dout_din 1.330s 0.000us 50 50 100.00
gpio_random_dout_din_no_pullup_pulldown 1.200s 0.000us 50 50 100.00
out_in_regs_read_write 50 50 100.00
gpio_dout_din_regs_random_rw 1.150s 0.000us 50 50 100.00
gpio_interrupt_programming 50 50 100.00
gpio_intr_rand_pgm 1.280s 0.000us 50 50 100.00
random_interrupt_trigger 50 50 100.00
gpio_rand_intr_trigger 2.690s 0.000us 50 50 100.00
interrupt_and_noise_filter 50 50 100.00
gpio_intr_with_filter_rand_intr_event 2.870s 0.000us 50 50 100.00
noise_filter_stress 50 50 100.00
gpio_filter_stress 17.950s 0.000us 50 50 100.00
regs_long_reads_and_writes 50 50 100.00
gpio_random_long_reg_writes_reg_reads 5.220s 0.000us 50 50 100.00
full_random 50 50 100.00
gpio_full_random 1.260s 0.000us 50 50 100.00
stress_all 5 50 10.00
gpio_stress_all 77.730s 0.000us 5 50 10.00
alert_test 50 50 100.00
gpio_alert_test 0.890s 0.000us 50 50 100.00
intr_test 50 50 100.00
gpio_intr_test 0.710s 0.000us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
gpio_tl_errors 2.310s 0.000us 20 20 100.00
tl_d_illegal_access 20 20 100.00
gpio_tl_errors 2.310s 0.000us 20 20 100.00
tl_d_outstanding_access 50 50 100.00
gpio_csr_rw 0.690s 0.000us 20 20 100.00
gpio_same_csr_outstanding 0.850s 0.000us 20 20 100.00
gpio_csr_aliasing 0.750s 0.000us 5 5 100.00
gpio_csr_hw_reset 0.650s 0.000us 5 5 100.00
tl_d_partial_access 50 50 100.00
gpio_csr_rw 0.690s 0.000us 20 20 100.00
gpio_same_csr_outstanding 0.850s 0.000us 20 20 100.00
gpio_csr_aliasing 0.750s 0.000us 5 5 100.00
gpio_csr_hw_reset 0.650s 0.000us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 25 25 100.00
gpio_sec_cm 1.280s 0.000us 5 5 100.00
gpio_tl_intg_err 1.300s 0.000us 20 20 100.00
sec_cm_bus_integrity 20 20 100.00
gpio_tl_intg_err 1.300s 0.000us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 43 50 86.00
gpio_rand_straps 0.740s 0.000us 43 50 86.00
stress_all_with_rand_reset 0 50 0.00
gpio_stress_all_with_rand_reset 11.070s 0.000us 0 50 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:216) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*])
gpio_stress_all 11430740017360003453740891240327347806932660941332922869272696589853992764580 79
UVM_ERROR @ 630681065 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3007168052 [0xb33dbe34])
UVM_INFO @ 630681065 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 34319850752157025294829431292693446216408648336060215808032742874008646529753 1717
UVM_ERROR @ 20860064696 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3713540139 [0xdd58202b])
UVM_INFO @ 20860064696 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 10476800026590495776115328357738732001661308672301254682209609209845900030015 223
UVM_ERROR @ 1932925926 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4097397858 [0xf4395462] vs 3731093163 [0xde63f6ab])
UVM_INFO @ 1932925926 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 65723707536282739094745072944280846193021053504881288344200828466484084642603 75
UVM_ERROR @ 4767162 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4087444096 [0xf3a17280])
UVM_INFO @ 4767162 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 50696683922730644197063679651600566812711163174526935042589478881739050838511 915
UVM_ERROR @ 2583592992 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3595321696 [0xd64c4160] vs 2602406784 [0x9b1d9380])
UVM_INFO @ 2583592992 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 110316021419231400861431412340110471261735086927242422771962029870086494153921 598
UVM_ERROR @ 1598298512 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3156554463 [0xbc2532df] vs 1758971156 [0x68d7c514])
UVM_INFO @ 1598298512 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 92020760476105588910919741576779600815628997005952605976971095279294103162335 524
UVM_ERROR @ 4824869901 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2624434462 [0x9c6db11e] vs 4083832882 [0xf36a5832])
UVM_INFO @ 4824869901 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 70524845135609860839839208443528840162510192884972348858878469185217705606595 75
UVM_ERROR @ 12072526 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1517054816 [0x5a6c6b60])
UVM_INFO @ 12072526 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 4584911508933035576120860974448960151431887414578803314107707497757091554382 717
UVM_ERROR @ 1502109691 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 427800917 [0x197fb955])
UVM_INFO @ 1502109691 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 40696542553574849067706504962062216469203057304844190310525559417131654706684 75
UVM_ERROR @ 1311023 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 358473452 [0x155ddeec])
UVM_INFO @ 1311023 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 70012486508833000936914137812182697246755296572932037768891283726112462801862 323
UVM_ERROR @ 2794151944 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1743609676 [0x67ed5f4c] vs 1564254715 [0x5d3ca1fb])
UVM_INFO @ 2794151944 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 43348639778749950125744988556828422765052676289355606742716802937908676508859 1022
UVM_ERROR @ 6268434720 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1772100908 [0x69a01d2c] vs 1529199906 [0x5b25bd22])
UVM_INFO @ 6268434720 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 69102075384432002812496896145718112291118309657602898335064113507630176780255 1316
UVM_ERROR @ 26223898853 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3666526776 [0xda8ac238])
UVM_INFO @ 26223898853 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 17944971662033124449065651703962329639388008710360438396701101927525364539420 76
UVM_ERROR @ 165055922 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1483510509 [0x586c92ed])
UVM_INFO @ 165055922 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 38472186919284304823980639696228277440984248578849710536108040972131114384402 78
UVM_ERROR @ 221923438 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (353584394 [0x1513450a] vs 1402501074 [0x539877d2])
UVM_INFO @ 221923438 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 37406076125880130722822366068602452997911798889475652538001922224257898273660 80
UVM_ERROR @ 332770085 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (397924838 [0x17b7d9e6] vs 3413198558 [0xcb7146de])
UVM_INFO @ 332770085 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 80274368410175617008727276514399460876691498746050193717678530739832500227686 516
UVM_ERROR @ 1159666012 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3468177381 [0xceb82fe5])
UVM_INFO @ 1159666012 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 113546566252861809598851515547310188629063659873554770188760088911287452160873 872
UVM_ERROR @ 8336843871 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 2907177104 [0xad480090])
UVM_INFO @ 8336843871 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 92174668716350802826445872520557011376327271321965411373542893821591551089745 987
UVM_ERROR @ 1187457712 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2151929225 [0x8043d589])
UVM_INFO @ 1187457712 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 28723925603932300395041770198145709567344774380925193285382332493390743394899 421
UVM_ERROR @ 942670078 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 410402486 [0x18763eb6])
UVM_INFO @ 942670078 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 8215386716540645153369737234855055583276345504411277408250025877543363612027 75
UVM_ERROR @ 1111497 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 638267733 [0x260b3155])
UVM_INFO @ 1111497 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 41711477371274652699186440683190503102024766684828236800732006365232884093128 477
UVM_ERROR @ 858483246 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1214170622 [0x485ec5fe] vs 425673261 [0x195f422d])
UVM_INFO @ 858483246 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 104538160085065763353562927045135293679560855644868681453091863599814466970878 157
UVM_ERROR @ 1668505578 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1917693717 [0x724daf15])
UVM_INFO @ 1668505578 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 93925736433783331548643165391122845448654404790027654601521057075037089294934 710
UVM_ERROR @ 438810639 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1780810872 [0x6a250478])
UVM_INFO @ 438810639 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 25461253878539726802922964772965337625971672404647906088788747630054127919398 373
UVM_ERROR @ 5363769026 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1002151569 [0x3bbb9e91] vs 3672281688 [0xdae29258])
UVM_INFO @ 5363769026 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 1222648690930935797971654160278910053936787943163229842143915781317959312724 522
UVM_ERROR @ 2957321378 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 4078353299 [0xf316bb93])
UVM_INFO @ 2957321378 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 72752046769213209757997914429813227873866523903386867658977789039787332104979 76
UVM_ERROR @ 18500351 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3434563026 [0xccb745d2])
UVM_INFO @ 18500351 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 104740771173404545122726039684594561156931002360299684992940522516409606029904 132
UVM_ERROR @ 630160805 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3249793080 [0xc1b3e838] vs 3693744656 [0xdc2a1210])
UVM_INFO @ 630160805 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 80737143739760131212580530381208717174438543564555916224371798365067081251975 383
UVM_ERROR @ 607607242 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3432364710 [0xcc95baa6])
UVM_INFO @ 607607242 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 32951197764419702849055279392765377942392994848057483965411744105247660042541 435
UVM_ERROR @ 356516661 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 926058808 [0x37328938])
UVM_INFO @ 356516661 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 88016617219264000561176044201186332401080128697137092596285883908483422201951 75
UVM_ERROR @ 7886110 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 4138654920 [0xf6aedcc8])
UVM_INFO @ 7886110 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 91518513021557348755593528386977843372920726691024266884142494361030257948316 827
UVM_ERROR @ 3160164803 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 903456967 [0x35d9a8c7])
UVM_INFO @ 3160164803 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 64621391036697962689989656735930569447319796983949854135012557024099172223033 1284
UVM_ERROR @ 23898784566 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4039693011 [0xf0c8d2d3] vs 3218599116 [0xbfd7eccc])
UVM_INFO @ 23898784566 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 96776514799375938554243131362147858724460693961337063922021175308028391561067 932
UVM_ERROR @ 9320651688 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2797259324 [0xa6baca3c])
UVM_INFO @ 9320651688 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 98348893224324232615027383971766909861594598636084511497087118729274502182032 2804
UVM_ERROR @ 17469703485 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1754408401 [0x689225d1] vs 3443441019 [0xcd3ebd7b])
UVM_INFO @ 17469703485 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 107658385607663483306050079515748727773671417259891765698785100287631727208066 1330
UVM_ERROR @ 13835028951 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 4240931132 [0xfcc7793c])
UVM_INFO @ 13835028951 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 25603680770550988410435585919492541849334853897501771242322457828457658131630 1026
UVM_ERROR @ 16110575961 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3236493478 [0xc0e8f8a6] vs 2548946830 [0x97edd78e])
UVM_INFO @ 16110575961 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 3360743228469664369020514627430845908231483246160830411041529687326977284696 1980
UVM_ERROR @ 5908359009 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1276964057 [0x4c1cecd9])
UVM_INFO @ 5908359009 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 98806877886631584274762267769023113480321556154618687211502315317078688201323 1994
UVM_ERROR @ 4310161773 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (652105568 [0x26de5760] vs 3607075041 [0xd6ff98e1])
UVM_INFO @ 4310161773 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 13746842381109895293911126913661691417100093976525651034995289145580393820350 83
UVM_ERROR @ 1601094930 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1456570461 [0x56d1805d])
UVM_INFO @ 1601094930 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 81972366578383341704876948349642700246580971661192397563691625768054299981502 75
UVM_ERROR @ 4671559 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1785576407 [0x6a6dbbd7])
UVM_INFO @ 4671559 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 88185048954799983071311851570689491090984779575890910148508473283564013615838 260
UVM_ERROR @ 795891313 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1469851478 [0x579c2756] vs 1539684904 [0x5bc5ba28])
UVM_INFO @ 795891313 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 73610807193381586386645140474716261911409809122167087269789976945646676645417 136
UVM_ERROR @ 128616191 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (993091929 [0x3b316159] vs 261538829 [0xf96c40d])
UVM_INFO @ 128616191 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 96757941569942450836570806643277076392972373710075995745273163874553870456002 410
UVM_ERROR @ 3324069999 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2278276011 [0x87cbbbab] vs 1057105763 [0x3f022763])
UVM_INFO @ 3324069999 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 79202458412742348289441813517610752132891379998468903482530813429452792371281 75
UVM_ERROR @ 9282217 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3445578745 [0xcd5f5bf9])
UVM_INFO @ 9282217 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 27647467446419399471184171192829408517251387069446922709827580562515279255742 1575
UVM_ERROR @ 2428745252 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 478213198 [0x1c80f44e])
UVM_INFO @ 2428745252 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 94053214084893644180738426032903627999183732328268219134354286082166176486670 2858
UVM_ERROR @ 13751988318 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1979153706 [0x75f77d2a] vs 2520402336 [0x963a49a0])
UVM_INFO @ 13751988318 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 38020753370919974657509734278169201173727497765235382485885495320314351067208 628
UVM_ERROR @ 5955584334 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 69499611 [0x4247adb])
UVM_INFO @ 5955584334 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 53951390276084950410383662451742588520799646058878045107504064766488430712172 77
UVM_ERROR @ 46314948 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 2003997021 [0x7772915d])
UVM_INFO @ 46314948 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 108668599067883730609211828740110777658930910080226931435682554487609758319426 268
UVM_ERROR @ 4313142681 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1030718780 [0x3d6f853c])
UVM_INFO @ 4313142681 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 7227905656285445268961805931152324878997274749318161333521379272735911605073 1513
UVM_ERROR @ 1727575329 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1208278094 [0x4804dc4e])
UVM_INFO @ 1727575329 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 39843579537903283423873267193634744804058232539135732630469844805872304317503 1097
UVM_ERROR @ 4855945578 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2381247934 [0x8deef5be])
UVM_INFO @ 4855945578 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -*
gpio_stress_all_with_rand_reset 98583119681852450394491183411877226879598977266264235426124143464702869287725 190
UVM_FATAL @ 1591144182 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1591144182 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 109268267604164910263280201077742929065702017465888876018970573525906442443163 78
UVM_FATAL @ 1921430 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1921430 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 50085828341797320269864652119138341698113184415328391545032997408662019272768 194
UVM_FATAL @ 112861693 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 112861693 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 27559678526723687942193594641488223029072682144211684894799659893032027339190 78
UVM_FATAL @ 113511204 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 113511204 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 44262734499230992021463790418104664090632540840921104059081005026449496286938 78
UVM_FATAL @ 2343606 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 2343606 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 45571118252786993602188555231515181627418285120188617793185477603002516507208 78
UVM_FATAL @ 118478443 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 118478443 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 26118039685186662703845744409880134433643935061396545958199069972990738854572 78
UVM_FATAL @ 548500563 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 548500563 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 26204873240532819891291228992790483391961272913700940074689757698326504553734 348
UVM_FATAL @ 2344562202 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 2344562202 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 91723711195221495562581505798543460135082882260298251708778066894490502405374 78
UVM_FATAL @ 4385466 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 4385466 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 9051525032626421959049253155534497230820123608875834714171916647137380903578 78
UVM_FATAL @ 53957218 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 53957218 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 75373024702992077073948238004379772068702345997647818837813099658199421259248 349
UVM_FATAL @ 1232361273 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1232361273 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 50216311019512253717123393839280179263085968670495656828347095855812081026871 291
UVM_FATAL @ 639207586 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 639207586 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 12818369453911077026763208585648822966673951027295903195530213351618976258063 78
UVM_FATAL @ 1541113 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1541113 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 59648555068533630604271566427716200962307212839044928737348053983622845036834 78
UVM_FATAL @ 3298019 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 3298019 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 14531225750396046214576660248106694144184888405471321839130443085074947965488 282
UVM_FATAL @ 257734739 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 257734739 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 27935993571031178005655853575132955805706225060893255895347695984198175764912 78
UVM_FATAL @ 3472449 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 3472449 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 88855925261888684746147430789697605133998972342532681164102492034501267443175 79
UVM_FATAL @ 1163736710 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1163736710 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 105199505015056105704408394460333818572596584078991348685263709883052821392008 79
UVM_FATAL @ 860397126 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 860397126 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 113146753681188715049741970623576815881543846429162650528654687264073239140142 79
UVM_FATAL @ 102234647 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 102234647 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 108526009625123103356826582514766140013297702432327031522569195046216241069602 78
UVM_FATAL @ 1645002504 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1645002504 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 114174704053370473724770948706975204297154122816769524804155316603154980962228 78
UVM_FATAL @ 1717352 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1717352 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 55184467196421935185435267826588859374774558031828700738266806155878164410541 78
UVM_FATAL @ 180596992 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 180596992 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 51488975004677855110549711397524129574664686426504982532541690327308487384029 257
UVM_FATAL @ 2223688665 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 2223688665 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 89617860535698974904994507029329031374728983120817472386395020641071319210655 79
UVM_FATAL @ 90841005 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 90841005 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 44808113835427200333143049185491893071584842026083529250929637812323461085610 78
UVM_FATAL @ 55638118 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 55638118 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1170) [gpio_common_vseq] Check failed (vseq_done)
gpio_stress_all_with_rand_reset 49310288494568625117230711140261796630788820673515548024828183514622546040603 80
UVM_FATAL @ 10819613 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 10819613 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 11379996806772445968783936876344158258726845914879059887089451332792011642198 80
UVM_FATAL @ 84919460 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 84919460 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 99777460305847389161773238144303793099803079697928639418036216053683993873337 80
UVM_FATAL @ 140775789 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 140775789 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 24923454857294235218269196679166859234448500154162965414327191021668949376491 283
UVM_FATAL @ 436007806 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 436007806 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 76991111744190578158124758100717505147144379566046290932133749062348008582133 80
UVM_FATAL @ 104818224 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 104818224 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 46351175992050475059764197946832463944831885523010411179031097119648572961209 80
UVM_FATAL @ 2059878 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2059878 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 70706271224748901696038904015770498421418338869092285001745138050754806032742 83
UVM_FATAL @ 2149519567 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2149519567 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 17505941538643281322607439101462120717236871900158865323530366387333466929291 152
UVM_FATAL @ 370878734 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 370878734 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 40120626224366176210769862257010812480544168095457354389307344327406237642245 377
UVM_FATAL @ 1029284224 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 1029284224 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 113698299844618648649720703078608807413408530589212413299863212252039691016325 80
UVM_FATAL @ 25251578 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 25251578 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 46877914141034084650662875662621212698889998715486385946593664033421652396943 80
UVM_FATAL @ 10940612 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 10940612 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 45521879358956932381426879959102802964417885454759802896726608308486379118217 171
UVM_FATAL @ 366897007 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 366897007 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 58676429412615250016989848350752119686074721843005959422423329527409660326499 80
UVM_FATAL @ 11029466 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 11029466 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 79994030959220154309944156947463110435838548876707002068538252183847566827725 80
UVM_FATAL @ 1800858 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 1800858 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 33043742839286642698054189754135608440428301955521785747184446952824202859161 80
UVM_FATAL @ 46395528 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 46395528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 60130384860158210061782791158580854022359866459669223396504899507646036759665 80
UVM_FATAL @ 79585997 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 79585997 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 65399115881863835057254583224367257946320063131220510280930694018611499314486 273
UVM_FATAL @ 888283513 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 888283513 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 113102981446950581827985120353479319252356322372419510305673886642201240924157 80
UVM_FATAL @ 1648795 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 1648795 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 23255506236861344558927852626485439467787937712388407235562782125646443944243 235
UVM_FATAL @ 557043668 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 557043668 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 57120334397711499708946659910441696629594442171659318851948051010965993319206 230
UVM_FATAL @ 2058361614 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2058361614 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 4996300254056550606082821146244732514831434886538153384427646141791724599583 85
UVM_FATAL @ 21172312 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 21172312 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 63682883591596215250344111626287521611009751054351417348576207583870209761411 80
UVM_FATAL @ 7910065 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 7910065 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 70366117684760823954544128101802279571779181263602945028072007115427578090836 404
UVM_FATAL @ 2584527657 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2584527657 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 115392167171602384673746720763826900987118508232016366659350081155068131339997 80
UVM_FATAL @ 5016490 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 5016490 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 50519170302908523566736844271605041609275489115574881304016256020394566111461 80
UVM_FATAL @ 35001603 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 35001603 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---