Simulation Results: gpio

 
25/04/2026 09:02:00 DVSim: v1.17.3 sha: 8007f61 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 98.37 %
  • code
  • 98.27 %
  • assert
  • 96.84 %
  • func
  • 100.00 %
  • line
  • 99.76 %
  • branch
  • 99.80 %
  • cond
  • 99.57 %
  • toggle
  • 93.94 %
Validation stages
V1
100.00%
V2
93.28%
V2S
100.00%
V3
46.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 200 200 100.00
gpio_smoke 1.780s 135.799us 50 50 100.00
gpio_smoke_no_pullup_pulldown 1.770s 276.140us 50 50 100.00
gpio_smoke_en_cdc_prim 1.290s 341.821us 50 50 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.270s 290.745us 50 50 100.00
csr_hw_reset 5 5 100.00
gpio_csr_hw_reset 0.910s 21.405us 5 5 100.00
csr_rw 20 20 100.00
gpio_csr_rw 0.850s 12.381us 20 20 100.00
csr_bit_bash 5 5 100.00
gpio_csr_bit_bash 2.690s 514.566us 5 5 100.00
csr_aliasing 5 5 100.00
gpio_csr_aliasing 1.210s 140.843us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
gpio_csr_mem_rw_with_rand_reset 1.290s 111.258us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
gpio_csr_rw 0.850s 12.381us 20 20 100.00
gpio_csr_aliasing 1.210s 140.843us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 100 100 100.00
gpio_random_dout_din 1.660s 220.462us 50 50 100.00
gpio_random_dout_din_no_pullup_pulldown 1.640s 222.946us 50 50 100.00
out_in_regs_read_write 50 50 100.00
gpio_dout_din_regs_random_rw 1.320s 752.615us 50 50 100.00
gpio_interrupt_programming 50 50 100.00
gpio_intr_rand_pgm 1.730s 491.382us 50 50 100.00
random_interrupt_trigger 50 50 100.00
gpio_rand_intr_trigger 3.820s 1973.144us 50 50 100.00
interrupt_and_noise_filter 50 50 100.00
gpio_intr_with_filter_rand_intr_event 3.430s 642.378us 50 50 100.00
noise_filter_stress 50 50 100.00
gpio_filter_stress 27.230s 3263.003us 50 50 100.00
regs_long_reads_and_writes 50 50 100.00
gpio_random_long_reg_writes_reg_reads 5.860s 325.301us 50 50 100.00
full_random 50 50 100.00
gpio_full_random 1.450s 92.713us 50 50 100.00
stress_all 5 50 10.00
gpio_stress_all 86.170s 8275.603us 5 50 10.00
alert_test 50 50 100.00
gpio_alert_test 0.950s 119.136us 50 50 100.00
intr_test 50 50 100.00
gpio_intr_test 0.850s 25.616us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
gpio_tl_errors 2.300s 532.378us 20 20 100.00
tl_d_illegal_access 20 20 100.00
gpio_tl_errors 2.300s 532.378us 20 20 100.00
tl_d_outstanding_access 50 50 100.00
gpio_csr_rw 0.850s 12.381us 20 20 100.00
gpio_same_csr_outstanding 1.100s 28.216us 20 20 100.00
gpio_csr_aliasing 1.210s 140.843us 5 5 100.00
gpio_csr_hw_reset 0.910s 21.405us 5 5 100.00
tl_d_partial_access 50 50 100.00
gpio_csr_rw 0.850s 12.381us 20 20 100.00
gpio_same_csr_outstanding 1.100s 28.216us 20 20 100.00
gpio_csr_aliasing 1.210s 140.843us 5 5 100.00
gpio_csr_hw_reset 0.910s 21.405us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 25 25 100.00
gpio_sec_cm 1.510s 394.597us 5 5 100.00
gpio_tl_intg_err 1.460s 323.133us 20 20 100.00
sec_cm_bus_integrity 20 20 100.00
gpio_tl_intg_err 1.460s 323.133us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 46 50 92.00
gpio_rand_straps 0.970s 22.333us 46 50 92.00
stress_all_with_rand_reset 0 50 0.00
gpio_stress_all_with_rand_reset 15.880s 1913.048us 0 50 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:216) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*])
gpio_stress_all 82080795707505553091078351894383854500644614905772733559301530992440254273445 80
UVM_ERROR @ 1207694442 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1609752239 [0x5ff2deaf])
UVM_INFO @ 1207694442 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 71560591594179691372862408516741835562682690094293678474952395923790464184489 1315
UVM_ERROR @ 12525144391 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 632632950 [0x25b53676])
UVM_INFO @ 12525144391 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 108614128487088347817417984960761826770257103123286960114150800708371996967333 76
UVM_ERROR @ 52425393 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 2335846887 [0x8b3a31e7])
UVM_INFO @ 52425393 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 105649040087578205250837917827886875991410885770143408423243843566680098427392 431
UVM_ERROR @ 11250023414 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2301760986 [0x893215da] vs 712573333 [0x2a790195])
UVM_INFO @ 11250023414 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 12274750588653394795987068378435964985012047987676419033865221081183622402030 601
UVM_ERROR @ 2089857720 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3401101280 [0xcab8afe0])
UVM_INFO @ 2089857720 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 109178760469488812623356161443814258175841899569211865380627028668496282797725 816
UVM_ERROR @ 1554668083 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3393648017 [0xca46f591] vs 2430458329 [0x90ddd9d9])
UVM_INFO @ 1554668083 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 58744645300330835750461340573529365709360767314466363229294349414994770871764 374
UVM_ERROR @ 6018909922 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 2047559729 [0x7a0b4831])
UVM_INFO @ 6018909922 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 90061408908887017454937833668922358620308253979216941311881779060993995396858 163
UVM_ERROR @ 136884371 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1285128286 [0x4c99805e] vs 24862468 [0x17b5f04])
UVM_INFO @ 136884371 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 112009201191811496415367151499584589115916509085704472983719761074538730113212 76
UVM_ERROR @ 2222533087 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2597028273 [0x9acb81b1] vs 1895537006 [0x70fb996e])
UVM_INFO @ 2222533087 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 47338712135484919396856916911738530192778991366085965249476059568113384664043 563
UVM_ERROR @ 501860376 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1796756897 [0x6b1855a1] vs 1892775520 [0x70d17660])
UVM_INFO @ 501860376 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 104978395417676693640182031147325483157437188032656736487942149811172023704914 75
UVM_ERROR @ 2235805 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1015579703 [0x3c888437])
UVM_INFO @ 2235805 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 83702391596301493139108952521002445358605140164440228493104132422804647751115 132
UVM_ERROR @ 746541960 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3367062688 [0xc8b14ca0])
UVM_INFO @ 746541960 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 105589776468714858456324317089899439637518427290939173785885373240011093455136 537
UVM_ERROR @ 4092936389 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 4164528966 [0xf839ab46])
UVM_INFO @ 4092936389 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 15797552897706069529037217467120339530176151589026949266739191093741179015653 2023
UVM_ERROR @ 13571193258 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2622249574 [0x9c4c5a66] vs 2544822667 [0x97aee98b])
UVM_INFO @ 13571193258 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 93974431201747876534424120509031177357533695023650897902853369226522781551223 76
UVM_ERROR @ 75691436 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3117760301 [0xb9d53f2d])
UVM_INFO @ 75691436 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 69294081952646957332491896515948714314673416168515984395415446368957510757764 471
UVM_ERROR @ 1341461221 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (767048461 [0x2db83b0d] vs 2375465069 [0x8d96b86d])
UVM_INFO @ 1341461221 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 57455979774003147404741753061452196989303190154944008749718232038536580007961 308
UVM_ERROR @ 1727406647 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3820456910 [0xe3b78bce] vs 529766527 [0x1f93987f])
UVM_INFO @ 1727406647 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 87461215071882270393895816545295251627002329767928140945389449012790674329643 1002
UVM_ERROR @ 4039682293 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2170707526 [0x81625e46])
UVM_INFO @ 4039682293 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 82115593802394945544861057344905540131771593801056275498508657955892611779158 1120
UVM_ERROR @ 2478545330 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1217186284 [0x488cc9ec] vs 3690750533 [0xdbfc6245])
UVM_INFO @ 2478545330 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 95987440405772745109873259636895074719934037106694059041448454013812317374283 1411
UVM_ERROR @ 1690174112 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1007734869 [0x3c10d055] vs 2914091686 [0xadb182a6])
UVM_INFO @ 1690174112 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 76010519865508472211513486793927642617914505878948268185888238334162242667340 396
UVM_ERROR @ 1160238647 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2531240064 [0x96dfa880] vs 2660441141 [0x9e931c35])
UVM_INFO @ 1160238647 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 61729026182332735687659186991460216919147232741030948939190498740002898472929 1390
UVM_ERROR @ 10288345366 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1324755152 [0x4ef628d0])
UVM_INFO @ 10288345366 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 115228956360458564338681666789492190901258589940904098568440353109547930074214 290
UVM_ERROR @ 719300535 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3737444330 [0xdec4dfea])
UVM_INFO @ 719300535 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 37314408056533207112923560376046746626172090427710185229120495463615920307431 1085
UVM_ERROR @ 3871900050 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 950333619 [0x38a4f0b3])
UVM_INFO @ 3871900050 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 18763769447202734739595375498653996658812612935381086446278420179882776347230 2668
UVM_ERROR @ 9497416029 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 798627172 [0x2f9a1564])
UVM_INFO @ 9497416029 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 84015655193716068278359582354590423676692937861380512647959582055289245030416 75
UVM_ERROR @ 10733678 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1979669390 [0x75ff5b8e])
UVM_INFO @ 10733678 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 38886873170330595958091960177804799766635956432235472116815965224739127923979 734
UVM_ERROR @ 2155511331 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2915606214 [0xadc89ec6] vs 1766302891 [0x6947a4ab])
UVM_INFO @ 2155511331 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 102128484687338447686035965109013573365645822447970242839259917848568452925390 1891
UVM_ERROR @ 2184861794 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1042657908 [0x3e25b274] vs 4266903398 [0xfe53c766])
UVM_INFO @ 2184861794 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 30967824393854741062579182004064199254661836478367014459255315185601773547118 1280
UVM_ERROR @ 11741069029 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3600289478 [0xd6980ec6] vs 2826696835 [0xa87bf883])
UVM_INFO @ 11741069029 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 78214918093340160151584232920516314205964209961271351261923892941784555412003 1214
UVM_ERROR @ 2683961820 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2122514038 [0x7e82fe76])
UVM_INFO @ 2683961820 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 85703347093766747284779471307072220771695999568119004660434241835985534231320 76
UVM_ERROR @ 8364566 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 776779293 [0x2e4cb61d])
UVM_INFO @ 8364566 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 35818163532994135265692208500607412188289052388655985200363435856502456090175 80
UVM_ERROR @ 469704746 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 571487559 [0x22103547])
UVM_INFO @ 469704746 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 31423324063952247919873611934821581765141753684177492661129264475578056067622 75
UVM_ERROR @ 1382586 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 1474503200 [0x57e32220])
UVM_INFO @ 1382586 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 60292841151006030881787101016755164138635865072266116435986818824332432833490 1288
UVM_ERROR @ 14135510893 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1246407946 [0x4a4aad0a] vs 2316247873 [0x8a0f2341])
UVM_INFO @ 14135510893 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 41456394809043975055750413393998270440833791354752921093260675431874324665035 668
UVM_ERROR @ 985079041 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (312417218 [0x129f1bc2] vs 441356841 [0x1a4e9229])
UVM_INFO @ 985079041 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 114872465002176557491966299247010799777321257455475867097563337165371004450045 395
UVM_ERROR @ 15791048178 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3073406173 [0xb73074dd])
UVM_INFO @ 15791048178 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 10886928386928393662018518700494597571730475100060891916747884334770383948331 75
UVM_ERROR @ 3956325 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 339977466 [0x1443a4fa])
UVM_INFO @ 3956325 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 77258762436993403970390111890801864302135077889824108161499128090414085670321 116
UVM_ERROR @ 488889415 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 723361722 [0x2b1d9fba])
UVM_INFO @ 488889415 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 82405729312054852784387560369717886851981247556430134798422234197076730283657 81
UVM_ERROR @ 226467726 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3438093931 [0xcced266b])
UVM_INFO @ 226467726 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 40229838583484409904085348792830295518068563456416925986666615500515973277713 122
UVM_ERROR @ 1074133117 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 3161801691 [0xbc7543db])
UVM_INFO @ 1074133117 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 22628936248884101236944080140956632126209290436465677709421183120397376114458 225
UVM_ERROR @ 1801632747 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4050248773 [0xf169e445])
UVM_INFO @ 1801632747 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 31881740153444091591952250480251100250732610618042944063674333737627156410102 725
UVM_ERROR @ 12141654384 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1273750888 [0x4bebe568])
UVM_INFO @ 12141654384 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 106350607563177433372313576760978883294509268744240251660013291779797565506160 81
UVM_ERROR @ 2945884832 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2247496087 [0x85f61197] vs 499975578 [0x1dcd059a])
UVM_INFO @ 2945884832 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 50104310101636100759813707131611930785680249798216600130946249350264702233606 75
UVM_ERROR @ 1161335 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1278803328 [0x4c38fd80])
UVM_INFO @ 1161335 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 24203267683386831704607356777357926633832049931841822896809205840026472355865 82
UVM_ERROR @ 1565199543 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1708246281 [0x65d1c509] vs 743777549 [0x2c55250d])
UVM_INFO @ 1565199543 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 107104360760302593358496044013380958581091077194284288469177656509076820422079 375
UVM_ERROR @ 489483751 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4230087528 [0xfc220368] vs 1712766172 [0x6616bcdc])
UVM_INFO @ 489483751 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 113278220655863806914284083845468206238341324152819678037386272405516451896351 400
UVM_ERROR @ 7717542537 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3407845915 [0xcb1f9a1b] vs 1144152314 [0x443260fa])
UVM_INFO @ 7717542537 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 96179497491091002393525137134852149116999045520206078867294446474277179827045 264
UVM_ERROR @ 246892878 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3716566153 [0xdd864c89] vs 4230935734 [0xfc2ef4b6])
UVM_INFO @ 246892878 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 94943970198237904189974891582020976804235874044184204358676141163870906371330 258
UVM_ERROR @ 1730777369 ps: (gpio_scoreboard.sv:216) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4294967295 [0xffffffff] vs 2007760120 [0x77abfcf8])
UVM_INFO @ 1730777369 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -*
gpio_stress_all_with_rand_reset 82076939114881997885736162921000196121276185113042578821594374383559909070129 80
UVM_FATAL @ 274945558 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 274945558 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 115016738812580024285715895973956246666216472793162287216776654512907585410813 78
UVM_FATAL @ 3927381 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 3927381 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 4662593509596419172020032625534778964899038893759738718450606112858509672436 78
UVM_FATAL @ 1945495 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 1945495 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 28543566421339896940466629831838556985722734928023295575531563799902528763074 79
UVM_FATAL @ 1022809100 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 1022809100 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 74115031641675136189970967688443740872511144682478207681948461326235028166505 80
UVM_FATAL @ 305157570 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 305157570 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 29637860614249387660044988309731801697837356068873661487175912266110283086887 171
UVM_FATAL @ 313333810 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 313333810 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 44795007351927259886445815310221153643775188919034645787945967115572856982251 80
UVM_FATAL @ 298407071 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 298407071 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 38953029585376660972163209015103910392310485885269425940269579021901471124774 78
UVM_FATAL @ 21042505 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 21042505 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 103235288510503289873869973437500180379612517954149580278273745558081134494051 78
UVM_FATAL @ 63082287 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 63082287 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 87023380556922253964040247635662985962369010546222173812223615362948381336821 78
UVM_FATAL @ 3365991 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 3365991 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 112365769118283085581867334537234927745224396662424662639779165470953702061761 246
UVM_FATAL @ 663790490 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 663790490 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 45303769247473658841852824239834367997440161548204546764035136764410599095458 81
UVM_FATAL @ 900442093 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 900442093 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 31140927219002402014823464822332568781363647980016078912338507821272531262541 81
UVM_FATAL @ 990898121 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 990898121 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 78638080009940148833451757356632868081931775647387000250173518966456478077364 524
UVM_FATAL @ 1913047999 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 1913047999 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 8789041675548909250081295321385664073071079380509000575049205770305109047400 78
UVM_FATAL @ 366330964 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 366330964 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 48378326080968588126836595409490860142719162422959672970546973573800417378209 175
UVM_FATAL @ 2013256990 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 2013256990 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 108465865844614045773773192381963500277527848421675819482876653298492977735264 78
UVM_FATAL @ 8942502 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 8942502 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 103865025738865218141198072085929141735607142058020681927499067973339522413588 129
UVM_FATAL @ 1789085891 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 1789085891 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 41160275970891259586116985609863589404250656704642685960801680773478139947988 78
UVM_FATAL @ 7911943 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 7911943 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 68015751000761427758445949371361335321786069023733312488852128940869407650588 79
UVM_FATAL @ 122910492 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 122910492 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 63939103140393693536997631058281155300115123271324797061141684147596771346323 78
UVM_FATAL @ 129778133 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 129778133 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 77032631806572936457905648237984078641355601123458100645366861330358280820100 80
UVM_FATAL @ 279780297 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -1
UVM_INFO @ 279780297 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1170) [gpio_common_vseq] Check failed (vseq_done)
gpio_stress_all_with_rand_reset 37641980859432072683014330550411562192992863678991499287054551863667374615671 80
UVM_FATAL @ 19624446 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 19624446 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 101594822700634692360693819033421745888227886217359886307722321009915586550860 116
UVM_FATAL @ 153935577 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 153935577 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 50306544233847691503206506110596973661260487932478741986892318514969613506276 80
UVM_FATAL @ 1745089 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 1745089 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 12668918127835290943340298063028347297827429323245827820380975677666574433749 80
UVM_FATAL @ 13002324 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 13002324 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 49029670381060730427416226379917142693484541541747092782215433229564048217258 82
UVM_FATAL @ 969868485 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 969868485 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 47944377910220739692074415829332337743278504700156018798222174799177279247337 82
UVM_FATAL @ 592696800 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 592696800 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 106367345941314281159054234236484053975550082727518546908423198830416481701570 190
UVM_FATAL @ 246506125 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 246506125 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 56043294327786427501007394222051841903999065291882265805669648329070582483381 82
UVM_FATAL @ 633798729 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 633798729 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 61651052375989498654877040130194958881143663695883315126715972857816557839482 80
UVM_FATAL @ 38776356 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 38776356 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 36606875345103840069358288458273825497994941905726699877173309331307520864514 80
UVM_FATAL @ 17517464 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 17517464 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 53178128508836270498594038065329894594100757650795211939366491802231876596109 80
UVM_FATAL @ 6972118 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 6972118 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 67615350481451888581347925203681291708368434232310058938058657459402394372286 80
UVM_FATAL @ 6117005 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 6117005 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 83079443453525960008671970969910476206480453643858464581009497959219730325363 327
UVM_FATAL @ 973855285 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 973855285 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 76215390834091380020472728764598893800655922383131501054439511932889876994727 187
UVM_FATAL @ 496074302 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 496074302 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 51587672733300188520243250679036818725053084962175445026910818524354375168096 80
UVM_FATAL @ 5486032 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 5486032 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 108491156577622057069717176410304357772542608849445710723557361228084401425279 80
UVM_FATAL @ 436160655 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 436160655 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 6140784282526721634501845436258402166406917711899063474510897798729613750338 80
UVM_FATAL @ 4611625 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 4611625 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 72565540551470762786243194100685909398909568582021623572428448625654999573381 80
UVM_FATAL @ 30906664 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 30906664 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 3435459397888299952579229362738153536990551233641945187175282934194876770161 88
UVM_FATAL @ 911534675 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 911534675 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 86469828826267307529843907166549684876440129700693079515950935514648860112776 241
UVM_FATAL @ 1433161281 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 1433161281 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 39843252290087584472449980176250415611637509713214280663225576842766921697599 349
UVM_FATAL @ 633038970 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 633038970 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 66026126444114565148877352206181319335120172091857258793994919345042396099603 81
UVM_FATAL @ 292975227 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 292975227 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 111723482663953509370362928722379536461458547730192775125058518100596756188542 80
UVM_FATAL @ 25293673 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 25293673 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 59408806723751950978649692853737782780784366856475558114215130738731049308683 80
UVM_FATAL @ 43014520 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 43014520 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 40351901829417654347261666416539523128010815752226829237779979058186878283686 105
UVM_FATAL @ 255612574 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 255612574 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 105519722677564845646538274263667540699322354300641811620704524312355991816757 80
UVM_FATAL @ 8866486 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 8866486 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 98867632876738043431687640789183714889383468716363991715907144466925141232718 148
UVM_FATAL @ 774514375 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 774514375 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 42297768683714985297131529031215688288564904856431991440500544219960187769076 166
UVM_FATAL @ 756484140 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 756484140 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---