Simulation Results: pwrmgr

 
25/04/2026 09:02:00 DVSim: v1.17.3 sha: 8007f61 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 96.30 %
  • code
  • 94.69 %
  • assert
  • 96.34 %
  • func
  • 97.86 %
  • line
  • 98.92 %
  • branch
  • 95.61 %
  • cond
  • 94.91 %
  • toggle
  • 90.02 %
  • FSM
  • 94.00 %
Validation stages
V1
100.00%
V2
93.16%
V2S
93.42%
V3
72.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 50 50 100.00
pwrmgr_smoke 1.020s 24.720us 50 50 100.00
csr_hw_reset 5 5 100.00
pwrmgr_csr_hw_reset 1.000s 30.416us 5 5 100.00
csr_rw 20 20 100.00
pwrmgr_csr_rw 1.040s 24.789us 20 20 100.00
csr_bit_bash 5 5 100.00
pwrmgr_csr_bit_bash 2.830s 1255.350us 5 5 100.00
csr_aliasing 5 5 100.00
pwrmgr_csr_aliasing 1.290s 66.279us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
pwrmgr_csr_mem_rw_with_rand_reset 1.690s 167.290us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
pwrmgr_csr_rw 1.040s 24.789us 20 20 100.00
pwrmgr_csr_aliasing 1.290s 66.279us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
wakeup 50 50 100.00
pwrmgr_wakeup 1.310s 211.272us 50 50 100.00
control_clks 50 50 100.00
pwrmgr_wakeup 1.310s 211.272us 50 50 100.00
aborted_low_power 100 100 100.00
pwrmgr_aborted_low_power 1.100s 78.468us 50 50 100.00
pwrmgr_lowpower_invalid 1.060s 40.615us 50 50 100.00
reset 80 100 80.00
pwrmgr_reset 2.580s 1000.000us 41 50 82.00
pwrmgr_reset_invalid 1.090s 173.340us 39 50 78.00
main_power_glitch_reset 41 50 82.00
pwrmgr_reset 2.580s 1000.000us 41 50 82.00
reset_wakeup_race 50 50 100.00
pwrmgr_wakeup_reset 1.420s 222.577us 50 50 100.00
lowpower_wakeup_race 50 50 100.00
pwrmgr_lowpower_wakeup_race 1.260s 322.100us 50 50 100.00
disable_rom_integrity_check 40 50 80.00
pwrmgr_disable_rom_integrity_check 2.460s 1000.000us 40 50 80.00
stress_all 41 50 82.00
pwrmgr_stress_all 25.290s 10328.665us 41 50 82.00
intr_test 50 50 100.00
pwrmgr_intr_test 1.000s 20.363us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
pwrmgr_tl_errors 2.900s 145.212us 20 20 100.00
tl_d_illegal_access 20 20 100.00
pwrmgr_tl_errors 2.900s 145.212us 20 20 100.00
tl_d_outstanding_access 50 50 100.00
pwrmgr_csr_hw_reset 1.000s 30.416us 5 5 100.00
pwrmgr_csr_rw 1.040s 24.789us 20 20 100.00
pwrmgr_csr_aliasing 1.290s 66.279us 5 5 100.00
pwrmgr_same_csr_outstanding 1.340s 38.684us 20 20 100.00
tl_d_partial_access 50 50 100.00
pwrmgr_csr_hw_reset 1.000s 30.416us 5 5 100.00
pwrmgr_csr_rw 1.040s 24.789us 20 20 100.00
pwrmgr_csr_aliasing 1.290s 66.279us 5 5 100.00
pwrmgr_same_csr_outstanding 1.340s 38.684us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 0 25 0.00
pwrmgr_tl_intg_err 0.950s 8.178us 0 20 0.00
pwrmgr_sec_cm 1.110s 27.984us 0 5 0.00
prim_count_check 0 5 0.00
pwrmgr_sec_cm 1.110s 27.984us 0 5 0.00
prim_fsm_check 0 5 0.00
pwrmgr_sec_cm 1.110s 27.984us 0 5 0.00
sec_cm_bus_integrity 0 20 0.00
pwrmgr_tl_intg_err 0.950s 8.178us 0 20 0.00
sec_cm_lc_ctrl_intersig_mubi 49 50 98.00
pwrmgr_sec_cm_lc_ctrl_intersig_mubi 3.630s 834.753us 49 50 98.00
sec_cm_rom_ctrl_intersig_mubi 50 50 100.00
pwrmgr_wakeup_reset 1.420s 222.577us 50 50 100.00
sec_cm_rstmgr_intersig_mubi 50 50 100.00
pwrmgr_sec_cm_rstmgr_intersig_mubi 1.210s 69.895us 50 50 100.00
sec_cm_esc_rx_clk_bkgn_chk 50 50 100.00
pwrmgr_esc_clk_rst_malfunc 0.930s 32.361us 50 50 100.00
sec_cm_esc_rx_clk_local_esc 0 5 0.00
pwrmgr_sec_cm 1.110s 27.984us 0 5 0.00
sec_cm_fsm_sparse 0 5 0.00
pwrmgr_sec_cm 1.110s 27.984us 0 5 0.00
sec_cm_fsm_terminal 0 5 0.00
pwrmgr_sec_cm 1.110s 27.984us 0 5 0.00
sec_cm_ctrl_flow_global_esc 50 50 100.00
pwrmgr_global_esc 0.950s 46.335us 50 50 100.00
sec_cm_main_pd_rst_local_esc 50 50 100.00
pwrmgr_glitch 0.860s 46.704us 50 50 100.00
sec_cm_ctrl_config_regwen 50 50 100.00
pwrmgr_sec_cm_ctrl_config_regwen 1.520s 215.376us 50 50 100.00
sec_cm_wakeup_config_regwen 20 20 100.00
pwrmgr_csr_rw 1.040s 24.789us 20 20 100.00
sec_cm_reset_config_regwen 20 20 100.00
pwrmgr_csr_rw 1.040s 24.789us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
escalation_timeout 26 50 52.00
pwrmgr_escalation_timeout 1.250s 423.488us 26 50 52.00
stress_all_with_rand_reset 46 50 92.00
pwrmgr_stress_all_with_rand_reset 14.080s 16481.947us 46 50 92.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_vseq.sv:1022) virtual_sequencer [pwrmgr_common_vseq] expect alert:fatal_fault to fire
pwrmgr_tl_intg_err 58598159124146324504228376507037307586273446819436268421272618996320907750502 85
UVM_ERROR @ 15061091 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] expect alert:fatal_fault to fire
UVM_INFO @ 15061091 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 31428848574257066287211844240505676819331135424985739190247043726608310837754 82
UVM_ERROR @ 9976446 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] expect alert:fatal_fault to fire
UVM_INFO @ 9976446 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 102156290259069798965387815406430002351248143202938437188637874304651035742389 82
UVM_ERROR @ 15094167 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] expect alert:fatal_fault to fire
UVM_INFO @ 15094167 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 86336835062121235058831662120383364579504538218907510007667907847870421938741 78
UVM_ERROR @ 9466897 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] expect alert:fatal_fault to fire
UVM_INFO @ 9466897 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 77241598712688895567107195179691429805115203163840333137370115291517922634679 78
UVM_ERROR @ 10757812 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] expect alert:fatal_fault to fire
UVM_INFO @ 10757812 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 88753772283083038370124297461213841876505330440310845511412367995435831775509 78
UVM_ERROR @ 10654168 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] expect alert:fatal_fault to fire
UVM_INFO @ 10654168 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 55674704065827676785498431933026158066092440013015891019889361276563348102170 82
UVM_ERROR @ 8044873 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] expect alert:fatal_fault to fire
UVM_INFO @ 8044873 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 70243589501155135202855911450618822639578422762882423514233588523445635871892 85
UVM_ERROR @ 11186823 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] expect alert:fatal_fault to fire
UVM_INFO @ 11186823 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 65073047831639529849705731293828159407195181280473693714202920340988917065929 82
UVM_ERROR @ 9801431 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] expect alert:fatal_fault to fire
UVM_INFO @ 9801431 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 11076631067069968200499064689681248639795856152692767554054904274263987493487 82
UVM_ERROR @ 35844489 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] expect alert:fatal_fault to fire
UVM_INFO @ 35844489 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 54445695627563311869465566216126449917353160304239597607400027463157572594931 85
UVM_ERROR @ 8177734 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] expect alert:fatal_fault to fire
UVM_INFO @ 8177734 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 80871982454597705039082499415708197271577718303422852971459752491805965887096 82
UVM_ERROR @ 8205285 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] expect alert:fatal_fault to fire
UVM_INFO @ 8205285 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 19205394481420063320108838010667465333648507788057723802348849749423803264246 82
UVM_ERROR @ 10954330 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] expect alert:fatal_fault to fire
UVM_INFO @ 10954330 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 98673141604182864533183706417933402844403565325553060617172234272569839859794 78
UVM_ERROR @ 16915260 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] expect alert:fatal_fault to fire
UVM_INFO @ 16915260 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 7350429020568637981398774236258711070971977329332575660575037918729016752246 82
UVM_ERROR @ 11799300 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] expect alert:fatal_fault to fire
UVM_INFO @ 11799300 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 32765098803225641719638670060579524013604427983812634892118877655239819698137 78
UVM_ERROR @ 8364694 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] expect alert:fatal_fault to fire
UVM_INFO @ 8364694 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 76777656743500242100370150568844695414355347606003139271572390582864514925809 82
UVM_ERROR @ 9427328 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] expect alert:fatal_fault to fire
UVM_INFO @ 9427328 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 56461060177237363190664672412056459160968866268600795803814795439643697443426 78
UVM_ERROR @ 19792173 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] expect alert:fatal_fault to fire
UVM_INFO @ 19792173 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 41285114769194438767666632383587012034301250667956448790178534353943456014120 82
UVM_ERROR @ 21866548 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] expect alert:fatal_fault to fire
UVM_INFO @ 21866548 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 85932438265029664473235556904259484148333003994978922432682188413182452278548 85
UVM_ERROR @ 12096222 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] expect alert:fatal_fault to fire
UVM_INFO @ 12096222 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_sec_cm 40131768383041553923122759474435584634590333998247720928509844556429077920190 84
UVM_ERROR @ 27983736 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] expect alert:fatal_fault to fire
UVM_INFO @ 27983736 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_sec_cm 58557791639367212414548951366776346129542372660402325291702027036753502883696 78
UVM_ERROR @ 12214698 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] expect alert:fatal_fault to fire
UVM_INFO @ 12214698 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_sec_cm 19243521834733978573485254837925228811956656283586529835011852275241936615739 78
UVM_ERROR @ 26225817 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] expect alert:fatal_fault to fire
UVM_INFO @ 26225817 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_sec_cm 109461644968135004644048262333327167396873944822874728986027328147680430102328 77
UVM_ERROR @ 6909703 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] expect alert:fatal_fault to fire
UVM_INFO @ 6909703 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_sec_cm 52696020659017134454333909095105873876197632468665701368513576100619385387992 77
UVM_ERROR @ 6385981 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] expect alert:fatal_fault to fire
UVM_INFO @ 6385981 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!clk_en) || status)'
pwrmgr_escalation_timeout 19898688374464776485510830583703045582736289022644139811561171834262916300804 79
Offending '((!clk_en) || status)'
UVM_ERROR @ 423488004 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 423488004 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 52614058770477957320503746799799371849266501295718208986497402647552017957750 79
Offending '((!clk_en) || status)'
UVM_ERROR @ 98835928 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 98835928 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 35384758781802411656648008672220896450171564742268380831704947998036878490229 79
Offending '((!clk_en) || status)'
UVM_ERROR @ 169468722 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 169468722 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 39091615360997669378917343374429240387241653598611506870655817920237572354703 79
Offending '((!clk_en) || status)'
UVM_ERROR @ 106412834 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 106412834 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 43073447007148110910203916917578470035031019689312337061448872215609792963392 79
Offending '((!clk_en) || status)'
UVM_ERROR @ 358080981 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 358080981 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 78361606314520943842979080299395428712554944507040219471276873688496833900008 79
Offending '((!clk_en) || status)'
UVM_ERROR @ 729880900 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 729880900 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 110911970000675131603499264183628647219800235982802223028554368235738670893644 79
Offending '((!clk_en) || status)'
UVM_ERROR @ 974605469 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 974605469 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 6172095560840466246545786806466949636572153069222392260422795629913297605524 79
Offending '((!clk_en) || status)'
UVM_ERROR @ 101931159 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 101931159 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 83545625711585624767149174132240974798884407536514438249601578814102559272257 79
Offending '((!clk_en) || status)'
UVM_ERROR @ 130130566 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 130130566 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 87848864412592607112194983719506889352072353246492334728056243101103043213557 79
Offending '((!clk_en) || status)'
UVM_ERROR @ 184277827 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 184277827 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 10214024037900243359917802258664635251878953137600390023796314478314003721692 79
Offending '((!clk_en) || status)'
UVM_ERROR @ 1740597402 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 1740597402 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 91595653267388112026782516202919346546662647559791864653609879329840265082505 79
Offending '((!clk_en) || status)'
UVM_ERROR @ 100175047 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 100175047 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 111497122674877616024017135475822232561050063113953849977600756189093328601234 79
Offending '((!clk_en) || status)'
UVM_ERROR @ 355974779 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 355974779 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 32852911726470099364434766982771736842265697654548699201467970398250490338416 79
Offending '((!clk_en) || status)'
UVM_ERROR @ 1739748876 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 1739748876 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 91851531776825949273285804427016621250062522751546104759810776972628018687294 79
Offending '((!clk_en) || status)'
UVM_ERROR @ 343484368 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 343484368 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 84607231563236783893082571565409424295118813471787079558600409623093192464347 79
Offending '((!clk_en) || status)'
UVM_ERROR @ 104359574 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 104359574 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 29933224666111515348296333776200624612319342333983856236128223366916890756378 79
Offending '((!clk_en) || status)'
UVM_ERROR @ 369010418 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 369010418 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 56626226887357236046993113905146195315950920046734747725539027311677000540939 79
Offending '((!clk_en) || status)'
UVM_ERROR @ 99150771 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 99150771 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 66339827411018698280234892247180200527009905848880530815015066325092286487378 79
Offending '((!clk_en) || status)'
UVM_ERROR @ 520694859 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 520694859 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 28779545846100812453537138954266130911314800702421001261321736097606698807303 79
Offending '((!clk_en) || status)'
UVM_ERROR @ 370526884 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 370526884 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 55769540512127867171454083295620782280272852038973102724161510014446286476866 79
Offending '((!clk_en) || status)'
UVM_ERROR @ 189887087 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 189887087 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 89225971526487802961984095607098094257961096903775350605490496289679501709838 79
Offending '((!clk_en) || status)'
UVM_ERROR @ 102606537 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 102606537 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 8849425118632423946645725987946770196540874705581719399456394166226906520688 79
Offending '((!clk_en) || status)'
UVM_ERROR @ 355811130 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 355811130 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (pwrmgr_reset_vseq.sv:62) [pwrmgr_reset_vseq] wait timeout occurred!
pwrmgr_stress_all 81578140386056934832938335801723277581069439693030594114489663787506552496823 903
UVM_FATAL @ 12196767049 ps: (pwrmgr_reset_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.pwrmgr_reset_vseq] wait timeout occurred!
UVM_INFO @ 12196767049 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_stress_all 83711468648228039742351043710843423400871785118888123614457175935021850403700 133
UVM_FATAL @ 10062777405 ps: (pwrmgr_reset_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.pwrmgr_reset_vseq] wait timeout occurred!
UVM_INFO @ 10062777405 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_stress_all 30404764901937889781953967859698883934456007122332758105603066414426624862186 508
UVM_FATAL @ 10832790554 ps: (pwrmgr_reset_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.pwrmgr_reset_vseq] wait timeout occurred!
UVM_INFO @ 10832790554 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_stress_all 21131973837892667012474972955541096797520827076596996111168996289319887002767 178
UVM_FATAL @ 10161293238 ps: (pwrmgr_reset_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.pwrmgr_reset_vseq] wait timeout occurred!
UVM_INFO @ 10161293238 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_stress_all 85689936712982448979888882690125641833259009035372990238379792288330058644957 851
UVM_FATAL @ 10792075942 ps: (pwrmgr_reset_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.pwrmgr_reset_vseq] wait timeout occurred!
UVM_INFO @ 10792075942 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_stress_all 33126703140367712281528243230836537578791437806700381710364068698214907015712 377
UVM_FATAL @ 10868055913 ps: (pwrmgr_reset_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.pwrmgr_reset_vseq] wait timeout occurred!
UVM_INFO @ 10868055913 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_stress_all 18157601744502381275241260651366103790305250495205196719101859264262555941404 234
UVM_FATAL @ 10258069128 ps: (pwrmgr_reset_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.pwrmgr_reset_vseq] wait timeout occurred!
UVM_INFO @ 10258069128 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_stress_all 79013263198936675651495307515847869032566277812054647482029421883797277289997 172
UVM_FATAL @ 10285468028 ps: (pwrmgr_reset_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.pwrmgr_reset_vseq] wait timeout occurred!
UVM_INFO @ 10285468028 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_stress_all 69127735515156804056143577103989369931941632459484284231636494659040347448940 486
UVM_FATAL @ 10328664795 ps: (pwrmgr_reset_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.pwrmgr_reset_vseq] wait timeout occurred!
UVM_INFO @ 10328664795 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue
pwrmgr_reset 108434636295100867418441563629595082687920361088344971061370440760455873788507 123
UVM_FATAL @ 1000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 1000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 1000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_disable_rom_integrity_check 54382142490923572291583869758418213009907983124494514957003641811114114874204 77
UVM_FATAL @ 1000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 1000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 1000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_reset 74141702101444535618743886162306781029164888229544850306265880010251995058528 106
UVM_FATAL @ 1000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 1000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 1000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_disable_rom_integrity_check 43376502717284405144897375354358446991805111873129369188987276038955314730544 84
UVM_FATAL @ 1000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 1000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 1000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_disable_rom_integrity_check 39006071475621914641813368958399241562386853373114787332986486194518785411185 87
UVM_FATAL @ 1000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 1000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 1000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_disable_rom_integrity_check 80723487255102988231329082351403522977857023526552863525855503746477836069778 84
UVM_FATAL @ 1000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 1000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 1000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_reset 31819334033205280756768954308715742643327682342255502683023023966863754918792 77
UVM_FATAL @ 1000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 1000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 1000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_sec_cm_lc_ctrl_intersig_mubi 86738427666832278423698757094351148025771909993006324430939165779001249335699 435
UVM_FATAL @ 3000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 3000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 3000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_disable_rom_integrity_check 39240551951103217468807169467559048781748244492673507581092722924207404140015 180
UVM_FATAL @ 1000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 1000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 1000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_reset 35417099487607371674813555944469849296229114732725320228859687293483069380221 88
UVM_FATAL @ 1000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 1000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 1000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_reset 27219151605579318121606726253631766382978723821218653512195476564059423971820 80
UVM_FATAL @ 1000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 1000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 1000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_reset 6883475710137625538881126263996321084822858352744745546636210149627487969156 150
UVM_FATAL @ 1000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 1000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 1000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_disable_rom_integrity_check 85802896031858985237179833589455858308753787270677079516977782796059995177804 104
UVM_FATAL @ 1000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 1000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 1000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_disable_rom_integrity_check 11256114182089727663955024304980813781942891620287557269932238423365187420257 85
UVM_FATAL @ 1000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 1000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 1000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_reset 47756430065669126209869903661425804762320836402599908706500427497327832538937 145
UVM_FATAL @ 1000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 1000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 1000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_reset 5034452359952233893566882952169376893059975415571378409713624295284932056242 133
UVM_FATAL @ 1000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 1000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 1000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_disable_rom_integrity_check 64299071085265444129277642819474354298563658468390195410244544844782453141907 130
UVM_FATAL @ 1000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 1000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 1000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_disable_rom_integrity_check 97868813134868767907970351033299431800341707952671894610042909552307737848897 83
UVM_FATAL @ 1000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 1000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 1000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_reset 106649810168917754184054087371030523173460518319374874013692653427366546804681 115
UVM_FATAL @ 1000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 1000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 1000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (alert_receiver_driver.sv:218) [driver] Check failed (cfg.vif.receiver_cb.alert_tx.alert_p) alert_p not high, despite an item in r_alert_rsp_q
pwrmgr_stress_all_with_rand_reset 73378676238415973022873040917246898107356730118949716689757472006477321345221 338
UVM_FATAL @ 411196045 ps: (alert_receiver_driver.sv:218) [uvm_test_top.env.m_alert_agent_fatal_fault.driver] Check failed (cfg.vif.receiver_cb.alert_tx.alert_p) alert_p not high, despite an item in r_alert_rsp_q
UVM_INFO @ 411196045 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (pwrmgr_reset_invalid_vseq.sv:55) [pwrmgr_reset_invalid_vseq] Timed out waiting for state DVWaitLcInit
pwrmgr_reset_invalid 4216237007604853518700536235054675109039456342319533258824614810392841339990 140
UVM_FATAL @ 74340634 ps: (pwrmgr_reset_invalid_vseq.sv:55) [uvm_test_top.env.virtual_sequencer.pwrmgr_reset_invalid_vseq] Timed out waiting for state DVWaitLcInit
UVM_INFO @ 74340634 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_reset_invalid 25832584686592841400520295824314660701945532437064031094886384296261133994355 98
UVM_FATAL @ 96922925 ps: (pwrmgr_reset_invalid_vseq.sv:55) [uvm_test_top.env.virtual_sequencer.pwrmgr_reset_invalid_vseq] Timed out waiting for state DVWaitLcInit
UVM_INFO @ 96922925 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (pwrmgr_reset_invalid_vseq.sv:55) [pwrmgr_reset_invalid_vseq] Timed out waiting for state DVWaitDisClks
pwrmgr_reset_invalid 53538613422482594566792872131255834554947129872575679247630742610760361328564 78
UVM_FATAL @ 27501105 ps: (pwrmgr_reset_invalid_vseq.sv:55) [uvm_test_top.env.virtual_sequencer.pwrmgr_reset_invalid_vseq] Timed out waiting for state DVWaitDisClks
UVM_INFO @ 27501105 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1149) [pwrmgr_common_vseq] Check failed (cfg.can_reset_with_csr_accesses || !has_outstanding_access()) Trying to trigger a reset with outstanding CSR items.
pwrmgr_stress_all_with_rand_reset 41989899913415201280763667834794524485719281819811246335706657154190851298729 2381
UVM_ERROR @ 18545946898 ps: (cip_base_vseq.sv:1149) [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] Check failed (cfg.can_reset_with_csr_accesses || !has_outstanding_access()) Trying to trigger a reset with outstanding CSR items.
UVM_INFO @ 18545946898 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (pwrmgr_reset_invalid_vseq.sv:55) [pwrmgr_reset_invalid_vseq] Timed out waiting for state DVWaitStrap
pwrmgr_reset_invalid 28255782907486272103516420084622115684027606998930717431210327176832790737717 212
UVM_FATAL @ 114126004 ps: (pwrmgr_reset_invalid_vseq.sv:55) [uvm_test_top.env.virtual_sequencer.pwrmgr_reset_invalid_vseq] Timed out waiting for state DVWaitStrap
UVM_INFO @ 114126004 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_reset_invalid 28434566497328889680714001509011151379175659987114608725714226126947870166581 97
UVM_FATAL @ 147945229 ps: (pwrmgr_reset_invalid_vseq.sv:55) [uvm_test_top.env.virtual_sequencer.pwrmgr_reset_invalid_vseq] Timed out waiting for state DVWaitStrap
UVM_INFO @ 147945229 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_reset_invalid 112519316730726728364372484188597397254541863723511575052741420430831630923577 108
UVM_FATAL @ 154594001 ps: (pwrmgr_reset_invalid_vseq.sv:55) [uvm_test_top.env.virtual_sequencer.pwrmgr_reset_invalid_vseq] Timed out waiting for state DVWaitStrap
UVM_INFO @ 154594001 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (pwrmgr_scoreboard.sv:259) [scoreboard] Check failed item.d_data[i] == exp_intr[i] (* [*] vs * [*]) Interrupt bit *
pwrmgr_disable_rom_integrity_check 114938358279424206564688202235542716553205692677117298136760695886561641433443 89
UVM_ERROR @ 29913651 ps: (pwrmgr_scoreboard.sv:259) [uvm_test_top.env.scoreboard] Check failed item.d_data[i] == exp_intr[i] (1 [0x1] vs 0 [0x0]) Interrupt bit 0
UVM_INFO @ 29913651 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (pwrmgr_reset_invalid_vseq.sv:55) [pwrmgr_reset_invalid_vseq] Timed out waiting for state DVWaitResetPrep
pwrmgr_reset_invalid 2181436510689744893462518041486217385370276593484194820857612762776081138006 113
UVM_FATAL @ 42050233 ps: (pwrmgr_reset_invalid_vseq.sv:55) [uvm_test_top.env.virtual_sequencer.pwrmgr_reset_invalid_vseq] Timed out waiting for state DVWaitResetPrep
UVM_INFO @ 42050233 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '(pwr_rst_o.rst_lc_req == *'b11)'
pwrmgr_escalation_timeout 29313919054219074005928742047009047704894306787485358342125613255163733729820 76
Offending '(pwr_rst_o.rst_lc_req == 2'b11)'
UVM_ERROR @ 94546300 ps: (pwrmgr.sv:178) [ASSERT FAILED] PwrmgrSecCmEscToLCReset_A
UVM_INFO @ 94546300 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (pwrmgr_reset_invalid_vseq.sv:55) [pwrmgr_reset_invalid_vseq] Timed out waiting for state DVWaitRomCheck
pwrmgr_reset_invalid 77628424896564670219569800786045303892456940614297711666716944497842644879128 157
UVM_FATAL @ 123847736 ps: (pwrmgr_reset_invalid_vseq.sv:55) [uvm_test_top.env.virtual_sequencer.pwrmgr_reset_invalid_vseq] Timed out waiting for state DVWaitRomCheck
UVM_INFO @ 123847736 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_reset_invalid 14329746121359354071905203662444782137132226877867719625822913237587432837380 285
UVM_FATAL @ 88902527 ps: (pwrmgr_reset_invalid_vseq.sv:55) [uvm_test_top.env.virtual_sequencer.pwrmgr_reset_invalid_vseq] Timed out waiting for state DVWaitRomCheck
UVM_INFO @ 88902527 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (pwrmgr_reset_invalid_vseq.sv:55) [pwrmgr_reset_invalid_vseq] Timed out waiting for state DVWaitOtpInit
pwrmgr_reset_invalid 92427817237780950089148282996524904237077256761521776396282361641848208433055 90
UVM_FATAL @ 108150585 ps: (pwrmgr_reset_invalid_vseq.sv:55) [uvm_test_top.env.virtual_sequencer.pwrmgr_reset_invalid_vseq] Timed out waiting for state DVWaitOtpInit
UVM_INFO @ 108150585 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_reset_invalid 107648639499408251837774561710320842504956582164337534653535830712980259613524 123
UVM_FATAL @ 70288098 ps: (pwrmgr_reset_invalid_vseq.sv:55) [uvm_test_top.env.virtual_sequencer.pwrmgr_reset_invalid_vseq] Timed out waiting for state DVWaitOtpInit
UVM_INFO @ 70288098 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:454) [pwrmgr_common_vseq] wait timeout occurred!
pwrmgr_stress_all_with_rand_reset 2435872821537649970284754089307125731608132918611279169178691413251191403607 1986
UVM_FATAL @ 10509954960 ps: (cip_base_vseq.sv:454) [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] wait timeout occurred!
UVM_INFO @ 10509954960 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_stress_all_with_rand_reset 22671343477452275090143324976038016864979300727753117769276607336229898553395 717
UVM_FATAL @ 11302853239 ps: (cip_base_vseq.sv:454) [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] wait timeout occurred!
UVM_INFO @ 11302853239 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---