Simulation Results: rstmgr_cnsty_chk

 
09/05/2026 22:36:56 DVSim: v1.34.0 sha: f3ee88d json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 97.52 %
  • code
  • 95.05 %
  • assert
  • 100.00 %
  • line
  • 98.41 %
  • branch
  • 98.31 %
  • cond
  • 86.21 %
  • toggle
  • 100.00 %
  • FSM
  • 92.31 %
Validation stages
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 10 10 100.00
rstmgr_cnsty_chk_test 2.680s 11070.489us 10 10 100.00